JP2003229857A - Serial bus system, device for managing band of serial bus, and communication equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To start as new isochronous communications as possible even when there are only a small number of residual bands left for isochronous communications. <P>SOLUTION: A node 30 having an IRM function calculates a transfer cycle with which an isochronous band can be effectively utilized on the basis of the number of transfer cycle variable nodes 20 performing isochronous communications on a bus and respective secured bands and sends a transfer method switching instruction to the transfer cycle variable nodes 20, if there is only a small number of the residual bands b when a request for securing a band (a) for isochronous communications is made from a node on the bus. The transfer cycle variable node 20 puts together the data of the instructed number of data connecting times to prepare one isochronous packet and transmits the isochronous packet at every instructed transfer cycle. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication device and a communication method for a serial bus system, and more particularly to IEEE.
The present invention relates to a communication device and a communication method for transmitting data using the isochronous band of a 1394 serial bus.

[0002]

2. Description of the Related Art IEEE, which is one of serial bus standards
(Institute electrical and electronics of engineer
s) Since communication according to the 1394 standard can perform isochronous transfer of data,
It is suitable for the transfer of data such as images and sounds that need to be reproduced in real time, and has received a great deal of attention due to the recent demand for multimedia communication.

Between devices connected via an IEEE 1394 serial bus, a transmission band (which is called a band, though it is time) of 100 μs at the maximum is used in a cycle of 125 μs (microsecond). , Data can be isochronously transferred. Further, within the range of the above transmission band, isochronous transfer can be performed with a plurality of channels.

(A) Overview of 1394 serial bus With the advent of home digital video tape recorders and digital video discs (DVDs), real-time information such as video data and audio data (collectively referred to as "AV data" hereinafter) is provided. There is a need to transfer large amounts of data. AV data in real time,
In order to transfer to a personal computer (PC) or other digital equipment, an interface having a high speed data transfer capability is required. The interface developed from such a viewpoint is the 1394 serial bus.

FIG. 7 shows an example of a network system constructed using an IEEE 1394 serial bus. The devices A to H, which form the nodes of the network system shown in FIG. 7, have a digital interface that conforms to or conforms to the IEEE 1394 standard. The 1394 network constitutes a bus type network capable of communicating serial data.

Equipment A-B, A-C, B-D, D-
E, C, F, C, G, and C, H are connected by a twisted pair cable for a 1394 serial bus. Examples of these devices A to H are a host computer device such as a personal computer and computer peripheral devices. As a computer peripheral,
Digital video cassette recorder, DVD player,
It covers all devices such as digital still cameras, storage devices using media such as hard disks and optical disks, CRT and LCD monitors, tuners, image scanners, and the like.

The connection between the respective devices can be a mixture of the daisy chain system and the node branch system, and the connection can be made with a high degree of freedom. In addition, each device has its own ID
139, and by recognizing each other's IDs,
One network is configured in the range connected by four serial buses. For example, each device plays a role of relaying by simply connecting each device with a single 1394 serial bus cable, so that one network can be configured as a whole.

The 1394 serial bus is a Plug and P
It corresponds to the lay function and has a function of automatically recognizing the device by simply connecting the 1394 serial bus cable to the device and recognizing the connection status. In addition, in the system as shown in FIG. 7, when a device is removed from the network or is newly added, the bus is automatically reset (the network configuration information up to that point is reset) and a new device is added. Rebuild the network. With this function, you can always set the network configuration from time to time.
Can be recognized. The bus reset is also performed when the power of the existing device is turned on / off.

Further, the data transfer rate of the 1394 serial bus is defined to be 100/200/400 Mbps, and compatibility is maintained because a device having a higher transfer rate supports a lower transfer rate. . The data transfer modes include an Asynchronous transfer mode (ATM) for transferring asynchronous data such as a control signal and an Isochronous transfer mode for transferring synchronous data such as real-time AV data. The asynchronous data and the synchronous data are mixed in each cycle (usually 125 μs / cycle), following the transfer of the cycle start packet (CSP) indicating the cycle start, and prioritizing the transfer of the synchronous data. Transferred. The transfer band of the isochronous transfer mode is guaranteed within each communication cycle.

The asynchronous transfer mode is effective when transferring data required to be transferred asynchronously as needed, that is, control signals and file data. Further, the isochronous transfer mode is effective in transferring data required to continuously transfer a predetermined amount of data at a constant data rate, that is, video data, audio data, and the like.

[Architecture] FIG. 8 is a diagram showing an example of the structure of a 1394 interface, which has a layered structure. As shown in FIG. 8, the connector port 810
Is connected to the connector at the end of the cable 813 for the 1394 serial bus. Above the connector port 810 are a physical layer 811 and a link layer 812 configured by the hardware unit 800. The hardware unit 800 is composed of an interface chip, of which the physical layer 811 performs encoding and connection-related control, and the like, and the link layer 812 performs packet transfer, cycle time control, and the like.

The transaction layer 814 of the firmware unit 801 manages the data to be transferred and provides read, write and lock transactions. The serial bus management 815 of the firmware unit 801 manages the connection status and ID of each device connected to the 1394 serial bus, and manages the configuration of the 1394 network. The above hardware and firmware are the substantial configuration of the 1394 serial bus.

Further, the application layer 816 of the software section 802 differs depending on the software used, and how data is transferred on the interface is defined by a protocol such as a printer or AV / C protocol.

Link Layer FIG. 9 is a diagram showing services provided by the link layer 812. The link layer 812 provides the following four services. (1) Link request (LK_DATA.request) requesting the transfer of a predetermined packet to the response node (2) Link notification (LK_DATA.indication) notifying the response node of reception of the predetermined packet (3) From the response node Link response (LK_DATA.response) indicating that the acknowledgment of the node has been received (4) Link confirmation (LK_DATA.confirmation) that confirms the acknowledge from the requesting node Note that the link response (LK_DATA.response) is for broadcast communication and isochronous packet. Not present in case of transfer. Further, the link layer 812 realizes two types of transfer methods, i.e., an asynchronous transfer mode and an isochronous transfer mode, based on the services described above.

Transaction Layer FIG. 10 is a diagram showing services provided by the transaction layer 814. The transaction layer 814 provides the following four services. (1) Transaction request (TR_DATA.request) requesting a predetermined transaction to the response node (2) Transaction notification (TR_DATA.indicatio) notifying the response node of reception of the predetermined transaction request
n) (3) Transaction response (TR_DATA.response) indicating that the status information (including data in the case of write or lock) is received from the response node (4) Transaction confirmation to confirm the status information from the request node (TR_DATA.confirmation)

The transaction layer 814 is
It manages asynchronous transfers based on the services described above and implements three types of transactions: read, write, and lock transactions. (1) Read transaction: The request node reads the information stored at the specific address of the response node. (2) Write transaction: The request node writes predetermined information to the specific address of the response node. (3) Lock transaction: The request node transfers the reference data and the update data to the response node. The response node compares the received reference data with the specific address, and updates the information of the specific address with the update data according to the comparison result.

Serial Bus Management The serial bus management 815 specifically provides the following three functions. That is, a node control, an isochronous resource manager (IRM), and a bus manager. (1) Node control: manages each of the above layers and manages asynchronous transfer executed with other nodes. (2) IRM: Manages isochronous transfer executed with other nodes. Specifically, it manages information necessary for allocation of transfer bandwidth and channel number, and provides this information to other nodes. The IRM exists only on the local bus, and is dynamically selected from candidates (nodes having the IRM function) at each bus reset. The IRM may also provide some of the functions (connection configuration, power supply, speed information management, etc.) that can be provided by the bus manager described later. (3) Bus manager: Has an IRM function and provides a higher level bus management than IRM. Specifically, more advanced power management (information such as whether or not power can be supplied via a communication cable, whether or not power supply is necessary is managed for each node), higher speed It manages information (manages the maximum transfer rate between each node), manages a more advanced connection configuration (creates a topology map), and optimizes the bus based on these management information. Further, it has a function of providing these information to other nodes.

Further, the bus manager can provide a service for controlling the 1394 network to the application. This service includes a serial bus control request (SB_CONTROL.request), serial bus event control confirmation (SB_CONTROL.confirmation), and serial bus event notification (SB_CONTROL.indication). (1) SB_CONTROL.request: application requesting bus reset (2) SB_CONTROL.confirmation: SB_CONTROL.request
(3) SB_CONTROL.indication: Service that notifies the application of events that occur asynchronously

[Address Designation] FIG. 11 is a diagram for explaining the address space in the 1394 serial bus. In the 1394 serial bus, a 64-bit width address space is defined according to the Command and Status Register (CSR) architecture based on ISO / IEC1323-1994.

In FIG. 11, the first 10-bit field is used for an ID number that designates a predetermined bus, and the next 6-bit field is used for an ID number that designates a predetermined device (node). These upper 16 bits are called a "node ID", and each node can identify a partner using this node ID and can communicate with the identified partner.

The remaining 48-bit field is
Address space provided by each node (256 MB structure)
Is specified, and a 20-bit field in the field specifies a plurality of areas that form the address space. The last 28-bit field specifies an address where common or unique information is stored in each node.

The area from 0 to 0xFFFFD of the field is called "memory space", 0xFFFFE is called "private space", and 0xFFFFF is called "register space". The private space is an address that each node can use freely. In addition, the register space stores common information between nodes connected to the bus, and communication between the nodes is managed by using the information stored in the register space.

For example, the first 51 in register space
Two bytes are used for the CSR architecture core (CSR core) register. The CSR core registers and functions are shown in FIG. In FIG. 12, 0xFFFFF0
The address is indicated by an offset from 000000.

The following 512 bytes are used as a serial bus register. The address and function of the information stored in the serial bus register is shown in FIG. Figure 1
In 3, the address is indicated by an offset from 0xFFFFF0000200.

The subsequent 1024 bytes are used for a configuration ROM. The configuration ROM has a minimum format and a general format, and is arranged from 0xFFFFF0000400. FIG. 14 is a diagram showing a minimum form of a configuration ROM. A 24-bit vendor ID is a numerical value uniquely assigned to each vendor by IEEE.

FIG. 15 is a diagram showing a general-type configuration ROM, in which the above-mentioned vendor ID is stored in the root directory. It is possible to hold a node unique ID as unique ID information for identifying each node in the bus info block and the root & unit leaves.

As the node unique ID, a unique ID that can identify one node is set regardless of the manufacturer and model. The node unique ID consists of 64 bits, the upper 24 bits indicate the vendor ID described above, and the lower 48 bits indicate information that can be freely set by the manufacturer of the node device, such as the device serial number. Show. The node unique ID is used when the specific node is continuously recognized before and after the bus reset, for example.

The root directory (Root Directo
ry) can hold information about the basic functions of the node. Detailed function information is stored in a subdirectory (Unit Directories) offset from the root directory. Unit Directories store, for example, information about software units supported by the node equipment. Specifically, information about a data transfer protocol for performing data communication between nodes, a command set defining a predetermined communication procedure, and the like is held.

Further, a node dependency information directory (Node
Dependent Info Directory) can hold device-specific information. The node dependent information directory (Node Dependent Info Directory) is offset by the root directory (Root Directory). In addition, vendor-dependent information (Vendor Dependent infor
information) can hold information unique to the vendor that manufactures or sells the node device.

In FIG. 11, the remaining area is called a "unit space" and contains information peculiar to each node, such as identification information of each device (vendor name and model name, etc.) and an address storing usage conditions. specify. FIG. 16 shows the address and function of the information stored in the serial bus device registers in the unit space. In FIG. 16, “0xFFFFF
The address is indicated by an offset from "0000800". Note that, generally, when it is desired to simplify the design of a heterogeneous bus system, each node is the first two units of the unit space.
You should use 048 bytes. In other words, 2048 bytes of register space consisting of CSR core register, serial bus register and configuration ROM,
409 including the first 2048 bytes of the unit space
It is desirable that the register space is composed of 6 bytes.

[Communication Cable] FIG. 17 shows IEEE139
It is a figure which shows the cross section of the communication cable based on 4 standards. The communication cable is composed of two sets of twisted pair signal lines and power lines. By providing a power supply line, the 1394 serial bus can supply power to a device whose main power supply is turned off, a device whose power is reduced due to a failure, and the like. The voltage of DC power supplied by the power supply line is regulated to 8 to 40 V, and the current is regulated to 1.5 A at maximum.

[DS-Link System] Information based on the DS-Link (Data / Strobe Link) system is transmitted to the two twisted pair signal lines. FIG. 18 shows the DS-Link.
It is a figure explaining a system. This DS-Link system
Suitable for high speed serial data communication, its configuration requires two sets of twisted pair signal lines. One set of twisted pair signal lines sends a data signal, and the other set of twisted pair signal lines sends a strobe signal. On the receiving side, the clock can be reproduced by exclusive ORing the data signal and strobe signal received by the two sets of signal lines. The 1394 serial bus using the DS-Link system has the following advantages, for example. (1) Since it is not necessary to mix the clock signal into the data signal, the transfer efficiency is higher than that of other serial data transfer methods. (2) The phase-locked loop (PLL) circuit is not required, and the circuit scale of the controller LSI can be reduced. (3) It is not necessary to send information indicating an idle state when there is no data to be transferred, the transceiver circuit can be easily put into a sleep state, and power consumption can be reduced.

[Bus Reset] The interface of each node can automatically detect that the connection configuration of the network has changed. In this case, the 1394 network performs a process called bus reset according to the procedure described below. The change in the connection configuration can be detected by the change in the bias voltage applied to the connector port 810 included in each node.

A node that detects a change in the network connection configuration, for example, an increase / decrease in the number of nodes due to connection separation of network equipment or power on / off, or a node that needs to newly recognize the network connection configuration,
A bus reset signal is transmitted on the 1394 serial bus via the 1394 interface.

Upon receiving the bus reset signal, the physical layer 811 detects the occurrence of the bus reset in the link layer 81.
2 and the bus reset signal to another node. The node receiving the bus reset signal clears the network connection configuration and the node ID assigned to each device, which have been recognized so far. After all nodes finally receive the bus reset signal, each node automatically performs the initialization process associated with the bus reset, that is, the recognition of the connection configuration of the new network and the assignment of the new node ID. .

Note that the bus reset is activated by the change in the network connection configuration as described above, and also by the host control by the application layer 81.
6 is also activated by directly issuing a command to the physical layer 811. Further, when the bus reset is activated, the data transfer is temporarily interrupted, and after the initialization processing accompanying the bus reset is completed, the data transfer is restarted under the new network.

[Sequence after activation of bus reset] After activation of bus reset, the interface of each node recognizes the connection configuration of the new network and allocates a new node ID. The basic sequence from the start of bus reset to the end of node ID allocation will be described below with reference to FIGS. 19 to 21. FIG. 19
FIG. 6 is a diagram illustrating a state after a bus reset is activated in the 1394 network. Each of the nodes A to F has one to three connector ports 810. A port number is attached to the connector port 810 of each node to identify each port. Hereinafter, the procedure from the start of the bus reset to the node ID allocation in the 1394 network configured as shown in FIG. 13 will be described with reference to the flowchart of FIG.

In FIG. 20, each of the nodes A to F constituting the 1394 network constantly monitors whether or not a bus reset has occurred (S1501). A bus reset signal is output from the node that detects that the network connection configuration has changed (bus reset startup)
Then, each node executes the following processing.

When the bus reset is activated, each node declares a parent-child relationship (S1502), and step S1502 is repeated until it is determined in step S1503 that the parent-child relationship has been determined among all the nodes.

After determining the parent-child relationship among all the nodes,
A node that performs arbitration of the 1394 network, that is, a "root" is determined (S1504). After the root is determined, the work of setting each node ID of each node is started (S1505), and step S1506 is performed until it is determined that all node IDs are set.
1505 is repeated.

Eventually node IDs for all nodes
After setting, each node executes isochronous transfer or asynchronous transfer (S1507). Each node executes data transfer in step S1507, and monitors the activation of bus reset in step S1501. Then, when the bus reset is activated, the processing from step S1502 is executed.

Through the above procedure, each node can recognize a new network connection and execute a new node ID assignment each time the bus reset is activated.

[Determination of Parent-Child Relationship] FIG. 21 shows step S1.
9 is a flowchart showing a detailed example of a process of declaring a parent-child relationship in 502. In FIG. 21, after the bus reset is activated, the nodes A to F confirm the connection state (connected or unconnected) of the connector port 810 provided in the nodes A to F (S1601), and then are connected to other nodes. The connector ports 810 (hereinafter referred to as “connection ports”) are counted (S1602).

The node having one connection port recognizes that it is a "leaf" (S1603).
The leaf declares that it is a “child” to the connected node (S1604),
The connected node recognizes as a "parent". In this way, the declaration of the parent-child relationship begins with leaves and branches located at the end of the 1394 network.
Between and. Subsequently, the declaration of the parent-child relationship is sequentially made between the branches. A branch is a node having two or more connection ports.

In this way, the parent-child relationship is determined in order from the nodes where the parent-child relationship can be declared. Also, in each node, the connection port where a certain node declares "child" is recognized as the "parent port" connected to the parent node, and the connection port of the node that received the declaration is connected to the child node. Recognized as a "child port". For example,
In FIG. 19, each of the nodes A, E, and F recognizes that it is a leaf and declares a parent-child relationship. As a result, the parent-child relationship between the nodes A-B, E-D, and F-D is determined as "child-parent".

A node having two or more connected ports recognizes itself as a branch (S1605).
The branch receives the declaration of the parent-child relationship from the node connected to each connection port (S1606). The connection port that accepts the parent-child relationship declaration is recognized as a "child port".

After recognizing one connection port as a “child port”, the branch detects whether there are two or more connection ports (undefined ports) whose parent-child relationship has not been determined (S1607). If there are two or more undefined ports, the process of step S1606 is performed again. If there is only one undefined port (S1608), the branch recognizes the connection port as a “parent port” and regards the node connected to the connection port as a “child”. This is declared (S1609).

A branch cannot declare a parent-child relationship, that is, declare itself as a “child” to other nodes until there is only one undefined port. For example, in FIG. 19, nodes B, C, and D recognize that they are branches and accept parent-child declarations from leaves or other branches. After the parent-child relationship between DE and DF is determined, the node D declares the parent-child relationship to the node C. Further, the node C, which has received the declaration of the parent-child relationship from the node D, declares the parent-child relationship to the node B.

When it is determined in step S1608 that there is no undefined port, that is, when all the connection ports become "child ports", the branch recognizes that it is the root (step S1610).

For example, in FIG. 19, the node B in which all the ports to be connected are child ports is recognized by other nodes as a route for arbitrating communication on the 1394 network. FIG. 19 shows an example in which the node B is determined as the root, but if the declaration of the parent-child relationship by the node B is earlier than the declaration of the parent-child relationship by the node C, another node becomes the root. That is, depending on the timing of declaring the parent-child relationship, any node may become the root, and even if the network configuration is the same, the same node does not always become the root.

By declaring the parent-child relationship of all connection ports, each node can recognize the connection configuration of the 1394 network as a hierarchical structure (tree structure) (S1611). The parent node described above is the upper level in the hierarchical structure, and the child node is the lower level in the hierarchical structure.

[Assignment of Node ID] FIG.
16 is a flowchart showing a detailed example of node ID allocation processing in 1505. The node ID is composed of a bus number and a node number, but here, it is assumed that each node is connected to the same bus and is assigned the same bus number. In FIG. 22, the root gives the node ID setting permission to the connector port 810 having the smallest number among the child ports to which the node whose node ID is undefined is connected (S1701). The root sets the child IDs of all the nodes connected to the child port with the smallest number, sets the child port as already set, and sets the node I to the child port with the next smallest number.
Give permission to set D. After the node IDs of all the nodes finally connected to the child ports are set by the processes of steps S1702 to S1708, the node ID of the root itself is set (S1709). The node numbers are basically assigned as 0, 1, 2, ... In the order of leaf, branch, and root. Therefore,
The root will have the highest node number.

The node that has obtained the node ID setting permission judges whether or not there is a child port including a node whose node ID has not been set among its own child ports (S1704), and the node ID has not been set. When the child port including the node is detected, the node directly connected to the child port is allowed to set the node ID (S1703).

In addition, step S1702 or S170
In No. 4, if a child port including a node whose node ID has not been set is not detected, the node uses its own node ID.
Is set (S1705). And your node ID
The node for which ID is set includes a self ID including its own node number and information about the connection status of the connector port 810.
The packet is broadcast (S1706). The broadcast is to transfer the communication packet of a certain node to an unspecified number of nodes connected to the network.

By receiving the self-ID packet, each node can recognize the node number already assigned to another node, and can recognize the node number that can be assigned to itself. For example, in FIG.
The root node B gives the node A setting permission to the node A connected to the connector port 810 having the smallest port and the number “# 1”. The node A assigns “0” as its own node number, sets a node ID including a bus number and a node number for itself, and broadcasts a self-ID packet including the node number.

Next, if the parent node of the node that broadcasts the self-ID packet in step S1706 is not the root, the process returns from step S1707 to step S1702, the parent node executes the processing of step S1702 and thereafter, and the node ID is not set. The node ID setting permission is given to the node.

If the parent node of the node that broadcasts the self-ID packet in step S1706 is the root, the process advances from step S1707 to S1708, and the node IDs of the nodes connected to all child ports of the root are set. Is determined. If there is a node for which the node ID has not been set, the root is the node ID for the port with the smallest number among the child ports
Is given (S1701). When the node IDs of all the nodes are set, the root sets its own node ID (S1709) and broadcasts a self-ID packet (S1710). Through the above processing, each node of the 1394 network can allocate its own node ID.

[Self ID Packet] FIG. 23 shows Self I
In the diagram showing the configuration example of the D packet, the field 1 in which the node number of the node that has transmitted the self-ID packet is stored
801, a field 1802 in which information about a transfer rate that can be supported is stored, a field 1803 indicating whether or not a bus management function (bus manager capability, etc.) is present, and a field 1804 in which information about power consumption and supply characteristics is stored There is. In addition, the port number "#
There are fields 1805 to 1807 that store information (connection, non-connection, parent-child relationship of ports, etc.) regarding the connection status of each connector port 810 from “0” to “# 2”.

The contender bit of the field 1803 becomes "1" when the node transmitting the self-ID packet has the ability to become the bus manager, and becomes "0" otherwise. The bus manager is a node having a function of performing the following management based on various information included in the self-ID packet and providing the information to other nodes. With these features,
The bus manager can manage the bus of the entire 1394 network. (1) Bus power supply management: Information on whether or not power can be supplied via a communication cable, whether power needs to be supplied, or the like is managed for each node. (2) Management of speed information: The maximum transfer speed between each node is managed from the information about the transfer speed that each node can handle. (3) Management of topology map information: The connection configuration of the network is managed from the parent-child relationship information of the communication port. (4) Bus optimization based on topology map information.

After setting the node IDs, when a plurality of nodes have the capability of the bus manager, the node having the largest node number becomes the bus manager. That is, 139
If the route with the highest node number in the four networks has the function of becoming the bus manager, the route becomes the bus manager. However, if the root does not have that capability, the node with the next highest node number after the root becomes the bus manager. Further, which node has become the bus manager can be grasped by checking the contender bit 1803 in the self-ID packet broadcast by each node.

[Arbitration] FIG. 24 is a diagram for explaining arbitration in the 1394 network. Thirteen
In the 94 network, bus usage right is arbitrated before data transfer. The 1394 network is a logical bus type network, and by forwarding a packet sent from each node to another node, the same packet is transferred to all the nodes in the network. Therefore, in order to prevent packet collision, arbitration is always required, and only one node can send a packet at a certain timing.

FIG. 24A shows a state in which the nodes B and F request the right to use the bus. Nodes B and F request bus usage rights from their respective parent nodes.
The parent node (node C) receiving the request from the node B relays the request to its own parent node (node D). These requests finally reach the route (node D) that performs arbitration.
The route that has received the request for the bus use right performs arbitration to determine which node is given the bus use right. This arbitration can be performed only by the route, and the bus right is given to the node that wins the arbitration.

FIG. 24B shows a state in which the bus use right is given to the node F and the request from the node B is rejected. The route uses DP (Data
Prefix) packet to indicate that the request was rejected. The node for which the request is rejected has to wait for the request for the bus right until the next arbitration. By the above arbitration, the bus use right of the 1394 network is controlled and managed.

[Communication Cycle] The isochronous transfer mode and the asynchronous transfer mode can be mixed in time division within the period of each communication cycle. The period of the communication cycle is usually 125 μS. FIG. 25 is a diagram showing a state in which the isochronous transfer mode and the asynchronous transfer mode are mixed in one period of the communication cycle. The isochronous transfer mode is executed prior to the asynchronous transfer mode. The reason is that after the cycle start packet (CSP), the idle period (Subaction gap) required to activate asynchronous transfer.
However, it is because it is set long to activate the isochronous transfer. With these different idle time settings,
Isochronous transfer is executed prior to the asynchronous transfer mode.

In FIG. 25, a cycle start packet (CS
P) is transferred from a given node. By adjusting the timing of each node with this cycle packet (CSP), the same timing as other nodes can be obtained.

"Isochronous Transfer Mode" The isochronous transfer mode is a synchronous transfer system. The isochronous transfer mode can be executed in a predetermined period after the start of the communication cycle. Further, the isochronous transfer mode is always executed every cycle in order to maintain real-time transfer. The isochronous transfer mode is particularly suitable for transferring data that requires real-time transfer, such as moving image data and sound data including voice. The isochronous transfer mode is not one-to-one communication like the asynchronous transfer mode, but broadcast communication, and a packet sent from a certain node is uniformly transferred to all nodes on the network. In the isochronous transfer, there is no acknowledge code (ACK) which is a reply code for confirmation of reception.

In FIG. 25, channel e (ch
e), channel s (ch s) and channel k (ch
k) indicates a period during which each node performs isochronous transfer. In the 1394 serial bus, different channel numbers are given to distinguish different isochronous transfers. This enables isochronous transfer between a plurality of nodes. It should be noted that this channel number does not specify the transmission destination but merely gives a logical number to the data. Also,
The isochronous gap shown in FIG.
p) indicates an idle state of the bus, and after the idle state has passed a certain time, a node desiring isochronous transfer judges that the bus can be used and requests the right to use the bus.

FIG. 26 is a diagram showing the format of a packet transferred in the isochronous transfer mode. Hereinafter, a packet transferred in the isochronous transfer mode will be referred to as an “isochronous packet”. FIG. 26
In the isochronous packet, the header part 210
1, a header CRC 2102, a data section 2103 and a data CRC 2104. Header part 2101
Data_len stores the data length of the data 2103
gth field 2105, tag field 2106 storing format information of isochronous packet, channel storing channel number of isochronous packet
l field 2107, a tcode field 210 that stores a transaction code (tcode) that identifies the format of the packet and the processing that must be performed.
8 and the sy field 21 that stores the synchronization code
There is 09.

When performing isochronous transfer,
Prior to transfer, it is necessary to secure channels and bands. Management of channels and bands for isochronous transfer is managed by a 32-bit register mapped in the CSR address space. The register that stores the current channel usage status on the network is called the CHANNELS_AVAILABLE register and has the format shown in FIG.

CHANNELS_AVAILABLE_HI and CHANNELS_AVAILA
It is divided into two registers of BLE_LO, and the usage status of channels 0 to 31 on the HI side and channels 32 to 63 on the LO side is indicated by 1 bit. A value of 1 means that the channel is available, and a value of 0 means that it is used. The register in which the amount of bandwidth remaining on the current network is described is called a BANDWITH_AVAILABLE register and has the format shown in FIG. bw_remaining represents the remaining bandwidth. The unit of the value is called BWU (Band Width allocation Unit), and the definition of this unit is the time required to transmit 32 bits at a speed of 1600 Mbps, and 1 BWU is about 20 ns. The initial value of bw_remaining is 4195 (BWU), which means the maximum communication bandwidth of isochronous data that can be transmitted per cycle, and is 100 μs.
Is a value corresponding to. That is, up to 80% of 125 μs in one cycle can be used for isochronous transmission.

[Asynchronous Transfer Mode] The asynchronous transfer mode is an asynchronous transfer system. Asynchronous transfer can be executed after the end of the isochronous transfer period and before the start of the next communication cycle, that is, before the transfer of the cycle start packet (CSP) of the next communication cycle.

In the communication cycle of FIG. 25, the first subaction gap indicates the idle state of the bus. After a certain period of time has passed in this idle state, the node desiring asynchronous transfer determines that the bus can be used and requests the bus use right. The node which has acquired the bus use right by the arbitration transmits the packet shown in FIG. 29 to a predetermined node. The node that receives this packet returns an ack or response packet after an acknowledge gap.

FIG. 29 is a diagram showing the format of a packet transferred in the asynchronous transfer mode. Hereinafter, a packet transferred in the asynchronous transfer mode will be referred to as an “asynchronous packet”. FIG. 29
In the asynchronous packet, the header part 220
1, a header CRC 2202, a data part 2203 and a data CRC 2204. Header section 2201
The node ID of the destination node of the packet is stored in di
stination_ID field 2205, source_ID field 2 storing the node ID of the source node of the packet
206, a tl field 2207 in which a label indicating a series of transactions is stored, an rt field 2208 in which a code indicating a retransmission status is stored, and a transaction code (tcode) identifying a packet format and a process to be executed. Tcode field 2209, pri field 2210 in which priority is stored, memory address of destination node is stored
destination_offset field 2211, data_length field 2212 in which the data length of the data part is stored,
In addition, there is an extended_tcode field 2213 in which the extended transaction code is stored.

Asynchronous transfer is one-to-one communication from the own node to the partner node. The packet transmitted from the source node is distributed to each node in the 1394 network, but each node ignores the packets other than addressed to itself, so only the destination node reads the packet.
When the time to transfer the next CSP is reached during the asynchronous transfer, the transfer is not forcibly interrupted and the next CSP is transmitted after the transfer is completed. As a result, when one communication cycle continues for 125 μS or more, the next communication cycle period is shortened accordingly. By doing so, the 1394 network can maintain a substantially constant communication cycle.

[Connection Management] As described above, the IEEE 1394 standard defines data transfer means, but does not define means for establishing a signal connection between devices. IEC (International Electrotec) defines this connection management method.
hnical Commission) 61883. IEC618
Reference numeral 83 is an upper layer of IEEE 1394 and defines transmission of real-time AV data of consumer digital audio / video, management of AV signal connection between devices, and control command transmission protocol. IEC6188
3 provides the concept of a "plug" for logically connecting signals to an AV device connected by IEEE 1394, instead of the conventional physical signal connection.

There are two methods for establishing a connection between devices in a device in which a plug is mounted.
They are called point-to-point connection and broadcast connection, respectively.

Point-to-point connection Connecting one output plug and one input plug through one channel is called a point-to-point connection. This is similar to a cable of a conventional analog AV device in that it is logically or physically different, but is similar in that an output source and an input source are designated.

Broadcast connection It is necessary to connect one output plug to one channel.
Connecting an oadcast out connection and one input plug to one channel is called a broadcast in connection. Unlike a point-to-point connection, a connection that does not specify the other plug is called a broadcast connection. This is a concept not found in conventional analog AV equipment.

Plug control register The plug control register (PCR) is a register that realizes the concept of a plug, and is an IEEE 1394 CSR.
It is mapped to an architecture-compliant (ISO / IEC-13213) address space. FIG. 30 shows an address map of the plug control register (PCR).
One PCR exists for one plug, and the PCR has an oPCR (Output Plug Control Regist) that represents an output plug.
er) and iPCR (Input Plug Registe
r), device-specific output plug and input plug information, oMPR (Output Master Plug Register), iMPR
There is (Input Master Plug Register). oPCR and iPCR
Can have a minimum of 0 and a maximum of 31 depending on the number of plugs of the device. The instrument must have one oMPR if it has an oPCR and one iMPR if it has an iPCR.

Each PCR is a 32-bit register, and its inside is divided into fine fields. A description of the format and fields is shown in FIG. Figure 31
FIG. 31A is an oMPR format, and FIG. 31B is an illustration of iMPR formats and fields. dr cap (data rate capabili
ty) represents the maximum data transfer rate of the output (input) plug, and Bc channel base (Broadcast channel base) is bro
Specify the channel number for adcast output. #o
PCR and #iPCR indicate the number of output plugs and the number of input plugs, respectively.

FIG. 31 (c) shows oPCR, and FIG. 31 (d) shows iPCR.
It is a figure which shows the format and field of. on-line
Indicates whether this plug is online or offline, bcc
(Broadcast connection counter)
Indicates whether or not an oadcast connection is established. pcc (point-to
-point connection counter) indicates the number of point-to-point connections, and channel (channel number) indicates the channel used for output or input isochronous transfer. dr (data rata) indicates the data transfer rate, overhead ID indicates the communication overhead, and payload indicates the maximum number of quadlets transferred in one isochronous data packet.

In order to perform isochronous transfer, it is possible to perform isochronous transfer between devices by establishing a band and a channel and then establishing a connection between the devices.

[0083]

By the way, in isochronous transfer, prior to isochronous transfer,
The bandwidth required for communication must be requested from the IRM in advance and acquired. As described above, the total bandwidth allocated to isochronous transfer is determined to be 100 μS. Therefore, if the data transmission bandwidth to be performed is larger than the remaining bandwidth for isochronous transfer, the bandwidth cannot be secured. , A new isochronous transfer could not be performed.

For example, as shown in FIG.
When isochronous transfer of data A, data B, and data C is being performed between the devices, even if data D is newly transferred from now on, it is ensured when newly transferred from the remaining band b for isochronous transfer. If the required band a is larger, there is a problem that the isochronous transfer cannot be started.
From the above, it is an object of the present invention to provide a communication device capable of data transfer as much as possible even when the band of data to be transferred is larger than the remaining band for isochronous transfer when performing isochronous transfer. .

[0085]

In order to solve the above problems, the present invention secures a part of the transmission band of the serial bus before communication between a plurality of devices connected to the serial bus, In a serial bus system that performs communication based on a secured transmission band, the transmission band management device that manages the transmission band of the serial bus and the data transmission cycle variable device that can change the data transmission cycle are provided. A band management device includes a band management unit that manages a secured state of a transmission band of the serial bus,
Means for detecting the data transmission cycle variable device among a plurality of devices connected to the serial bus, and the data transmission cycle variable device in which the band secured by each device from the transmission band of the serial bus is optimum Means for calculating the data transmission cycle of, and based on the optimum transmission cycle calculated by the calculating means, determines a band to be secured from the transmission band of the serial bus and secures the band by the band managing means, And a transmission cycle switching instruction means for instructing the data transmission cycle variable device to switch the transmission means.

[0086]

BEST MODE FOR CARRYING OUT THE INVENTION (a) General description In the present invention, in isochronous transfer of a plurality of devices, data transfer using a band for isochronous transfer is performed once every predetermined cycle, so that isochronous transfer is performed. It improves the efficiency of data transfer.

FIG. 1 is a schematic explanatory view of the present invention. Figure 1
As shown in (a), when the data A, the data B, and the data C are isochronously transferred, even if the data D is newly transmitted, the remaining band b of the isochronous band b
Is smaller than the band a required for transmitting the data D, the IRM instructs the node transmitting the isochronous data to change the transfer method.

IRM (Isochronous Resource Manager)
Confirms whether the node transmitting these data A, data B, and data C is a device that can switch to the transfer method of the present invention (details will be described later), and can switch to the transfer method of the present invention. In this case, if a plurality of pieces of data having the largest bandwidth among these pieces of data are combined into one packet, whether the remaining bandwidth within one cycle is larger than the bandwidth for transferring the data D is determined. calculate.

For example, in the case where the data B has the largest bandwidth and the bandwidth for transferring the data D can be secured when three packets of the data B are combined to form one packet,
As shown in (b), in the first cycle, three pieces of data A are combined and transferred as one packet, and data D is transferred in the remaining band. In the second cycle, three pieces of data B are combined and transferred as one packet, and data D is transferred in the remaining band. In the third cycle, the three data C are combined and transferred as one packet, and the data D is transferred in the remaining band.

As described above, a plurality of pieces of data to be sent for each cycle are combined to form one packet, and data is transmitted in order for each cycle, thereby providing a new band for isochronous transfer. A band is secured for transferring the data (data D) to be transferred. By transferring a plurality of data as one packet, it is possible to reduce the bandwidth for the header and isochronous gap attached to each data, and to secure the transfer bandwidth for the data to be newly transferred.

(B) Detailed Description (b-1) Cycle Variable Node A node to which the present invention is applied has information indicating whether it is a cycle variable node or a cycle fixed node. The information indicating whether the node is a cycle variable node or a cycle fixed node is mapped to a place other than the memory space normally defined by 1394.
The private space of the register space defined by EEE1394 is allocated. The node having the IRM function of the present invention, which will be described later, can determine whether or not each node is a cycle variable node by referring to the private space of each node.

The cycle variable node is the I node of the present invention.
In accordance with an instruction from a node having an RM function, one isochronous packet is configured by combining N (N is a natural number) data, and the transfer method can be switched to one isochronous packet transmission every N cycles. Has been done.

FIG. 2 is a diagram showing the structure of the cycle variable node of the present invention. The cycle variable node 20 of the present invention is
Counter 2 that counts cycle start packets
1, a control unit 22 for performing control according to a transfer method switching signal from the IRM of the present invention, a FIFO memory 23 capable of storing a plurality (N or more) of data, and an IEEE 1394 interface 24.

Each of the cycle variable nodes has an IRM.
When the transfer mode switching signal from the
N pieces of data that have been sent once per cycle are collected and
An isochronous packet is generated and sent only once every N cycles. The transfer order between each variable node is
According to the IRM instruction, for example, the data may be transmitted in descending order of the node number. The counter 21 is cleared each time the isochronous data is transmitted, and counts up every cycle. Control unit 2
When the counter value reaches N (the number of transfer cycles instructed by the IRM), the packet No. 2 sends a packet in which N pieces of data are collectively generated. In the FIFO memory 23,
At least N pieces of data can be stored, and the N pieces of data stored in the FIFO memory 23 at the time of data transfer are collectively transmitted as one isochronous packet on the bus.

(B-2) Node having IRM function of the present invention At least one of the nodes existing on the bus must be a node having the IRM function of the present invention. Further, the node having the IRM function of the present invention is an IR
Must be M. Therefore, if the node having the IRM function of the present invention does not become the IRM after the determination of the parent-child relationship after the bus reset and the self ID determination, the node having the IRM function of the present invention becomes the I node of the present invention.
The node having the RM function is set to be the IRM.
Specifically, the ID of the node having the IRM function of the present invention is designated, a Phyconfiguration (physical configuration) packet is broadcast, and then a bus reset is caused. By doing so, the node having the IRM function of the present invention becomes the root, and as a result, the node having the IRM function of the present invention can become the IRM. That is, when the node having the IRM function of the present invention becomes the root, the node number becomes the largest on the bus in the subsequent self ID determination, so the node having the IRM function of the present invention becomes the IRM.

The functions required for the node having the IRM function of the present invention include the following functions in addition to the conventional IRM function. 1. 1. Management of the nodes on the bus performing isochronous transfer and the bandwidth secured by each node Function to calculate the optimum combination of data sent by each node during variable cycle isochronous transfer. 3. A function of transmitting a data transmission cycle to a variable cycle node and transmitting the number of data pieces that combine a plurality of data pieces into one isochronous packet. Write pseudo data to BANDWIDTH_AVAILABLE register

FIG. 3 shows the configuration of a node having the IRM function of the present invention. As shown in the figure, in addition to the conventional configuration, the node 30 having the IRM function of the present invention,
The controller 31 includes a band management memory 32 and an optimum transfer cycle calculator 33. In addition, IEEE1394
The interface 34 includes a BANDWITDH_AVAILABLE register 35. The bandwidth management memory 32 is 139
Channels performing isochronous transfer on 4 buses,
A band for data transfer using the channel and a node for transmitting isochronous data using the channel are stored in association with each other. Specifically, the node having the IRM function of the present invention is 1394
PCR (Plug CoP) of all nodes existing on the serial bus
The number of output plugs and input plugs installed in each node can be known by referring to the ntrol Register), and the oPCR (output Plug Co
You can know the channel, overhead, and payload size used for isochronous transmission by referring to the ntrol Register). By referring to the PCR implemented in each of these nodes, it is possible to know which node uses which channel, and how much bandwidth is used for isochronous transmission. The control unit 31 stores in the band management memory 32 the channel and band used by each node for isochronous communication.

The optimum transfer cycle calculation unit 33, when there is a new node on the bus to perform isochronous transfer, changes the transfer cycle of the node performing isochronous transfer on the bus to change the remaining transfer time for isochronous transfer. The number of cycles (N) that increases the bandwidth as much as possible,
The number of data (N) forming one isochronous packet is calculated. The control unit 31 gives a transfer method switching instruction to each variable cycle node together with the number of cycles calculated by the optimum transfer cycle calculation unit 33.

Specifically, when there are N variable cycle nodes of the present invention among the nodes transmitting isochronous data on the 1394 serial bus, the largest bandwidth among the variable cycle nodes is secured. The node that is doing Next, of the bandwidth secured by the node, the bandwidth for the actual data bandwidth (bandwidth excluding the header, CRC, isochronous gap, and arbitration bandwidth) N isoband packets Calculate the amount. The bandwidth (remaining bandwidth) obtained by subtracting the bandwidth when N data is collectively transmitted as one isochronous packet from the entire bandwidth for isochronous transmission (100 μs) is required to transfer new data to be transmitted. If the bandwidth is larger, the node having the IRM function of the present invention performs the following processing. (1) By rewriting the value of the BANDWIDTH_AVAILABLE register owned by itself, a band required to transfer N times the data of the largest data calculated above is secured. (2) Instruct the cycle variable node that is performing isochronous transfer on the bus to switch the transfer method. Specifically, N pieces of data are treated as one packet, and N
A transfer method switching signal for instructing to send data only once in a cycle is broadcast by asynchronous transfer.

(B-3) Example of bus system For example, a system as shown in FIG.
DVCR device DVCR1, DVCR on 394 serial bus
CR2, DVCR3, DVCR4 and TV monitor T
Consider the case where V1, TV2, TV3, and TV4 are connected. The transfer rate is S200 (19
6.608 Mbps). Also, DVCR
1, DVCR2 and DVCR3 are cycle variable nodes capable of switching the transfer method, TV1 is a node having an IRM function of the present invention, and the TV system serves as an IRM to construct a bus system.

Currently, from DVCR1 to TV1, DVCR
2 to TV2, DVCR3 to TV3 DV respectively
It is assumed that the format data is isochronously transferred. The band required for each isochronous communication is calculated from the following equation by the node performing the isochronous communication, and the band is secured from each IRM. (Overhead_ID x 32 + (payload size + 3) x DR) BWU ... (1)

Here, BWU is a unit indicating a band as described above, and 1 BWU is 3 at a speed of 1600 Mbps.
It is the time taken to transmit 2 bits (1 quadlet). The overhead_ID is an ID indicating the time required for the isochronous gap and the arbitration, and is “15” here, for example. In the case of DV format, the payload size is 480 bytes (= 12
0 quadlet) + CIP header (2 quadlet). 3 is an isochronous header (1 quadlet)
+ Header CRC (1 quadlet) + Data CRC (1
Quadlet) is shown. The DR (data rate coefficient) is 8 for the transfer rate of S200. Note that C
The IP header is a Common Isochronous Packet header defined by the AV protocol for transmitting real-time data (video, audio signals, etc.) using isochronous communication, and the data is stored in the first two quadlets of the data field of the isochronous packet. It is a header indicating an attribute. Putting these values into equation (1), each DVC
The bandwidth required for isochronous data transfer from R to TV is 1480 BWU.

That is, since the initial value of the BNDWIDTH_AVAILABLE register is 4915BWU, since DV format data is flowing on three buses, the current BANDWIDT
The value of the H_AVAILABLE register (remaining bandwidth) is 4195-3 ×
It is 1480 = 475 BWU.

In this state, when the DVCR 4 newly attempts to transmit data to the TV 4 in the DV format, the remaining bandwidth for isochronous transfer is only 475 BWU, and therefore, the DVCR which newly attempts to perform isochronous transfer.
Even if 4 requests the TV 1 which is the IRM to secure the bandwidth, the bandwidth of 1480 BWU required for the transfer cannot be secured. Therefore, the TV 1 having the IRM function of the present invention is
It detects whether there is a node that is going to newly perform isochronous transfer, and also determines how much bandwidth is required. Specifically, it is possible to determine whether or not the band can be secured depending on whether or not the writing to the BANDWIDTH_AVAILABLE register by the compare and swap lock transaction from the node (DVCR4) that is going to secure the band is successful.

Compare and swap is one type of lock transaction (conditional write) of asynchronous transaction, which is used for writing to the BANDWIDTH_AVAILABLE register, and has the following sequence. 1. 1. Create a request packet that specifies the current value (arg_value) of the register that the request node tries to write and the value (data_value) that you want to write, and send it to the response node.2. The response node receives the arg_va of the received request packet.
If the lue and the current value of the register are compared and they are equal, the value of the register is changed to data_value, and if they are not equal, it is not changed. After that, a response packet in which the register value at the time of receiving the request packet is set to old_value is created and returned to the request node. 3. The request node uses old_ of the received response packet
The value is compared with the arg_value transmitted by itself, and if the values are equal, it is determined that the writing is successful, and if they are not equal, it is determined that the writing has failed.

The node having the IRM function of the present invention (TV
By detecting that the lock transaction to the BANDWIDTH_AVAILABLE register has not succeeded, 1) can know whether or not the bandwidth has been secured, and the request packet sent from the request node can be detected. By analyzing it, it is possible to know the bandwidth required by the requesting node from the difference between arg_value and data_value.

The node (DVCR4) which newly tries to secure the isochronous band is BANDWITH_AVAILABLE.
When a write request is issued by a lock transaction to a register, the current BANDWIDTH_AVAILABLE register value must be put in the request packet, so the current BANDWI
The remaining bandwidth of the DTH_AVAILABLE register may be checked.
In this case, the node (DV
The CR4) knows the current remaining bandwidth from the read response from the node (TV1) having the IRM function, and if the remaining bandwidth is smaller than the bandwidth to be secured, does not issue the lock request and gives up securing the bandwidth. I will end up. If there is no lock request to secure the band from the node that newly tries to secure the isochronous band, IRM
Since (TV1) cannot know how much bandwidth is required by the node (DVCR4) that is trying to newly secure the bandwidth, the node (TV1) having the IRM function of the present invention is set to the BANDWIDTH_AVAILABLE register. In response to the read request, a false value, for example, a value (4195 BWU) indicating that all the bands for isochronous transfer remain is returned. By doing this, the node that newly tries to secure the bandwidth determines that the bandwidth can be secured because the value of the read response from the IRM (remaining bandwidth) is large, and then rewrites the value of the BAND_AVAILABLE register with a lock request. Will try. Actually, there is no band left, so BAND_AVA
The value of the ILABLE register cannot be rewritten by the lock request, but the IRM (TV1) will secure a new band by analyzing the lock request sent from the node (DVCR4) that newly tries to secure the band. It is possible to know how much bandwidth the node (DVCR4) requires.

If a new isochronous band cannot be secured despite the band securing request, the node (TV1) having the IRM function of the present invention is currently 139
4 Search for a cycle variable node among the nodes performing isochronous transfer on the serial bus. In this example, D
Three nodes of VCR1, DVCR2 and DVCR3 are detected as cycle variable nodes. Whether a node is a cycle variable node or not is determined by referring to the private space assigned to each node.

Next, the IRM calculates the required bandwidth when the data unit of the node that requires the most bandwidth among the detected cycle variable nodes is collected as the number of cycle variable nodes into one isochronous packet. To do.
In this example, DVCR1, DVCR2 and DVCR3
3 nodes are detected as cycle variable nodes, and the amount of bandwidth required for isochronous transfer for all nodes is 1480 BWU.

Here, consider the required band of the DVCR1. The bandwidth required for communication when the 366 quadlet, which is obtained by multiplying the payload size (122 quadred) of the data transmitted by the DVCR1 by the number of cycle variable nodes (N = 3) as one data, is an isochronous packet is overhead_ID × 32 + {payload (366 Quadred) +3} × 8 = 3432BWU.

Here, the calculated band (3432BW
U) and the band (1480 BW) required by the node (DVCR4) newly starting the isochronous transmission.
It is determined whether the value obtained by adding U) exceeds the entire bandwidth for isochronous transfer. If not, it is determined that a new transfer can be performed by switching the transfer method.

When it is determined that new transfer can be performed by switching the isochronous transfer method,
BANDWIDTH_AVAILA owned by TV1 which is IRM
Set the value of BLE register to 4915-3432 = 1483BW
It is rewritten to U and is a cycle variable node D
A transfer method switching signal is broadcast to VCR1, DVCR2, and DVCR3 with the number of transmission cycles being 3 and the number of data connections being 3. Each of the DVCR1, DVCR2, and DVCR3, which has received the transfer switching signal, sends out a packet of three data items as one isochronous packet once every three cycles.

After that, by switching the data transfer method of the variable cycle node, the remaining band for isochronous transfer increases. Therefore, the DVCR 4 makes a band reservation request to the TV 1 which is the IRM and transfers the band (1480 BW).
U) can be secured and a new isochronous transfer can be started.

(D) Operation Flow (d-1) Operation Flow of Node Having IRM Function of Present Invention FIG. 5 is a diagram showing an operation flow of node having IRM function of the present invention. It is assumed that the node having the IRM function of the present invention becomes the IRM after the bus reset.

First, the control unit 31 of the node having the IRM function judges whether or not there is a read request to the BANDWIDTH_AVAILABLE register from each node connected on the 1394 serial bus (step S101), and the read request is issued. In some cases, it is not the actual value of the BANDWIDTH_AVAILABLE register (actual remaining bandwidth amount) but a false value (indicating that all isochronous bandwidths remain 4915BW.
A read response is sent to the node which has requested read (U) (step S102). A false value is returned in response to a read request to the BANDWIDTH_AVAILABLE register, when the actual value is returned to the read requesting node, the read requesting node determines that the band for isochronous transfer cannot be secured. This is to prevent it.

In step S101, BANDWIDTH_AVAILABL
If there is no read request to the E register, IRM is 139
4 BANDWIDTH_AVAILABLE from each node on the serial bus
It is determined whether or not there is a lock request for securing the bandwidth by the lock transaction to the register (step S1
03), if there is no bandwidth reservation request, the process exits.

On the other hand, when there is a bandwidth reservation request from the node on the 1394 serial bus, it is judged whether or not the requested bandwidth has been reserved (step S104). Specifically, it can be determined whether or not the value of the BANDWIDTH_AVAILABLE register has been rewritten by the lock request. In addition, by analyzing the lock request to the BANDWIDTH_AVAILABLE register, the amount of bandwidth that the node that made the lock request tried to secure can be known.

In step S104, if the band can be secured, the process is skipped. If the band cannot be secured, 139
4 Among the nodes transmitting the isochronous data on the serial bus, the cycle variable node of the present invention is searched (step S105). Which node on the 1394 serial bus is transmitting isochronous data determines whether or not the plug control register (PC
R), and whether or not the node transmitting isochronous data is a cycle variable node can be determined by referring to the private space assigned to each node.

Next, the band secured for each node transmitting isochronous data on the 1394 serial bus is calculated (step S106). Specifically, the data transmission channel, transfer speed, communication overhead, and Isochronous packet payload size can be known by referring to the plug control register (PCR) of the node transmitting the isochronous data. The bandwidth amount secured for each node transmitting isochronous data is calculated from the value.

Subsequently, step S105 and step S10.
Based on the information of the cycle variable node acquired in 6 and the secured bandwidth amount of each node, the bandwidth amount required when the method of transferring the isochronous data of the cycle variable node is switched is less than the total bandwidth for isochronous node. It is determined whether or not there is (step S107). Specifically, among the variable cycle nodes, pay attention to the node that uses the maximum bandwidth, refer to the output plug control register (oPCR) of that node, read the isochronous packet payload size, and multiply it by N. Then, the required bandwidth when the isochronous packet is generated is calculated. Here, N is the number of cycle variable nodes transmitting isochronous data on the bus. The total of the calculated bandwidth and the bandwidth required by the cycle fixed node (conventional node) transmitting the isochronous data is calculated. It is determined whether or not the value obtained by adding the calculated band amount and the band amount to be secured for new transfer is equal to or less than the entire band for isochronous transfer (4915 BWU or less).

In step S107, if the calculated bandwidth is larger than the total bandwidth for isochronous transfer, the new isochronous transfer is abandoned and the processing is terminated. On the other hand, if the calculated bandwidth is smaller than the total bandwidth for isochronous transfer, the IRM has BANDWAIDTH_A
The value of the VAILABLE register is rewritten to a value obtained by subtracting the total bandwidth calculated in step S107 from the total bandwidth value for isochronous transfer (4915BWU) (step S10).
8), the number of cycles is N and the number of data connections is N for the cycle variable node transmitting isochronous data.
An instruction to switch the isochronous data transfer method is transmitted individually (N is the number of cycle variable nodes transmitting isochronous data) (step S109).

(C-2) Operation Flow of Cycle Variable Node FIG. 6 is a diagram showing an operation flow of the cycle variable node of the present invention. The cycle variable node always determines whether or not there is an isochronous transfer method switching instruction from the isochronous resource manager (IRM) (step S2).
01), if there is no transfer method switching instruction, normal isochronous transfer (isochronous packet transmission once per cycle) is performed (step S202).

When the transfer switching instruction from the IRM is received in step S201, the control unit 22 of the cycle variable node determines, based on the data coupling number (N) and the data transfer cycle number (N) included in the transfer switching instruction. Once every N cycles, the transfer method is switched so that data obtained by combining N pieces of data is generated as one isochronous packet and sent out on the 1394 bus (step S20).
3). Specifically, the cycle variable node is the counter 2
1 counts up every cycle, and the isochronous packet is set to 1 when the counter value becomes N.
Send one. This isochronous packet is a FIFO
The N pieces of data stored in the memory 23 are combined, and an isochronous header, a header CRC, a data CRC, etc. are added to the combined data to form one isochronous packet.

When there are a plurality of variable data transmission nodes connected to the 1394 bus, the order in which data transmission is performed may be indicated by the IRM, for example, in order of increasing node numbers. The cycle variable node sends out one isochronous packet in N cycles according to the instructed transfer order. As the channel for transmitting the isochronous packet, the channel used before switching the transfer method can be used as it is after switching the transfer method.

In order for the IRM to instruct each cycle variable node to switch the isochronous data transfer method, it is desirable to instruct by a broadcast of asynchronous transfer. In this way, each cycle variable node can easily determine the transmission cycle of its own isochronous packet with reference to the cycle in which the transfer method switching signal from the IRM is received. If the transfer method switching instruction includes the transfer switching reference value for each cycle variable node, the count start of the counter 21 can be represented by the reference value from the cycle in which the cycle transfer method switching signal is broadcast. It becomes easy to set for each cycle variable node. The counter 21 counts up once per cycle, and the control unit 22 combines N pieces of data stored in the FIFO memory 23 to generate one isochronous packet at the time when the counter value becomes N. The counter value may be reset and the counter value may be incremented again from the next cycle.

By doing the above, the number (N-1) of isochronous gaps, (N-1) arbitration times, (N-1), which is one less than the number of data combinations (N), are obtained. The bandwidth of the isochronous header of can be reduced. Since it becomes possible to secure a band for newly performing isochronous transfer with the increased residual band in this way, it becomes possible to secure a band necessary for a node that newly performs isochronous transfer.

In the description of the above embodiment, the data transferred in the isochronous communication is explained as an example of the data in the DV format, but other data such as MPEG2-TS or A / M protocol (Audio and Music protocol) is used. It goes without saying that the present invention can be applied even to a data format. Although the present invention has been described with reference to the embodiments, the present invention can be modified in various ways according to the gist of the present invention described in the claims, and the present invention does not exclude this.

[0128]

As described above, according to the present invention, when the band required by a node which newly attempts isochronous transfer is larger than the remaining band for isochronous transfer, the node having the band management function The optimum transfer cycle is calculated from the number of cycle variable nodes above and the required bandwidth of each isochronous data transmission node, and the transfer method is switched by instructing each cycle variable node to switch the transfer method. Even if the bandwidth is small, it is possible to newly perform isochronous transfer as much as possible and to effectively use resources.

[Brief description of drawings]

FIG. 1 is a schematic explanatory view of the present invention.

FIG. 2 is a diagram showing a configuration of a cycle variable node of the present invention.

FIG. 3 is a diagram showing a configuration of a node having an IRM function of the present invention.

FIG. 4 is a diagram for explaining one embodiment of the present invention.

FIG. 5 is a diagram showing an operation flow of a node having an IRM function of the present invention.

FIG. 6 is a diagram showing an operation flow of the cycle variable node of the present invention.

FIG. 7 is an example of a network system configured using an IEEE 1394 serial bus.

FIG. 8 is a diagram showing a configuration example of a 1394 interface.

FIG. 9 is an explanatory diagram of services provided by a link layer.

FIG. 10 is an explanatory diagram of services provided by a transaction layer.

FIG. 11 is an explanatory diagram of an address space in the 1394 serial bus.

FIG. 12 is an explanatory diagram of CSR core registers and functions.

FIG. 13 is an explanatory diagram of a serial bus register.

FIG. 14 is an explanatory diagram of a minimum format configuration ROM.

FIG. 15 is an explanatory diagram of a general format configuration ROM.

FIG. 16 is a diagram showing information and addresses stored in a serial bus register in a unit space.

FIG. 17 is a sectional view of a communication cable conforming to the IEEE 1394 standard.

FIG. 18: D / S-Link (Data / Strobe
It is explanatory drawing of a Link system.

FIG. 19 is a diagram illustrating a state after a bus reset is activated in the 1394 network.

FIG. 20 is a flowchart showing a procedure from the start of bus reset to node ID allocation in the 1394 network.

FIG. 21 is a flowchart illustrating a detailed example of parent-child relationship determination processing.

FIG. 22 is a flowchart showing a detailed example of node ID allocation processing.

FIG. 23 is a diagram showing a structure of a self ID packet.

FIG. 24 is an explanatory diagram of arbitration in the 1394 network.

FIG. 25 is a diagram showing a state in which an isochronous transfer mode and an asynchronous transfer mode are mixed in one period of a communication cycle.

FIG. 26 is a diagram showing a format of an isochronous packet.

FIG. 27 is a diagram showing a format of a CHANNELS_AVAILABLE register.

FIG. 28 is a diagram showing a format of a BANDWIDTH_AVAILABLE register.

FIG. 29 is a diagram showing a format of an asynchronous packet.

FIG. 30 is a diagram showing an address map of a plug control register (PCR).

FIG. 31 is an explanatory diagram of formats and fields of a plug control register (PCR).

[Explanation of symbols]

20 ... Cycle variable node 21 ... Counter 22 ... Control unit 23 ... FIFO memory 24 ... IEEE 1394 interface 30 ... Node having IRM function 31 ... Control unit 32 ... Band Management memory 33 ... Optimal transfer cycle calculation unit 34 ... IEEE 1394 interface 35 ... BANDWITH_AVAILABLE register

Claims (6)

[Claims] 1. A serial bus system which secures a part of a transmission band of the serial bus prior to communication between a plurality of devices connected to the serial bus and performs communication based on the secured transmission band, A transmission band management device that manages the transmission band of the serial bus and a variable data transmission cycle device that can change the data transmission cycle are provided. A bandwidth management unit that manages, a unit that detects the data transmission cycle variable device among a plurality of devices connected to the serial bus, and a band that each device secures from the transmission band of the serial bus is optimal. Means for calculating the data transmission cycle of the variable data transmission cycle device, and the optimum transmission calculated by the calculating means A transmission cycle switching instruction means for determining a bandwidth to be secured from the transmission bandwidth of the serial bus based on the cycle, securing the bandwidth by the bandwidth management means, and for instructing the data transmission cycle variable device to switch the transmission means; The variable data transmission cycle device comprises: a first data transmission unit that sends out data for one data unit as one transmission packet for each cycle; and a data unit for a plurality of data units as one transmission packet for every plurality of cycles. Second data transmission means for transmitting to the second data transmission means, and transmission means switching means for switching the first data transmission means and the second data transmission means in response to a transmission means switching instruction from the transmission band management device. A serial bus system characterized by that. 2. The transmission band of the serial bus is I
The serial bus system according to claim 1, wherein the band is for isochronous communication of the EEE1394 standard. 3. A transmission band of a serial bus system which secures a part of a transmission band of the serial bus prior to communication between a plurality of devices connected to the serial bus and performs communication based on the secured transmission band. In a management device, a band management unit that manages a secured state of a transmission band of the serial bus; a unit that detects a data transmission cycle variable device among a plurality of devices connected to the serial bus; Means for calculating the data transmission cycle of the data transmission cycle variable device in which the band secured by each device is optimum from the transmission band possessed by the device, and the serial bus having the serial bus based on the optimum transmission cycle calculated by the calculating device. A band to be secured is determined from the transmission band, the band is secured by the band management means, and the data transmission Transmission band management apparatus of a serial bus system, characterized in that a transmission cycle switching instruction means for instructing the transmission unit switches to the cycle variable device. 4. The transmission band management device is IEEE139
4. The transmission band management device according to claim 3, which has an isochronous resource manager function in isochronous communication of four standards. 5. A communication device of a serial bus system, which secures a part of a transmission band of the serial bus prior to communication between a plurality of devices connected to the serial bus, and performs communication based on the secured transmission band. In, a first data transmitting means for transmitting data for one data unit as one transmission packet for each cycle, and a second data transmitting means for transmitting data for a plurality of data units as one transmission packet for every plurality of cycles And a transmission means switching means for switching between the first data transmission means and the second data transmission means in response to a transmission means switching instruction from a transmission bandwidth management device that manages the bandwidth of the serial bus. A communication device characterized by the above. 6. The communication device according to claim 5, wherein the communication device has an isochronous communication function of the IEEE 1394 standard.