JP2001275066A - Image processor, and its method and storage medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that there do not exist criteria for deciding the use of which device for which processing is more efficient for printing when each of the devices has a series of processing functions. SOLUTION: When direct printing is carried out between an image supply device such as a digital camera 101 connected by a 1394 serial bus 103 and a printing device such as a printer 102, the devices are adaptively put in partial charge of image processing according to the relation among the processing capability by image processing functions that the devices have, data size, and data transfer rates, so that the direct printing is performed with efficiency.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus and method, and a storage medium, and more particularly, to an image processing apparatus and method between devices connected by a serial bus.

[0002]

2. Description of the Related Art To print an image captured by a digital camera, the image data is transferred to a personal computer via a serial interface such as RS-232C or a memory card, and the image data is transferred to the printer by the personal computer. Processing that matches the printing format is performed, and parallel interfaces such as Centronics and USB (Univ.
It is necessary to have a procedure of sending print data to a printer via a serial interface such as ersal Serial Bus) for printing.

When a user of a digital camera already owns a personal computer, a general system configuration is used in which image processing is performed using necessary application software and printing is performed using a printer connected to the personal computer. is there. However, if you purchase a digital camera but do not own a personal computer, there is no way to print the captured image, so you connect the digital camera to the video terminal of your home TV and watch the captured image on the TV screen. Can only be used.

[0004] For a user of such a digital camera, there is a printer system in the form of a video printer. This printer system transfers image data directly from a digital camera to a printer using a proprietary serial interface, infrared interface, or memory card without using a personal computer, and performs image processing inside the printer. To print. Note that transferring image data to a printer for printing without a personal computer is called “direct printing”.

[0005]

A print system for performing direct printing is a JPEG (Joint Photographics E).
A device (digital camera or printer) needs to perform a process of converting the compressed image data into print data, and the printing time greatly depends on the data processing capability of the device.

For example, in a general-purpose printer, it is assumed that a process of converting image data into print data unique to the printer is performed by a personal computer, so that the printer has a high data processing capability. It is a specification that prioritizes cost.

[0007] In a printer supporting direct printing, in order to increase the processing capacity for converting image data into print data, the speed of the CPU mounted on the printer is increased, and
Functions such as distributed processing using a plurality of PUs and increasing the data size that can be converted at a time by increasing the capacity of the built-in memory are required.

Further, it is necessary that an image supply device (for example, a digital camera) compatible with direct printing has a function of creating print data. However, a general-purpose digital camera or the like has a sufficiently high capability for image data compression, decompression and display functions, but does not have a very high capability for creating print data.

[0009] Furthermore, when an individual device supporting direct printing has a series of processing functions, there is no standard at present for determining which device should perform which processing to perform efficient printing. There is also.

The present invention has been made to solve the above-described problem, and has as its object to perform efficient image processing by sharing image processing among individual devices.

[0011]

The present invention has the following configuration as one means for achieving the above object.

An image processing apparatus according to the present invention is an image processing apparatus for supplying data to a printing apparatus connected by a serial bus, comprising: an image processing unit for converting image data into print data; Determining means for determining the division of the image processing among them.

An image processing apparatus for receiving data supplied from a data supply device connected by a serial bus, the image processing means for converting image data into print data, And determination means for determining the sharing of the information.

An image processing method according to the present invention is an image processing method for supplying data to a printing device connected by a serial bus, wherein each step of image processing for converting image data into print data is performed by the printing device. It is characterized by sharing between.

An image processing method for receiving data from a data supply device connected by a serial bus, wherein each step of image processing for converting image data into print data is shared between the data supply device and the data supply device. It is characterized by doing.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a data transfer method according to an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing a general configuration example of a system to which the present invention is applied. A digital camera 101 and a printer 102 are connected to an IEEE1394-1995 standard serial bus (hereinafter referred to as “13”).
94 serial bus). Therefore, the outline of the IEEE1394-1995 standard (hereinafter referred to as “IEEE1394 standard”) will be described first.

For details on the IEEE 1394 standard, see
On August 30, 1996, IEEE (The Institute of Electrical an
d Electronics Engineers, Inc.)
Standard for a High Performance Serial Bus.

The digital camera 101 and the printer 102 are not limited to the 1394 serial bus but are connected to the USB serial bus.
May be tied.

[Overview] FIG. 2 shows a digital interface (hereinafter, “1394 interface”) based on the IEEE1394 standard.
FIG. 1 is a diagram illustrating a configuration example of a communication system (hereinafter, referred to as a “1394 network”) configured by nodes including the following. The 1394 network constitutes a bus type network capable of serial data communication.

In FIG. 2, the nodes A to H correspond to the IEEE1394
It is connected via a communication cable conforming to the standard.
These nodes A to H are, for example, PC (Personal Computing).
er), digital VTR (Video Tape Recorder), DVD (Digit
al Video Disc) Electronic devices such as players, digital cameras, hard disks and monitors.

The connection method of the 1394 network corresponds to the daisy chain method and the node branch method, and connection with a high degree of freedom is possible.

In the 1394 network, for example, when an existing device is separated from the network, a new device is added to the network, or the power of the existing device is turned on / off, a bus reset is automatically performed. Will be By this bus reset, the 1394 network can automatically recognize a new network connection configuration and assign ID information to each device.
In other words, this function allows the 1394 network to always recognize the network connection configuration.

Further, the 1394 network has a function of relaying data transferred from another device. With this function, all devices can grasp the operation status of the 1394 serial bus.

The 1394 network has a function called "Plug &Play". With this function, the 1394 network is automatically connected only by connecting the devices to the network without turning off the power of all the devices connected to the network. Recognize the device

The 1394 network is 100/200 / 400M
Supports bps data transfer speed. A device having a higher data transfer rate can support a lower data transfer rate, so that devices corresponding to different data transfer rates can be connected to each other.

In addition, the 1394 network uses two different data transfer schemes (ie, asynchronous
ronous, asynchronous transfer mode and isochronous (Is
ochronous (synchronous) transfer mode. The asynchronous transfer mode is effective when transferring data required to be transferred asynchronously as necessary, that is, when transferring control signals and data files. In addition, the isochronous transfer mode is effective when transferring data required to continuously transfer a predetermined amount of data at a fixed data rate, that is, video data, audio data, and the like.

The asynchronous transfer mode and the isochronous transfer mode can be mixed in each communication cycle (normally, one cycle is 125 μS).
Each transfer mode is executed after transfer of a cycle start packet (CSP) indicating the start of a cycle. In each communication cycle period, the isochronous transfer mode is
The priority is set higher than the asynchronous transfer mode. The transfer band in the isochronous transfer mode is guaranteed in each communication cycle.

[Architecture] FIG. 3 is a diagram for explaining the components of the 1394 interface.

The 1394 interface is functionally composed of a plurality of layers. 1394 interface is IEEE
It is connected to a 1394 interface of another node via a communication cable 301 conforming to the 1394 standard. Further, the 1394 interface has one or more communication ports 302, and the communication ports 302 are connected to a physical layer 303 included in hardware.

The hardware is composed of a physical layer 303 and a link layer 304. The physical layer 303 performs a physical and electrical interface with another node, detection of a bus reset and processing associated therewith, encoding / decoding of input / output signals, arbitration of a bus use right, and the like.
Further, the link layer 304 generates and transmits and receives communication packets, controls a cycle timer, and the like.

In FIG. 3, the firmware is
It includes a transaction layer 305 and a serial bus management 306. Transaction layer 305
Manages the asynchronous transfer mode and provides various transactions (read, write and lock). The serial bus management 306 provides a function of controlling its own node, managing the connection state and ID information of its own node, and managing resources of the 1394 network based on a CSR architecture described later.

The above-described hardware and firmware substantially constitute a 1394 interface, and their basic structure is defined by the IEEE1394 standard.

The application layer 307 included in the software differs depending on the application software used and controls how data is communicated on the 1394 network. For example, digital
In the case of VTR moving image data, a communication protocol such as the AV / C protocol is specified.

Link Layer FIG. 4 is a diagram showing services that the link layer 304 can provide.

The link layer 304 provides the following four services. Note that the link response (LK_DATA.response) does not exist when transmitting the broadcast communication and the isochronous packet. (1) Link request (LK_DATA.request) Request the transfer of a predetermined packet to the response node (2) Link notification (LK_DATA.indication) Notify the response node of the reception of the predetermined packet (3) Link response (LK_DATA.response) Send acknowledgment from responding node (4) Link confirmation (LK_DATA.confirmation) Notify requesting node of acknowledgment reception

The link layer 304 realizes the above-described two types of transfer systems, that is, the asynchronous transfer mode and the isochronous transfer mode, based on the above-described service.

[Transaction Layer] FIG. 5 is a diagram showing services that the transaction layer 305 can provide.

The transaction layer 305 provides the following four services. (1) Transaction request (TR_DATA.request) Requests a predetermined transaction to the response node (2) Transaction notification (TR_DATA.indication) Notifies the response node of the reception of the predetermined transaction request (3) Transaction response (TR_DATA.response ) Transaction status information from responding node (including data in case of write / lock) (4) Transaction confirmation (TR_DATA.confirmation) Notify request node of receipt of transaction status information

The transaction layer 305 manages asynchronous transfer based on the service described above, and realizes the following three types of transactions, namely, a read transaction, a write transaction, and a lock transaction. (1) Read transaction: request node reads information stored at specific address of responding node (2) Write transaction: request node writes predetermined information to specific address of responding node (3) Lock transaction: from request node Transfer the reference data and the update data to the response node, compare the information of the specific address of the response node and the reference data,
Rewrite the information of the specific address to the update data according to the comparison result

Serial Bus Management The serial bus management 306 provides the following three functions. (1) Node control: manages each layer described above and provides a function to manage asynchronous transfer performed with another node. (2) Isochronous resource manager (IRM): between other nodes Provides a function to manage the executed isochronous transfer. (3) Bus manager: Provides IRM functions and provides more advanced bus management functions than IRM

The IRM specifically manages information necessary for assigning a transfer bandwidth and a channel number, and provides such information to other nodes. The IRM exists only on the local bus, and is dynamically selected from other candidates (nodes having an IRM function) each time the bus is reset. In addition, the IRM may provide some of the functions (such as connection configuration management, power management, and speed information management) that can be provided by the bus manager.

More specifically, the bus manager has a function of performing higher-level management, optimizing the 1394 serial bus based on the management information, and providing the information to other nodes. More advanced management means managing information on a node-by-node basis, such as whether power can be supplied via a communication cable and whether power supply is required (advanced power management). It is to manage the maximum transfer speed between them (advanced speed information management) and to create a topology map (advanced connection configuration management).

The bus manager can provide services for controlling the 1394 network to the application. There are three types of this service: (1) Serial bus control request (SB_CONTROL.request) Service where the application requests a bus reset. (2) Serial bus event control confirmation (SB_CONTROL.confirm
ation) Service to confirm serial bus control request to application (3) Serial bus event notification (SB_CONTROL.indication)
Service that notifies applications of events that occur asynchronously

[Address Specification] FIG. 6 is a diagram for explaining an address space in the 1394 interface. Note that 13
94 interface is CSR based on ISO / IEC 13213: 1994
According to the (Command and Status Register) architecture, a 64-bit address space is specified.

In FIG. 6, the first 10-bit field 601 is used for a number specifying a predetermined 1394 serial bus, and the next 6-bit field 602 is used for a number specifying a predetermined device (node). . These upper 16 bits are called "node ID", and each node identifies another node by this node ID. In addition, each node
Communication that identifies the other party using the ID can be performed.

The remaining 48-bit field corresponds to an address space (256-Mbyte structure) provided in each node, and a 20-bit field 603 of the field specifies a plurality of areas constituting the address space. "603" in field 603
The area from “0xFFFFD” to “0xFFFFD” is a memory space, and the area from “0xFFFFE” is called a private space and is an address space that can be used freely by each node. Also, "0xFFFFF"
This area is called a register space, and stores common information between nodes connected to the bus. Each node can manage communication between the nodes by using information stored in the register space.

The last 28-bit field 604 specifies an address where common or unique information is stored in each node. For example, in the register space, the first 512 bytes are the core of the CSR architecture (CSR core).
Used as a register. FIG. 7 shows addresses and functions of information stored in the CSR core register. The offset value shown in FIG. 7 is a relative position from “0xFFFFF0000000”.

The next 512 bytes are used as a register for the serial bus. FIG. 8 shows addresses and functions of information stored in the serial bus register. The offset value shown in FIG. 8 is a relative position from “0xFFFFF0000200”.

The next 1024 bytes are the configuration (C
onfiguration) Used for ROM. The configuration ROM allocated from "0xFFFFF0000400" has a minimum format and a general format. Minimal form of configuration
FIG. 9 shows the configuration of the ROM. In FIG. 9, the vendor ID is IEE
This is a 24-bit numerical value uniquely assigned to each vendor by E. FIG. 10 shows the configuration of a general configuration ROM. In FIG. 10, the above-mentioned vendor ID is stored in the Root Directory 1002. Bus
The Info Block 1001 and the Root Leaf 1005 can hold a node unique ID as unique ID information for identifying each node.

The node unique ID is defined so as to determine a unique ID capable of specifying one device regardless of a maker or a model. The node unique ID is composed of 64 bits, the upper 24 bits indicate the above-mentioned vendor ID, and the lower 48 bits indicate information that can be freely set by the manufacturer of each device (for example, a device serial number). The node unique ID is used, for example, when a specific device is continuously recognized before and after a bus reset.

The Root Directory 1002 shown in FIG. 10 can hold information on basic functions of the device. For detailed function information, refer to Root Directory1002
Subdirectory Unit Directori offset from
Stored in es1004. In the Unit Directories 1004, for example, information on software units supported by the device is stored. Specifically, information on a data transfer protocol for performing data communication between nodes, a command set for defining a predetermined communication procedure, and the like are stored.

The Node Dependent Info Di shown in FIG.
Rectory1003 can hold device-specific information. Node Dependent Info Directory1003
Is offset by the Root Directory 1002.

Further, Vendor Dependent Inf shown in FIG.
The ormaton 1006 can hold information unique to the vendor that manufactures or sells the node.

The remaining area of the field 604 shown in FIG. 6 is called a unit space, and stores information unique to each device, for example, identification information of each device (such as company name and model name) and use conditions. Specify an address. FIG. 11 shows addresses and functions of information stored in the serial bus device register in the unit space. The offset value shown in FIG. 11 is a relative position from “0xFFFFF0000800”.

In general, when it is desired to simplify the design of a heterogeneous bus system, each device should use only the first 2048 bytes of the unit space. That is, 2048 bytes of CSR core register, serial bus register and configuration ROM, and the first 204 bytes of unit space
It is desirable to configure 4096 bytes including 8 bytes.

[Communication Cable] FIG. 12 is a sectional view of a communication cable conforming to the IEEE1394 standard.

The communication cable is composed of two twisted pair signal lines and a power supply line. By providing a power line in the communication cable, the 1394 interface can supply power to a device whose main power is off, a device whose power has been reduced due to a failure, and the like. The DC power that can be supplied by the power line is 8 to 40 V, up to 1.
5A is specified.

The two twisted pair signal lines are connected to DS-Link (Da
The information signal encoded by the ta / Strobe Link) encoding method is transmitted. FIG. 13 is a diagram for explaining the DS-Link encoding method.

The DS-Link encoding method is suitable for high-speed serial data communication, and its configuration requires two twisted pair signal lines. One set of signal lines carries data signals and the other set carries strobe signals. The receiving side can generate the clock by taking the exclusive OR of the data signal and the strobe signal received by the two sets of signal lines. 139 using DS-Link encoding
The four interfaces have the following advantages, for example. (1) Higher transfer efficiency than other encoding methods (2) No need for a PLL (Phase Locked Loop) circuit, making it possible to reduce the circuit size of the controller LSI (3) No need to transmit a signal indicating an idle state It is easy to put the transceiver circuit in the sleep state, and the power consumption can be reduced.

[Bus Reset] Each node (correctly, the 1394 interface of the node) can automatically detect that a change has occurred in the network connection configuration.
In this case, the 1394 network performs a process called a bus reset according to the following procedure. A change in the connection configuration is detected by a change in a bias voltage applied to a communication port provided in each node.

A node that detects a change in the network connection configuration, for example, an increase or decrease in the number of nodes due to insertion / removal of a node, power on / off of a node, or the like, or a node that needs to recognize a new connection configuration is a 1394 interface. , A bus reset signal is transmitted to the 1394 serial bus.

The node which has received the bus reset signal transmits the occurrence of the bus reset to its own link layer 304 and transfers the bus reset signal to another node. The node that has received the bus reset signal clears the network connection configuration and the node ID assigned to each device that have been recognized so far. After all the nodes finally detect the bus reset signal, each node automatically performs initialization processing associated with the bus reset, that is, recognition of a new connection configuration and assignment of a new node ID.

It should be noted that the bus reset is activated not only by the change in the connection configuration as described above, but also by the host side controlling the application layer 307 by directly issuing a command to the physical layer 303. There is also. Further, when the bus reset is activated, the data transfer is temporarily suspended, and after the initialization processing accompanying the bus reset is completed, the data transfer is resumed under a new network connection configuration.

Sequence of Bus Reset As described above, after the bus reset is activated, each node automatically executes recognition of a new connection configuration and assignment of a new node ID. Hereinafter, a basic sequence from the start of the bus reset to the assignment of the node ID will be described with reference to FIGS.

FIG. 14 is a diagram for explaining a state after activation of the bus reset in the 1394 network shown in FIG. Figure
At 14, the communication ports of each node are nodes A, E and
F is one, nodes B and C are two, and node D is three. Each communication port is assigned a port number for identifying each port.

Hereinafter, the process from the start of the bus reset to the assignment of the node ID in the network connection configuration shown in FIG. 14 will be described with reference to the flowchart shown in FIG.

In step S1501, each of the nodes A to F constituting the 1394 network constantly monitors the occurrence of a bus reset, and outputs a bus reset signal from the node that detects a change in the connection configuration. Execute the processing of

When a bus reset occurs, step S150
In step 2, each node declares a parent-child relationship between the communication ports provided by each node. Declaration of parent-child relationship is a step
This processing is repeated until it is determined in S1503 that the parent-child relationship between all ports is determined.

When the parent-child relationship between all the ports is determined, in step S1504, a node for arbitrating the network, that is, a route is determined. Next, step S150
In step 5, the 1394 interface of each node
Perform the task of setting D automatically. The setting of the node ID is repeated until it is determined in step S1506 that the node IDs of all the nodes have been set.

When the node IDs of all the nodes have been set, in step S1507, each node executes data transfer by isochronous transfer or asynchronous transfer. Although FIG. 15 describes that the process of step S1501 is performed after the process of step S1507 is completed, correctly, each node executes the data transfer of step S1507 and generates a bus reset in step S1501. Will be monitored. Then, when a bus reset occurs, each node stops data transfer and proceeds to step S150
After executing the processing from S2 to S1506, data transfer is restarted under the new connection configuration.

According to the above procedure, the 1394 interface of each node can automatically recognize a new connection configuration and assign a new node ID every time a bus reset occurs.

FIG. 16 is a flowchart showing in detail the declaration of the parent-child relationship in step S1502, that is, the process of recognizing the parent-child relationship between the ports.

In step S1601, each node checks the connection state of its own communication port, that is, whether it is connected or not connected, and checks the communication port (hereinafter referred to as “connection port”) connected to another node. Count the number. Next, the number of connection ports is determined in step S1602, and the node having the number of connection ports of “1” determines that it is “leaf” in step S1603.
Is recognized. A leaf is a node connected to only one other node.
A, E and F are leaves. Leaf step S1604
Declares that "I am a child" to the node connected to the connection port. At this time, the leaf recognizes the connection port as a “parent port” which is a communication port connected to the parent node.

The declaration of the parent-child relationship is first made between the leaf at the end of the network and the “branch”, which is a node having a connection port number of “2” or more. Done in The parent-child relationship between the communication ports is determined in order from the communication port that has declared earlier. A communication port that has declared a child is recognized as a “parent port”, and a communication port that has received the declaration is recognized as a “child port” that is a communication port connected to a child node. For example, in FIG. 14, nodes A and E
After recognizing that they are leaves, F and F declare a parent-child relationship, and the nodes AB, ED, and FD are determined to be “child-parent”.

On the other hand, the node having the number of connection ports of “2” or more recognizes itself as a branch in step S1605. In step S1606, the branch receives a declaration of a parent-child relationship from the node connected to the connection port. The connection port that has received the declaration is recognized as a “child port” as described above. After recognizing one connection port as a “child port”, the branch checks the number of connection ports for which the parent-child relationship has not yet been determined (hereinafter referred to as “undefined port”) in step S1607, and determines the number of undefined ports. If the number is two or more, the reception of the parent-child relationship declaration in step S1606 is repeated.

When the number of undefined ports becomes “1” or less, the branch recognizes the communication port as “parent port” in step S1609 if the number of undefined ports is “1” as determined in step S1608. Then, "I am a child" is declared to the node connected to the communication port. The branch is
Until the number of undefined ports becomes "1", a parent-child relationship cannot be declared. For example, in FIG. 14, nodes B, C and D recognize that they are branches,
Accept declarations of parent-child relationships from leaves or other branches. Node D can declare a parent-child relationship to node C after the parent-child relationship between DEs and DFs is determined. Then, the node C that has received the parent-child relationship declaration from the node D can declare the parent-child relationship to the node B.

If there is no undefined port at the time of the determination in step S1608, that is, if all the connection ports of the branch have become “child ports”, the branch determines in step S1610 that it is the “root” Recognize that there is. For example, in FIG. 14, a node B in which all of the connection ports are parent ports is recognized by another node as a route for mediating communication on the 1394 network. Figure
FIG. 14 shows an example in which the node B is determined as the root. However, depending on the timing at which the node B declares the parent-child relationship, another branch or leaf may become the root.
In other words, depending on the connection configuration and the timing of declaring the parent-child relationship, any node may become the root,
Even if the connection configuration is the same, the same node is not always the root.

When the parent-child relationship of all connection ports is declared in this way, each node proceeds to step S1611
Thus, the connection configuration of the 1394 network can be recognized as a hierarchical structure (tree structure). Note that the parent node is higher in the hierarchical structure, and the child node is lower in the hierarchical structure.

FIG. 17A and FIG. 17B are flowcharts showing in detail the process of setting the node ID in step S1505, that is, the process of allocating the node ID to each node. FIG. 17A shows a route process, and FIG. The processing is shown. The node ID is composed of the bus number and the node number as described above. In the present embodiment, it is assumed that each node exists on the same bus and the same bus number is assigned to each node. .

In the root, in step S1701, the node ID setting permission is given to the node connected to the communication port having the smallest port number among the child ports to which the node whose node ID is not set is connected. Then the route is step
In S1702, it is determined whether or not the node IDs of all the nodes connected to the child ports have been set, and if there is an unset node, step S1701 is repeated. In other words, after setting the node IDs of all the nodes connected to the communication port having the lowest port number, the root sets the child ports to the node IDs, and then connects to the communication port with the next lower port number. The same control is performed for the node.

When the node IDs of all the nodes connected to the child ports are finally set, the root is set to step S1703.
To set its own node ID, and in step S1704, it broadcasts a self-ID packet described later. Note that the node numbers included in the node ID are basically assigned 0, 1, 2,... In the order of leaf and branch. Therefore, the route will have the highest node number.

On the other hand, the node that has obtained the node ID setting permission from the root determines in step S1711 whether or not there is a child port including a node whose node ID has not been set. Gives the node ID setting permission to the node connected to the child port in step S1712. Here, the node that has obtained the node ID setting permission also executes the processing of FIG. 17B.

Then, in step S1713, the node again determines whether or not there is a child port including a node whose node ID has not been set. Node ID in step S1711 or S1713
If it is determined that there is no child port including an unset node, the node sets its own node ID in step S1714, and in step S1715, stores information about its own node number and the connection state of the communication port. Broadcast the self ID packet including.

The broadcast means transferring a communication packet of a certain node to all of the unspecified number of other nodes constituting the 1394 network. By receiving the self ID packet, each node can recognize the node number assigned to each node, and can know the node number that can be assigned to itself.

For example, in FIG. 14, the root node B first grants the node ID setting permission to the node A connected to the communication port with the smallest port number # 0.
Node A assigns "0" as its node number,
After setting its own node ID, it broadcasts a self ID packet containing that node ID.

Next, the root gives node C setting permission to node C connected to the communication port of port number # 1. Node C gives node D setting permission to node D connected to communication port with port number # 2, and node D sets node ID for node E connected to communication port with port number # 0 Give permission. Node E of Node E
When D is set, the node D gives node F setting permission to the node F connected to the communication port with the port number # 1. Although the description is omitted below, the node IDs of all the nodes are set in such a procedure.

FIG. 18 is a diagram showing a configuration example of a self ID packet.

Reference numeral 1801 denotes a field for storing the node number of the node which has transmitted the self ID packet; 1802, a field for storing information on a transfer rate that can be supported; 1803
Is a field indicating the presence or absence of a bus management function (such as the presence or absence of a bus manager's capability), and 1804 is a field for storing information on characteristics of power consumption and supply. 1805 to 1807 are fields for storing information (connection, non-connection, parent-child relationship of communication ports, and the like) relating to the connection status of the communication ports of port numbers # 0 to # 2.

If the node transmitting the self ID packet has the ability to become a bus manager, the contender bit shown in the field 1803 is set to “1”; otherwise, the contender bit is set to “0”.

Bus Manager The bus manager is a node that performs the following management based on various types of information included in the self ID packet. With these functions, the node that becomes the bus manager can manage the bus of the entire 1394 network. (1) Bus power management: manages information such as whether power can be supplied via a communication cable and whether power supply is required for each node. (2) Speed information management: Manages the maximum transfer rate between nodes from information on transfer rates that can be supported. (3) Manages topology map information: Manages network connection configuration from communication port parent-child relationship information. (4) Bus based on topology map information (5) Provide the above information to other nodes

After setting the node ID, if a plurality of nodes have the bus manager capability, the node having the largest node number becomes the bus manager. Therefore, if the route with the highest node number has the capability of a bus manager, the route becomes the bus manager. However, if the route does not have the bus manager capability, the node having the next highest node number after the route and having the bus manager capability becomes the bus manager.

Further, which node has become the bus manager can be grasped by checking the contender bit 1803 of the self ID packet broadcast by each node.

[Arbitration] FIG. 19 is a diagram for explaining arbitration in the network configuration shown in FIG.

In the 1394 network, prior to data transfer, arbitration (arbitration) of the right to use the bus is always performed. The 1394 network is a logical bus network, and the same packet can be transferred to all nodes in the network by relaying the packet transferred from each node to another node. Therefore, arbitration is always required to prevent packet collision. Thereby, one node can perform data transfer at a certain timing.

FIG. 19A shows a state where nodes B and F are requesting the right to use the bus. When the arbitration starts, the nodes B and F each request a bus use right toward the parent node. Node C, which is the parent node receiving the request from node B, relays the request for the right to use the bus to its own parent node, node D, which is the root. That is, the request for the right to use the bus is finally delivered to the route for arbitration.

The route receiving the request for the right to use the bus determines to which node the right to use the bus is given. Arbitration can be performed only by the route, and the node that wins the arbitration is given the right to use the bus.

FIG. 19 (b) is a diagram showing a state in which the right to use the bus is given to the node F and the request from the node B is rejected.
The route for the node that lost the arbitration is
Send a DP (Data Prefix) packet to indicate that the request has been rejected. The node rejected for the request requests the right to use the bus again in the next arbitration, and waits for the use of the bus (data transfer) until the right to use the bus is given.

By performing arbitration in this manner, the root manages the use of the bus of the 1394 network.

[Communication Cycle] Within each communication cycle, the isochronous transfer mode and the asynchronous transfer mode can be mixed in a time division manner. One period of a communication cycle is typically 125 μs. FIG. 20 is a diagram for explaining a state in which the isochronous transfer mode and the asynchronous transfer mode are mixed in one communication cycle.

The isochronous transfer is executed prior to the asynchronous transfer. The reason is that after the cycle start packet (CSP), the idle period (subaction gap) required to start asynchronous transfer is the idle period (isoch necessary) to start isochronous transfer.
ronous gap). Thus, the isochronous transfer is executed prior to the asynchronous transfer.

At the start of each communication cycle, a cycle start packet (CSP) is transferred from a predetermined node. Each node can measure the same time as the other nodes by adjusting the timing using the CSP.

[Isochronous Transfer Mode] In the isochronous transfer mode, synchronous data transfer is performed. The isochronous transfer can be executed for a predetermined period after the start of the communication cycle. In the isochronous transfer mode, isochronous transfer is always performed in each cycle to maintain real-time transfer.

The isochronous transfer mode is a transfer mode suitable for transferring data that requires real-time transfer, such as moving image data and sound data including sound. The isochronous transfer mode is not a one-to-one communication as in the asynchronous transfer mode but a broadcast communication. That is, a packet transmitted from a certain node and subjected to isochronous transfer is uniformly transferred to all nodes on the network. Note that there is no ack (reception confirmation reply code) in the isochronous transfer.

In FIG. 20, channels e, s and k are:
The period during which each node performs isochronous transfer is shown. The 1394 interface gives different channel numbers to distinguish a plurality of different isochronous transfers. This enables isochronous transfer by a plurality of nodes. However, this channel number does not specify the transmission destination, but merely gives a logical number for the data.

An isochronous gap shown in FIG. 20 indicates an idle state of the bus. After a lapse of a predetermined period of time in the idle state, the node desiring the isochronous transfer determines that the bus can be used and requests the bus use right.

FIG. 21 is a diagram showing the format of a packet transmitted isochronously. In the following, a packet transferred isochronously is referred to as an “isochronous packet”. The isochronous packet has a header section 210
1, header CRC2102, data part 2103 and data CRC2104
Consists of

The header section 2101 stores a field 2105 in which the data length (data_length) of the data section 2103 is stored, a field 2106 in which format information (tag) of the isochronous packet is stored, and a channel number (channel) of the isochronous packet. 2107, a field 2108 storing a transaction code (tcode) for identifying the format of the packet and processing to be performed, and a field 2109 storing a synchronization code (sy).

[Asynchronous Transfer Mode] In the asynchronous transfer mode, asynchronous data transfer is performed.
Asynchronous transfer can be performed after the end of the isochronous transfer period until the next communication cycle is started, that is, before the next CSP is transferred.

In FIG. 20, the first subaction gap indicates the idle state of the bus.
After the idle time reaches a predetermined value, a node desiring asynchronous transfer determines that the bus can be used and requests a bus use right. The node that has obtained the right to use the bus by arbitration transmits a packet to be asynchronously transferred to a predetermined node. The node receiving this packet returns an ack (acknowledgement return code) or a response packet after the ack gap.

FIG. 22 is a diagram showing a format of a packet transferred asynchronously. In the following, a packet transferred asynchronously is referred to as an “asynchronous packet”. The asynchronous packet has a header 22
01, header CRC2202, data part 2203 and data CRC2204
Consists of

The header section 2201 contains the node ID of the destination node.
A field 2205 in which (destination_ID) is stored, a field 2206 in which a node ID (source_ID) of a source (source) node is stored, and a label indicating a series of transactions
A field 2207 in which (tl) is stored, a field 2208 in which a code (rt) indicating a retransmission status is stored, a field 2209 in which a packet code and a transaction code (tcode) for identifying a process to be executed are stored, Field 221 in which priority (pri) is stored
0, a field 2211 in which a destination memory address (destination_offset) is stored, and a data length (data_leng
th) is stored, and a field 2213 is stored where an extended transaction code (extended_tcode) is stored.

Asynchronous transfer is one-to-one communication from a source node to a destination node. A packet transmitted from a source node is distributed to each node in the network, but each node ignores a packet whose destination indicates other than its own address. Therefore, only the destination node can read the packet.

If the time to transfer the next CSP is reached during the asynchronous transfer, the transfer is not forcibly interrupted.
After the transfer is completed, the next CSP is transmitted. As a result, when one communication cycle lasts 125 μs or more,
Accordingly, the period of the next communication cycle is shortened. In this way, the 1394 network can maintain a substantially constant communication cycle.

[Printer] FIG. 23 shows the printer 1 shown in FIG.
FIG. 2 is a block diagram showing an example of the internal configuration of 02, which is a printer device having an inkjet printhead 2307.

The CPU 2301 controls the printer 102 according to the execution program stored in the ROM 2303. A RAM 2302 is an internal memory of the printer 102, a receiving area for temporarily storing image data and print data input to the printer 102 via the interface, and inks of respective colors of CMYK corresponding to the print head 2507 converted from the print data. Data area for storing data for ejecting ink, and CPU 230
There is a work area that 1 uses for data processing. Each block in the printer 102 is
Various data transfer, control and processing are performed via a system bus in the system.

The basic operation of the printer 102 will be described. The CPU 2301 drives a motor 2306 via a printer controller 2304 and a printer driver 2305 to control a carrier unit on which the print head 2307 is mounted and a paper feed mechanism. At the same time, data for ejecting ink is read from the RAM 2302 and
The print data is sent to the printer driver 304 and the print head 2307 is driven via the printer driver 2305 to execute printing.

The printer 102 has a LINK chip 2308 constituting a 1394 interface as an external interface.
And a PHY chip 2309. Therefore, a visible image based on image data or print data input from an external device via the 1394 network can be printed on recording paper.

[Digital Camera] FIG. 24 is a block diagram showing an example of the internal configuration of the digital camera 101 shown in FIG. Is shown.

The CPU 2401 controls each block of the digital camera 101 according to a program stored in the ROM 2403. The CPU 2401 performs various controls and image processing using the RAM 2402 as a work area, and performs data transfer using the RAM 2402 as a temporary storage memory.

A camera controller 2406 controls the devices necessary for photographing, reads an image from a CCD, displays a photographed image on an LCD, and sets focus and exposure during photographing. The captured image data is, for example, JPEG
The data is stored in the memory card 2408 as compressed data. Since a memory card cannot normally be accessed by being directly connected to the system bus, it is connected to the system bus via a card controller 2407 which performs reading control of the ATA type memory card.

The digital camera 101 has a 1394 interface as an external interface.
Image data and print data can be transmitted to an external device via the NK chip 2404 and the PHY chip 2405.

[Data Processing] FIG.
The JPEG-compressed image data captured by
FIG. 9 is a block diagram illustrating a process of converting print data into print data according to.

Since it is necessary to decompress the compressed data in order to perform image processing, the JPEG data is decompressed by the JPEG decompression unit 251 and converted into RGB data.

The RGB data is subjected to correction processing such as image contrast, brightness, gamma, color coloring, color cast, and contour by the image correction unit 252, and becomes RGB 'data as corrected data.

The RGB ′ data is converted into CMY data representing cyan (Cyan), magenta (Magenta), and yellow (Yellow) by the color processing unit 253 according to the color space determined by the ink used by the printer 102. .

The CMY data is converted to black (Bl
The ack) component is extracted and converted to CMYK four-color CMYK data obtained by adding data representing Black to CMY. In addition, UCR stands for "U
It is also called “under color removal” for “nderColor Removal”.

Further, the multi-valued CMYK data is transferred to the printer 10
It is necessary to binarize or quantize data representing ink ejection in accordance with the inkjet printing method, which is the second printing method. The halftoning section 255 is a multi-valued CMY
The K data is converted into CMYK data that matches the resolution of the printer 102. That is, multi-valued CMYK data is converted into binary, ternary or quaternary CMYK data with a resolution corresponding to the printer 102 by using pseudo gradation processing such as error diffusion or dither. FIG. 25 shows an example of conversion into CMYK binary data.

The CMYK binary data is finally converted by the printer 102 into ejection pattern data conforming to the structure of the print head 2307, and the print head 2307 is driven.

To determine the performance of image processing, it is necessary to measure the data processing time. Table 1 shows an example of the processing time when the digital camera 101 and the printer 102 perform the image processing shown in FIG. 25 on the sample JPEG data that is a prescribed image. The sample image to be used is not particularly limited, but it is considered that measurement errors are less likely to occur when JPEG data of an image having a non-monotone color is used.

Table 1 shows the result of processing 100 Kbytes of sample JPEG data by a certain digital camera 101 and a certain printer 102 to measure the processing time. Also, the table
1 shows the processing time of the sample image data for each processing unit.If the time taken for these processings is used directly as a performance value, the smaller the numerical value is, the higher the processing capability is. Can be used as a guide for

[0132]

[Table 1] If at least the processing capability of the device itself (as shown in Table 1) is pre-stored in the ROM, the processing capability of the digital camera is transferred to the printer or the processing capability of the printer is transferred to the digital camera via the 1394 network. If this information is provided to the digital camera or printer CPU, how the digital camera and printer should share a series of image processing related to printing from that information
Can be determined.

Table 2 shows the results of estimating the processing time required to process and print 10 Mbytes of JPEG data using the performance values shown in Table 1.

[0134]

[Table 2] Assuming that the processing time of each processing unit is almost simply proportional to the data size, the sample JPEG data in Table 1 is 100 KB, while the size of the JPEG data in Table 2 is 100 times 10 MB. Time will also increase 100 times. The data size shown in Table 2 is also calculated assuming that the data size is simply proportional.

Next, a method of selecting a processing unit using the performance values shown in Table 1, in other words, a method of sharing processing with the digital camera 101 and the printer 102 will be described.
This will be described with reference to FIG.

The device that determines the processing allotment
In S1, data on the processing capability as shown in Table 1 is obtained from a device connected via the 1394 network 103. That is, when the CPU 2401 of the digital camera 101 determines the processing allocation, the CPU 2401 acquires data on the processing capability from the printer 102, and when the CPU 2301 of the printer 102 determines the processing allocation, the CPU 2301
Obtain data on processing capacity from 01. Which device determines the processing allocation is, first, the device in which the program for determining the processing allocation is stored in the ROM, and second, such a program is stored in the ROM of both devices. If so, for example, the root device may perform the process.

In addition, if the information on the processing capability once obtained is stored in the non-volatile memory, it is not necessary to re-acquire the data on the processing capability every time the allocation of processing is determined unless the connected device is changed. .

Next, in step S2, the device that determines the processing allocation determines the processing allocation according to the procedure described below.

When judging the sharing, first, if a processing section with a short processing time is selected, the digital camera 101 uses a JPEG
The decompression unit 251, the image correction unit 252, and the UCR unit 254 are selected,
In the printer 102, the image correction unit 252, the color processing unit 253, and the halftoning unit 255 are selected.

If the processing having almost the same processing time as the image correction unit 252 is performed on the device that has performed the immediately preceding processing, the data transfer which is the pre-processing can be made unnecessary.
Therefore, it is desirable that the image correction unit 252 selects the digital camera 101 side. Similarly, if the processing is alternately performed by the two devices, the data transfer time, which is the pre-processing for performing the actual processing, must be considered. That is, minimizing the switching of the device that performs processing minimizes the delay in processing time due to the data transfer time.

By the way, the data transfer speed of the 1394 network is about 40 Mbytes / s in the case of the S400 standard, but the actual speed is reduced to about half due to the overhead required for protocol negotiation and the like. Assuming it is about 20 Mbytes / s. Accordingly, the processing by the color processing unit 253 of the printer 102 has been completed.
It takes more than two seconds to transfer the CMY data of MB (see Table 2) to the UCR unit 254 of the digital camera 101 which has a high processing speed. On the other hand, since the difference between the processing times of the UCR unit 254 of both devices is 0.3 second, the color processing unit 25 of the printer 102
If you want to use 3, use the UCR 2
Performing the processing at 54 is more efficient.

From these examination results, when the processing unit is selected so as to minimize the processing time, the digital camera 101
The JPEG decompression unit 251, the image correction unit 252- (data transfer), the color processing unit 253 of the printer 102, the UCR unit 254, and the halftoning unit 255 are processed. It is estimated that + 6 + 1.5 + 4 + 3.3 + 100 = 120.8 seconds.

On the other hand, when all the processing is performed by the digital camera 101, the data is transferred after the processing of the halftoning unit 255.
The total processing time to process the data is 6 + 6 + 6 + 3 + 200 + 4 = 22
It is estimated to be 5 seconds and is expected to be 225-120.8 = 104.2 seconds late. In addition, when all processing is performed by the printer 102, processing is performed after data transfer. Therefore, the total processing time for processing 10 Mbytes of JPEG data is 0.5 + 12 + 6.
It is estimated that + 4 + 3.3 + 100 = 125.8 seconds and 125.8-120.8 = 5 seconds later.

That is, when the processing unit is optimally selected,
About 10M bytes of JPEG data, digital camera 101
About 104 seconds faster than leaving all image processing to
It is predicted that the image processing will be completed about 5 seconds earlier than when all the image processing is left to the printer 102. Based on such a determination result, the digital camera 101 or the printer 1
If the CPU of 02 determines the sharing of a series of image processing, and the other device follows the determination, if direct printing is to be performed by combining a digital camera and a printer, the processing time should be minimized. It is possible to adaptively set the sharing of image processing that can be performed.

In step S3, the device that has determined the processing allocation notifies the partner device via the 1394 network 103 of the processing allocation in step S3. The device that has received the notification determines the processing to be performed by itself and the form of the data to be transmitted or received in accordance with the notified processing sharing.

In addition, if the once-determined processing allocation is stored in the non-volatile memory, it is not necessary to re-determine the processing allocation as long as the connected device does not change.

As described above, according to the present embodiment, when performing direct printing between an image supply device such as the digital camera 101 and a printing device such as the printer 102 connected by the 1394 serial bus 103, each device Since image processing functions can be adaptively shared between devices according to the relationship between the processing capacity of each image processing function and the data size and data transfer speed,
Efficient direct printing can be performed.

[0148]

[Other Embodiments] The present invention is applied to a system including a plurality of devices (for example, a host computer, an interface device, a reader, a printer, etc.). Facsimile machine, etc.).

An object of the present invention is to supply a storage medium (or a recording medium) in which a program code of software for realizing the functions of the above-described embodiments is recorded to a system or an apparatus, and to provide a computer (a computer) of the system or the apparatus. It is needless to say that the present invention can also be achieved by a CPU or an MPU) reading and executing the program code stored in the storage medium. In this case, the program code itself read from the storage medium implements the functions of the above-described embodiment, and the storage medium storing the program code constitutes the present invention. Also,
When the computer executes the readout program code, not only the functions of the above-described embodiments are realized, but also the operating system (O) running on the computer based on the instructions of the program code.
Needless to say, S) and the like perform part or all of the actual processing, and the processing realizes the functions of the above-described embodiments.

Further, after the program code read from the storage medium is written in the memory provided in the function expansion card inserted into the computer or the function expansion unit connected to the computer, the program code is read based on the instruction of the program code. Needless to say, the CPU included in the function expansion card or the function expansion unit performs part or all of the actual processing, and the processing realizes the functions of the above-described embodiments.

When the present invention is applied to the storage medium, the storage medium stores program codes corresponding to the flowcharts described above.

[0152]

As described above, according to the present invention,
Efficient image processing can be performed by sharing image processing to individual devices.

[Brief description of the drawings]

FIG. 1 is a diagram showing a general configuration example of a system to which the present invention is applied;

FIG. 2 is a diagram showing a configuration example of a 1394 network configured by nodes having a 1394 interface;

FIG. 3 is a diagram illustrating components of a 1394 interface.

FIG. 4 is a diagram showing services that can be provided by a link layer;

FIG. 5 is a diagram showing services that can be provided by a transaction layer.

FIG. 6 is a diagram illustrating an address space in the 1394 interface.

FIG. 7 is a diagram showing addresses and functions of information stored in a CSR core register;

FIG. 8 is a diagram showing addresses and functions of information stored in a serial bus register;

FIG. 9 is a diagram showing a configuration of a minimum format configuration ROM;

FIG. 10 is a diagram showing a configuration of a general configuration ROM;

FIG. 11 is a diagram showing addresses and functions of information stored in a serial bus device register in a unit space.

FIG. 12 is a sectional view of a communication cable conforming to the IEEE1394 standard,

FIG. 13 is a diagram for explaining a DS-Link encoding method;

FIG. 14 is a view for explaining a basic sequence from the start of a bus reset to the assignment of a node ID;

FIG. 15 is a view for explaining a basic sequence from the start of a bus reset to the assignment of a node ID;

FIG. 16 is a view for explaining a basic sequence from the start of a bus reset to the assignment of a node ID;

FIG. 17A is a flowchart showing in detail a process of assigning a node ID to each node;

FIG. 17B is a flowchart showing in detail a process of assigning a node ID to each node;

FIG. 18 is a diagram showing a configuration example of a self ID packet.

FIG. 19 is a view for explaining arbitration in the network configuration shown in FIG. 2;

FIG. 20 is a diagram illustrating a state in which an isochronous transfer mode and an asynchronous transfer mode are mixed in one communication cycle;

FIG. 21 is a diagram showing a format of a packet transmitted isochronously;

FIG. 22 is a diagram showing a format of a packet transferred asynchronously;

FIG. 23 is a block diagram showing an example of the internal configuration of the printer shown in FIG. 1;

FIG. 24 is a block diagram showing an example of the internal configuration of the digital camera shown in FIG. 1;

FIG. 25 is a block diagram showing a process of converting image data shot by a digital camera and JPEG-compressed into print data suitable for a printer;

FIG. 26 is a flowchart illustrating a method of sharing image processing between a digital camera and a printer.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) // H04N 101: 00 F term (Reference) 5C022 AA01 AA11 AA13 AB01 AB21 AC03 AC42 AC75 5C052 AA11 AB02 CC06 CC11 DD02 DD04 FA02 FA03 FA07 FB01 FC06 FE04 5C064 BA04 BB05 BC10 BC16 BC25 BD02 BD08

Claims (24)

[Claims] 1. An image processing apparatus for supplying data to a printing apparatus connected by a serial bus, comprising: an image processing unit for converting image data into print data; An image processing apparatus comprising: a determination unit for determining. 2. An image processing apparatus for receiving data supplied from a data supply device connected by a serial bus, comprising: an image processing means for converting image data into print data; An image processing apparatus, comprising: a determination unit that determines the sharing of the image. 3. The image processing apparatus according to claim 2, further comprising an acquisition unit configured to acquire the capability information of the image processing from the partner device.
3. The image processing device according to claim 1 or 2. 4. The image processing apparatus according to claim 3, wherein the capability information is provided for each stage of image processing. 5. The image processing apparatus according to claim 1, wherein the determining unit is configured to perform the following based on the capability information, an image data size and a data transfer speed.
5. The image processing apparatus according to claim 3, wherein the division of the image processing is determined. 6. The image processing apparatus according to claim 5, wherein the determination unit determines the sharing of image processing so as to improve data transfer efficiency. 7. The image processing apparatus according to claim 1, further comprising a notification unit that notifies the partner apparatus of the determined sharing of the image processing. 8. The image processing apparatus according to claim 1, wherein the apparatus for supplying the image data is an image acquisition device, and the apparatus for receiving the data is a printer. Processing equipment. 9. The image processing apparatus according to claim 1, wherein the serial bus conforms to or conforms to the IEEE 1394 standard. 10. The image processing apparatus according to claim 9, wherein the capability information is determined by reading information in a configuration ROM defined by the IEEE1394 standard. 11. The image processing apparatus according to claim 1, wherein the serial bus conforms to or conforms to a USB standard. 12. An image processing method for supplying data to a printing device connected by a serial bus, wherein each step of image processing for converting image data into print data is shared between the printing device and the printing device. Characteristic image processing method. 13. An image processing method for receiving data from a data supply device connected by a serial bus, wherein each step of image processing for converting image data into print data is shared between the data supply device and the data supply device. An image processing method comprising: 14. The image processing device according to claim 12, further comprising acquiring capability information of image processing from a partner device.
13. The image processing method described in 13. 15. The image processing method according to claim 14, wherein the capability information is provided for each stage of image processing. 16. The method according to claim 1, wherein the sharing includes the capability information,
16. The image processing method according to claim 14, wherein the image processing method is determined based on an image data size and a data transfer speed. 17. The image processing method according to claim 16, wherein the sharing is determined so that data transfer is performed once. 18. The image processing method according to claim 12, further comprising notifying the partner device of the determined sharing of the image processing. 19. The apparatus according to claim 12, wherein the apparatus for supplying the image data is an image acquisition device, and the apparatus for receiving the data is a printer.
An image processing method according to any one of the above. 20. The serial bus according to claim 12, wherein the serial bus conforms to or conforms to the IEEE1394 standard.
20. The image processing method according to any one of 19. 21. The image processing method according to claim 20, wherein the capability information is determined by reading information in a configuration ROM defined by the IEEE1394 standard. 22. The image processing method according to claim 12, wherein the serial bus conforms to or conforms to a USB standard. 23. A storage medium storing a program code for image processing for supplying data to a printing device connected by a serial bus, wherein the program code includes at least image processing for converting image data into print data. A storage medium having a code of a step for sharing each step with the printing apparatus. 24. A storage medium storing a program code for image processing for receiving data supplied from a data supply device connected by a serial bus, wherein each step of image processing for converting image data into print data is performed. A storage medium having a code of a step shared with a data supply device.