JP2002281744A - Dc-dc converter - Google Patents

Dc-dc converter

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Publication number
JP2002281744A
JP2002281744A JP2001078016A JP2001078016A JP2002281744A JP 2002281744 A JP2002281744 A JP 2002281744A JP 2001078016 A JP2001078016 A JP 2001078016A JP 2001078016 A JP2001078016 A JP 2001078016A JP 2002281744 A JP2002281744 A JP 2002281744A
Authority
JP
Japan
Prior art keywords
choke coil
current
time
mosfet
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001078016A
Other languages
Japanese (ja)
Inventor
Narihiro Kubo
成博 久保
Hiroyuki Kitajima
寛之 北嶋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP2001078016A priority Critical patent/JP2002281744A/en
Publication of JP2002281744A publication Critical patent/JP2002281744A/en
Pending legal-status Critical Current

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  • Rectifiers (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a DC-DC converter whose light load efficiency is improved. SOLUTION: Potentials of both ends of a sensing resistor 25 are inputted to a comparator 31 via an offset power supply 32. If a potential of a non-reverse input terminal (+) is lower than a potential of a reverse input terminal (-) to which an offset voltage is added, it is detected that a load is light. If the light load is detected by the comparator 31, an oscillator 30 lowers a frequency of a clock signal CK and a control circuit 29 controls a MOS-FET 2 to be turned off until a reverse direction current is supplied to a choke coil 24.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、同期整流方式を用
いたDC−DCコンバータに関する。
The present invention relates to a DC-DC converter using a synchronous rectification system.

【0002】[0002]

【従来の技術】同期整流方式を用いた従来の降圧型のD
C−DCコンバータの1例を図3を参照して説明する。
図において、DC−DCコンバータ100は、入力端子
1に電池等の入力電源が接続され、出力端子2に負荷が
接続される。入力端子1にPチャネル型MOSFET3
のソースが接続されており、MOSFET3と出力端子
2との間にチョークコイル4とセンス抵抗5とからなる
直列回路が接続されている。この直列回路と出力端子2
との接続点と、接地との間に平滑コンデンサ6が接続さ
れている。また、この直列回路とMOSFET3との接
続点と、接地との間にNチャネル型MOSFET7がド
レインとソースとで接続され、MOSFET7に並列に
転流ダイオード8がドレインとカソードおよびソースと
アノードとで接続されている。また、DC−DCコンバ
ータ100は、MOSFET3およびMOSFET7の
オン/オフを制御するためにMOSFET3およびMO
SFET7のゲート電位を制御する制御回路9を備え、
制御回路9に制御信号生成のためのクロック信号を供給
する発振器10を備えている。さらに、チョークコイル
4に流れる電流の方向を検出するためにコンパレータ1
1を備え、センス抵抗5の両端の電位をコンパレータ1
1の入力とし、その出力を制御回路9に供給するように
している。
2. Description of the Related Art A conventional step-down type D using a synchronous rectification method.
An example of the C-DC converter will be described with reference to FIG.
In the figure, a DC-DC converter 100 has an input terminal 1 connected to an input power source such as a battery, and an output terminal 2 connected to a load. P-channel MOSFET 3 at input terminal 1
Are connected, and a series circuit composed of a choke coil 4 and a sense resistor 5 is connected between the MOSFET 3 and the output terminal 2. This series circuit and output terminal 2
The smoothing capacitor 6 is connected between the connection point of the capacitor and the ground. An N-channel MOSFET 7 is connected between the connection point of the series circuit and the MOSFET 3 and the ground, with a drain and a source, and a commutation diode 8 is connected in parallel with the MOSFET 7 with a drain and a cathode and a source and an anode. Have been. In addition, the DC-DC converter 100 includes the MOSFET 3 and the MO for controlling ON / OFF of the MOSFET 3 and the MOSFET 7.
A control circuit 9 for controlling the gate potential of the SFET 7;
An oscillator 10 that supplies a clock signal for generating a control signal to the control circuit 9 is provided. Further, the comparator 1 detects the direction of the current flowing through the choke coil 4.
1 and the potential at both ends of the sense resistor 5 is compared with the comparator 1
1 and the output is supplied to the control circuit 9.

【0003】次に、DC−DCコンバータ100の入力
端子1に入力電源から入力電圧Vinが供給され、発振器
10から制御回路9にクロック信号CKが供給され、出
力端子2に負荷が接続されているときの動作を図4を参
照して説明する。先ず、負荷が重負荷のとき、クロック
信号CKのパルスが供給される時刻T1の時点におい
て、制御回路9によりMOSFET3がオン制御、およ
びMOSFET7がオフ制御され、入力端子1からMO
SFET3→チョークコイル4→センス抵抗5→負荷の
経路で電流が流れ、チョークコイル4に流れる電流I
は増加し、出力端子2の電圧Voも増加する。
Next, an input voltage Vin is supplied from an input power supply to an input terminal 1 of the DC-DC converter 100, a clock signal CK is supplied from an oscillator 10 to a control circuit 9, and a load is connected to an output terminal 2. The operation at this time will be described with reference to FIG. First, when the load is heavy, at time T1 when the pulse of the clock signal CK is supplied, the control circuit 9 controls the MOSFET 3 to be turned on and the MOSFET 7 to be turned off.
SFET3 → choke coil 4 → the current flows in the path of the sense resistor 5 → load, current flowing through the choke coil 4 I L
Increases, and the voltage Vo at the output terminal 2 also increases.

【0004】入力電圧と出力電圧との比で決まるオン/
オフデューティが例えば、50%となる時刻T2の時点
で電圧Voがスレッショルド電圧Vthに達し、MOSF
ET3がオフ制御、およびMOSFET7がオン制御さ
れ、チョークコイル4に発生する逆起電力からセンス抵
抗5→負荷→MOSFET7の経路で電流が流れ、クロ
ック信号CKの次のパルスが供給される時刻T3の時点
まで、チョークコイル4に流れる電流Iは減少し、出
力端子2の電圧Voも減少する。
On / off determined by the ratio of input voltage to output voltage
At time T2 when the off-duty becomes, for example, 50%, voltage Vo reaches threshold voltage Vth, and MOSF
ET3 is turned off and the MOSFET 7 is turned on, and a current flows from the back electromotive force generated in the choke coil 4 through the path of the sense resistor 5 → the load → the MOSFET 7 to supply the next pulse of the clock signal CK at time T3. until the time, current I L flowing through the choke coil 4 is reduced, also reducing the voltage Vo at the output terminal 2.

【0005】時刻T3の時点以降の重負荷の間、同様
に、MOSFET3,7がオン/オフ制御され、このと
き、チョークコイル4に流れる電流Iは増減を繰り返
し、出力端子2の電圧Voもスレッショルド電圧Vthま
での増減を繰り返す。
[0005] During the heavy load after the time T3, similarly, MOSFET3,7 is on / off control, this time, current I L flowing through the choke coil 4 is repeatedly increase and decrease, the voltage Vo at the output terminal 2 The increase / decrease to the threshold voltage Vth is repeated.

【0006】次に、時刻t1の時点において、制御回路
9によりMOSFET3がオン制御、およびMOSFE
T7がオフ制御され、そのとき負荷が軽負荷になると、
重負荷のときより出力端子2の電圧Voの上昇が大きく
なり、次にMOSFET3がオフ制御、およびMOSF
ET7がオン制御される時刻t2の時点でオーバーシュ
ートが大きくなり、電圧Voはスレッショルド電圧Vth
より高くなる。
Next, at time t1, the control circuit 9 controls the MOSFET 3 to be turned on, and the MOSFET 3
When T7 is off-controlled and the load becomes light at that time,
The voltage Vo at the output terminal 2 increases more than when the load is heavy.
At time t2 when the ET7 is controlled to be turned on, the overshoot increases, and the voltage Vo becomes equal to the threshold voltage Vth.
Higher.

【0007】時刻t2の時点でMOSFET3がオフ制
御、およびMOSFET7がオン制御されると、負荷が
軽負荷のため、チョークコイル4に流れる電流Iは重
負荷のときより速く減少し、時刻t3の時点でチョーク
コイル4に流れる電流は零になり、さらに反対方向の電
流が流れようとする。このとき、センス抵抗5の両端の
電位がコンパレータ11に入力され、反転入力端子
(−)の電位より非反転入力端子(+)の電位が低くな
ると、チョークコイル4に流れる電流の方向が反対であ
ることが検出される。コンパレータ11により反対方向
の電流が検出されると、制御回路9によりMOSFET
7がオフ制御され、チョークコイル4に流れる電流I
はt4の時点で零になる。時刻t2からt4の間、出力
端子2の電圧Voは少し減少する。
[0007] point MOSFET3 off control in the time t2, and MOSFET7 is once controlled to be turned on, since the load is a light load, the current I L flowing through the choke coil 4 is reduced faster than when a heavy load, the time t3 At this time, the current flowing through the choke coil 4 becomes zero, and a current in the opposite direction tends to flow. At this time, the potential at both ends of the sense resistor 5 is input to the comparator 11, and when the potential at the non-inverting input terminal (+) becomes lower than the potential at the inverting input terminal (-), the direction of the current flowing through the choke coil 4 is reversed. It is detected that there is. When the current in the opposite direction is detected by the comparator 11, the control circuit 9
7 is off-controlled, the current flowing through the choke coil 4 I L
Becomes zero at time t4. From time t2 to time t4, voltage Vo at output terminal 2 slightly decreases.

【0008】この後、MOSFET3,7はオフ制御さ
れ、チョークコイル4に流れる電流Iは零のままで、
出力端子2の電圧Voは徐々に減少し、クロック信号C
Kのパルスが負荷の軽さにより所定パルス数経過して
後、電圧Voがスレッショルド電圧Vthより低下する。
そして、電圧Voがスレッショルド電圧Vthより低下し
た直後のクロック信号のパルスが供給される時刻t5の
時点で、制御回路9によりMOSFET3がオン制御、
およびMOSFET7がオフ制御され、MOSFET3
がオフ制御、およびMOSFET7がオン制御される時
刻t6の時点まで、チョークコイル4に流れる電流I
は増加し、出力端子2の電圧Voも増加する。出力端子
2の電圧Voは、時刻t6の時点で、重負荷のときより
高くなり、時刻t2の時点と同レベルになる。しかし、
負荷が軽いため、時刻t6の時点で、チョークコイル4
には、重負荷時より少ない電流Iしか流れない。
[0008] Thereafter, MOSFET3,7 is controlled to be turned off, current I L flowing through the choke coil 4 remains zero,
The voltage Vo at the output terminal 2 gradually decreases, and the clock signal C
After a predetermined number of K pulses have elapsed due to the lightness of the load, the voltage Vo drops below the threshold voltage Vth.
Then, at time t5 when the pulse of the clock signal is supplied immediately after the voltage Vo falls below the threshold voltage Vth, the control circuit 9 controls the MOSFET 3 to be turned on.
And MOSFET 7 are turned off, and MOSFET 3
There up to the point of time t6 off control, and MOSFET7 are on-controlled, the current flowing through the choke coil 4 I L
Increases, and the voltage Vo at the output terminal 2 also increases. The voltage Vo of the output terminal 2 becomes higher at the time t6 than at the time of heavy load, and becomes the same level as that at the time t2. But,
Since the load is light, at time t6, the choke coil 4
The only current does not flow I L less than the heavy load.

【0009】時刻t6の時点でMOSFET3がオフ制
御、およびMOSFET7がオン制御されると、時刻t
3の時点と同様に、時刻t7の時点でチョークコイル4
に流れる電流は零になり、さらに反対方向の電流が流れ
ようとして、コンパレータ11により反対方向の電流が
検出され、制御回路9によりMOSFET7がオフ制御
され、チョークコイル4に流れる電流Iはt8の時点
で零になる。
When MOSFET 3 is turned off and MOSFET 7 is turned on at time t6, time t
3, the choke coil 4 at the time t7
As current is zero, will further opposite direction current to flow that flows in the opposite direction of the current is detected by the comparator 11, the control circuit 9 MOSFET 7 is turned off control, the current I L t8 flowing through the choke coil 4 It becomes zero at that point.

【0010】時刻t8の時点以降、時刻t4からt8と
同様に、MOSFET3,7がオン/オフ制御され、こ
のとき、チョークコイル4に流れる電流Iは反対方向
の電流も含め増減を繰り返し、出力端子2の電圧Voも
増減を繰り返す。
[0010] after the timing time t8, the as well as from the time t4 t8, MOSFET3,7 is on / off control, this time, current I L flowing through the choke coil 4 is repeated, including opposing current decrease, the output The voltage Vo at the terminal 2 also increases and decreases repeatedly.

【0011】[0011]

【発明が解決しようとする課題】ところで、軽負荷の検
出は、上述したように、チョークコイル4に流れる電流
が減少して零になり、さらに反対方向の電流が流れ
ようとするときのセンス抵抗5の両端の電位をコンパレ
ータ11により検出することにより行っているので、コ
ンパレータ11が軽負荷を検出してMOSFET7がオ
フ制御されるまでに、チョークコイル4に反対方向の電
流が流れ、そのため軽負荷時の効率が悪化するという問
題がある。本発明は上記問題点に鑑み、軽負荷にチョー
クコイルに反対方向の電流が流れないようにしたDC−
DCコンバータを提供することを目的とする。
[SUMMARY OF THE INVENTION Incidentally, the detection of a light load, as described above, the current I L flowing through the choke coil 4 becomes zero decreases, when the further opposing current is going to flow Since the detection is performed by detecting the potential at both ends of the sense resistor 5 by the comparator 11, a current in the opposite direction flows through the choke coil 4 until the comparator 11 detects a light load and the MOSFET 7 is turned off. There is a problem that efficiency at light load deteriorates. The present invention has been made in view of the above-described problems, and has been made in consideration of the above-described problems, by providing a DC-DC converter that prevents current from flowing in an opposite direction through a choke coil at a light load.
An object is to provide a DC converter.

【0012】[0012]

【課題を解決するための手段】本発明のDC−DCコン
バータは、入力電源のチョークコイルへの供給を制御し
て所定電圧に降圧または昇圧して出力する同期整流方式
のDC−DCコンバータにおいて、 チョークコイルに
直列接続され、チョークコイルの電流を検出するセンス
抵抗と、センス抵抗の両端のうち片側端に接続され、軽
負荷を検出するためのチョークコイルのスレッショルド
電流をチョークコイルに逆起電力が発生している期間に
設定するために、センス抵抗の上記片側端の電位をオフ
セットするオフセット電源と、このオフセット電源を介
してセンス抵抗の両端に接続され、チョークコイルの電
流が前記スレッショルド電流以下で同期整流を中止する
信号を出力するコンパレータとを有することを特徴とす
る。また、本発明のDC−DCコンバータは、上記DC
−DCコンバータにおいて、コンパレータの出力により
軽負荷時に発振器の発振周波数を下げることを特徴とす
る。
SUMMARY OF THE INVENTION A DC-DC converter according to the present invention is a synchronous rectification type DC-DC converter that controls supply of input power to a choke coil to step down or step up to a predetermined voltage and output the voltage. A sense resistor that is connected in series with the choke coil, and a sense resistor that detects the current of the choke coil, and is connected to one end of both ends of the sense resistor. An offset power supply for offsetting the potential of the one end of the sense resistor for setting during the period in which it is occurring, and connected to both ends of the sense resistor via the offset power supply, and the current of the choke coil is equal to or less than the threshold current. A comparator for outputting a signal for stopping synchronous rectification. Further, the DC-DC converter of the present invention has the above-mentioned DC-DC converter.
In the DC converter, the oscillation frequency of the oscillator is reduced at a light load by the output of the comparator.

【0013】[0013]

【発明の実施の形態】以下、この発明の一実施例につい
て図1を参照して説明する。図において、200は、降
圧型のDC−DCコンバータで、入力端子21に電池等
の入力電源が接続され、出力端子22に負荷が接続され
る。DC−DCコンバータ200の構成は、入力端子2
1にPチャネル型MOSFET23のソースが接続され
ており、MOSFET23と出力端子22との間にチョ
ークコイル24とセンス抵抗25とからなる直列回路が
接続されている。この直列回路と出力端子22との接続
点と、接地との間に平滑コンデンサ26が接続されてい
る。また、この直列回路とMOSFET23との接続点
と、接地との間にNチャネル型MOSFET27がドレ
インとソースとで接続され、MOSFET27に並列に
転流ダイオード28がドレインとカソードおよびソース
とアノードとで接続されている。また、DC−DCコン
バータ200は、MOSFET23およびMOSFET
27のオン/オフを制御するためにMOSFET23お
よびMOSFET27のゲート電位を制御する制御回路
29を備え、制御回路29に制御信号生成のためのクロ
ック信号を供給する発振器30を備えている。さらに、
センス抵抗25の両端の電位差をオフセット電圧と比較
して軽負荷を検出するために、コンパレータ31とオフ
セット電源32とを備え、センス抵抗25の両端の入力
端子21側端の電位をコンパレータ31の非反転入力端
子(+)の入力、および、センス抵抗25の両端の出力
端子22側端の電位をオフセット電源32を介してコン
パレータ31の反転入力端子(−)の入力とし、その出
力を制御回路29および発振器30に供給するようにし
ている。尚、Pチャネル型MOSFET23の替わりに
Nチャネル型MOSFETを、チョークコイル24とセ
ンス抵抗25とからなる直列回路と、入力端子21との
間にドレインを入力端子21側、ソースを直列回路側に
して接続してもよい。また、オフセット電源32は、セ
ンス抵抗25の入力端子21側端とコンパレータ31の
非反転入力端子(+)との間に逆にして接続してもよ
い。また、コンパレータ31は、センス抵抗25の両端
の電位差がオフセット電圧以上からオフセット電圧以下
になるときは、オフセット電圧以下で同期整流を中止す
る信号を出力するが、オフセット電圧以下からオフセッ
ト電圧以上になるときは、オフセット電圧より少し高め
の電圧まで同期整流を中止する信号を出力するように多
少のヒステリシス電圧を有するものを使用すると、軽負
荷の検出をスムーズに行うことができる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIG. In the figure, reference numeral 200 denotes a step-down DC-DC converter, wherein an input terminal 21 is connected to an input power source such as a battery, and an output terminal 22 is connected to a load. The configuration of the DC-DC converter 200 is such that the input terminal 2
1, a source of a P-channel MOSFET 23 is connected, and a series circuit including a choke coil 24 and a sense resistor 25 is connected between the MOSFET 23 and the output terminal 22. A smoothing capacitor 26 is connected between the connection point between the series circuit and the output terminal 22 and the ground. An N-channel MOSFET 27 is connected between the connection point of the series circuit and the MOSFET 23 and the ground, with a drain and a source, and a commutation diode 28 is connected in parallel with the MOSFET 27 with a drain and a cathode and a source and an anode. Have been. The DC-DC converter 200 includes a MOSFET 23 and a MOSFET
The control circuit 29 includes a control circuit 29 that controls the gate potential of the MOSFET 23 and the MOSFET 27 to control ON / OFF of the MOSFET 27, and includes an oscillator 30 that supplies the control circuit 29 with a clock signal for generating a control signal. further,
In order to detect a light load by comparing the potential difference between both ends of the sense resistor 25 with the offset voltage, a comparator 31 and an offset power supply 32 are provided. The input of the inverting input terminal (+) and the potential of the output terminal 22 on both ends of the sense resistor 25 are used as the input of the inverting input terminal (-) of the comparator 31 via the offset power supply 32, and the output is used as the control circuit 29. And the oscillator 30. In addition, instead of the P-channel MOSFET 23, an N-channel MOSFET is replaced by a series circuit including a choke coil 24 and a sense resistor 25, and a drain between the input terminal 21 and the source between the series circuit and the input terminal 21. You may connect. Further, the offset power supply 32 may be connected in reverse between the input terminal 21 end of the sense resistor 25 and the non-inverting input terminal (+) of the comparator 31. When the potential difference between both ends of the sense resistor 25 falls from the offset voltage or more to the offset voltage or less, the comparator 31 outputs a signal for stopping synchronous rectification at the offset voltage or less. At this time, if a signal having a slight hysteresis voltage is used so as to output a signal for stopping synchronous rectification up to a voltage slightly higher than the offset voltage, light load can be detected smoothly.

【0014】次に、DC−DCコンバータ200の入力
端子21に入力電源から入力電圧Vinが供給され、発振
器30から制御回路29にクロック信号CKが供給さ
れ、出力端子22に負荷が接続されているときの動作を
図2を参照して説明する。先ず、負荷が重負荷のとき、
クロック信号CKのパルスが供給される時刻T1の時点
において、制御回路29によりMOSFET23がオン
制御、およびMOSFET27がオフ制御され、入力端
子21からMOSFET23→チョークコイル24→セ
ンス抵抗25→負荷の経路で電流が流れ、チョークコイ
ル24に流れる電流Iは増加し、出力端子22の電圧
Voも増加する。
Next, an input voltage Vin is supplied from an input power supply to an input terminal 21 of the DC-DC converter 200, a clock signal CK is supplied from an oscillator 30 to a control circuit 29, and a load is connected to the output terminal 22. The operation at this time will be described with reference to FIG. First, when the load is heavy,
At the time T1 at which the pulse of the clock signal CK is supplied, the MOSFET 23 is turned on and the MOSFET 27 is turned off by the control circuit 29, and the current flows through the input terminal 21 from the MOSFET 23 → the choke coil 24 → the sense resistor 25 → the load. flow, current I L flowing through the choke coil 24 increases, also increases the voltage Vo at the output terminal 22.

【0015】入力電圧と出力電圧との比で決まるオン/
オフデューティが例えば、50%となる時刻T2の時点
で電圧Voがスレッショルド電圧Vthに達し、MOSF
ET23がオフ制御、およびMOSFET27がオン制
御され、チョークコイル24に発生する逆起電力からセ
ンス抵抗25→負荷→MOSFET27の経路で電流が
流れ、クロック信号CKの次のパルスが供給される時刻
T3の時点まで、チョークコイル24に流れる電流I
は減少し、出力端子22の電圧Voも減少する。
On / off determined by the ratio of the input voltage to the output voltage
At time T2 when the off-duty becomes, for example, 50%, voltage Vo reaches threshold voltage Vth, and MOSF
The ET 23 is turned off and the MOSFET 27 is turned on, and a current flows from the back electromotive force generated in the choke coil 24 through the path of the sense resistor 25 → the load → the MOSFET 27, at the time T3 when the next pulse of the clock signal CK is supplied. to the point, the current flowing through the choke coil 24 I L
And the voltage Vo at the output terminal 22 also decreases.

【0016】時刻T3の時点以降の重負荷の間、同様
に、MOSFET23,27がオン/オフ制御され、こ
のとき、チョークコイル24に流れる電流Iは増減を
繰り返し、出力端子22の電圧Voもスレッショルド電
圧Vthまでの増減を繰り返す。
[0016] During the heavy load after the time T3, similarly, MOSFET23,27 is on / off control, this time, current I L flowing through the choke coil 24 is repeatedly increase and decrease, the voltage Vo at the output terminal 22 The increase / decrease to the threshold voltage Vth is repeated.

【0017】次に、時刻t1の時点において、制御回路
29によりMOSFET23がオン制御、およびMOS
FET27がオフ制御され、そのとき負荷が軽負荷にな
ると、重負荷のときより出力端子22の電圧Voの上昇
が大きくなり、次にMOSFET23がオフ制御、およ
びMOSFET27がオン制御される時刻t2の時点で
オーバーシュートが大きくなり、電圧Voはスレッショ
ルド電圧Vthより高くなる。
Next, at time t1, the control circuit 29 controls the MOSFET 23 to be turned on,
When the FET 27 is turned off and the load becomes lighter at that time, the rise of the voltage Vo at the output terminal 22 becomes larger than at the time of heavy load, and then at the time t2 when the MOSFET 23 is turned off and the MOSFET 27 is turned on. , The overshoot increases, and the voltage Vo becomes higher than the threshold voltage Vth.

【0018】時刻t2の時点でMOSFET23がオフ
制御、およびMOSFET27がオン制御されると、負
荷が軽負荷のため、チョークコイル24に流れる電流I
は重負荷のときより速く減少する。このとき、センス
抵抗25の両端の電位がオフセット電源32を介してコ
ンパレータ31に入力され、チョークコイル24に逆起
電力が発生している間、すなわち電流Iが零になるま
での間の時刻t3’の時点で、電流Iは反転入力端子
(−)の電位と非反転入力端子(+)の電位が等しくな
るスレッショルド電流Ithになる。さらに電流Iが減
少しようとすると、オフセット電圧が加算された反転入
力端子(−)の電位より非反転入力端子(+)の電位が
低くなり、軽負荷であることが検出され、制御回路29
によりMOSFET27がオフ制御され、チョークコイ
ル24に流れる電流Iはその後、転流ダイオード28
を介して流れ、t4’の時点で零になり、同期整流を中
止する。時刻t2からt4’の間、出力端子22の電圧
Voは少し減少する。また、コンパレータ31により軽
負荷であることが検出されると、発振器30は、クロッ
ク信号CKの周波数を下げる
When the MOSFET 23 is turned off and the MOSFET 27 is turned on at time t2, the current I flowing through the choke coil 24 is reduced because the load is light.
L decreases faster than under heavy loads. At this time, the potential between both ends of the sense resistor 25 is input to the comparator 31 via the offset power supply 32, and the time until the back electromotive force is generated in the choke coil 24, that is, the time until the current IL becomes zero. at the time of t3 ', the current I L is the inverting input terminal (-) of the potential of the potential and the non-inverting input terminal (+) becomes equal to the threshold current Ith of. If additional current I L is about to decrease, an inverting input terminal to which an offset voltage is added (-) potential of the non-inverting input terminal (+) becomes lower than the potential of, it is detected that a light load, the control circuit 29
The MOSFET27 is off-controlled, then the current I L flowing through the choke coil 24, the commutation diode 28
, Becomes zero at time t4 ′, and stops the synchronous rectification. Between time t2 and t4 ′, the voltage Vo at the output terminal 22 slightly decreases. When the comparator 31 detects that the load is light, the oscillator 30 lowers the frequency of the clock signal CK.

【0019】この後、MOSFET23,27はオフ制
御され、チョークコイル24に流れる電流Iは零のま
まで、出力端子22の電圧Voは徐々に減少する。そし
て、電圧Voがスレッショルド電圧Vthより低下した直
後のクロック信号のパルスが供給される時刻t5の時点
で、制御回路29によりMOSFET27がオフ制御の
ままで、MOSFET23がオン制御され、MOSFE
T27がオフ制御のままでMOSFET23がオフ制御
される時刻T6の時点まで、チョークコイル24に流れ
る電流Iは増加し、出力端子22の電圧Voも増加す
る。出力端子22の電圧Voは、時刻t6の時点で、重
負荷のときより高くなり、時刻t2の時点と同レベルに
なる。しかし、負荷が軽いため、時刻t6の時点で、チ
ョークコイル24には、重負荷時より少ないスレッショ
ルド電流Ith以下の電流Iしか流れない。
[0019] Thereafter, MOSFET23,27 is controlled to be turned off, the current I L flowing through the choke coil 24 remains zero, the voltage Vo at the output terminal 22 gradually decreases. Then, at time t5 when the pulse of the clock signal is supplied immediately after the voltage Vo falls below the threshold voltage Vth, the MOSFET 23 is turned on by the control circuit 29 while the MOSFET 27 is kept off, and the MOSFET is turned on.
T27 until the point of time T6 of MOSFET23 remains off control is off-controlled, the current I L flowing through the choke coil 24 increases, also increases the voltage Vo at the output terminal 22. The voltage Vo of the output terminal 22 becomes higher at the time t6 than at the time of heavy load, and becomes the same level as that at the time t2. However, since the load is light, at time t6, the choke coil 24, the threshold current Ith only flow following the current I L less than the heavy load.

【0020】時刻t6の時点で、チョークコイル24に
はスレッショルド電流Ith以下の電流Iしか流れない
のでコンパレータ31により軽負荷が検出され、制御回
路29によりMOSFET27はオフ制御のままで同期
整流は中止したままであり、このときMOSFET23
がオフ制御されると、t4’の時点と同様に、チョーク
コイル24に流れる電流Iは、転流ダイオード28を
介して流れ、時刻t8’の時点で零になる。
[0020] At time t6, the choke coil 24 is detected light load by the comparator 31 does not flow through only the threshold current Ith following current I L, MOSFET 27 by the control circuit 29 stop the synchronous rectification remains off control In this case, the MOSFET 23
When There is off-controlled, 'as with the time of the current I L flowing through the choke coil 24 flows through the commutation diode 28, a time t8' t4 becomes zero at the time of.

【0021】時刻t8’の時点以降、時刻t4’からt
8’と同様に、MOSFET27がオフ制御のままで、
MOSFET23がオン/オフ制御され、このとき、チ
ョークコイル24に流れる電流Iは、スレッショルド
電流Ith以下で増減を繰り返し、出力端子22の電圧V
oも増減を繰り返す。
After time t8 ', t4'
Similarly to 8 ', the MOSFET 27 remains off-control,
MOSFET23 is on / off control, this time, current I L flowing through the choke coil 24 repeats the increase and decrease in the following threshold current Ith, the voltage V of the output terminal 22
o also increases and decreases repeatedly.

【0022】以上説明したように、軽負荷時に、発振器
30からのクロック信号の発振周波数を下げるととも
に、チョークコイル24に反対方向の電流が流れるまで
にMOSFET27をオフ制御するため、制御回路29
の消費電流を低減できるとともに、MOSFET27の
スイッチング損失を防止でき、軽負荷時の効率を改善す
ることができる。
As described above, when the load is light, the oscillation frequency of the clock signal from the oscillator 30 is lowered, and the MOSFET 27 is turned off until the current in the opposite direction flows through the choke coil 24.
, The switching loss of the MOSFET 27 can be prevented, and the efficiency at light load can be improved.

【0023】尚、上記実施例では、降圧型のDC−DC
コンバータ200について説明したが、本発明は、これ
に限定されず、昇圧型のDC−DCコンバータや昇降圧
型のDC−DCコンバータにも適用可能である。また、
極性反転したDC−DCコンバータにも適用可能であ
る。
In the above embodiment, the step-down type DC-DC
Although converter 200 has been described, the present invention is not limited to this, and is also applicable to a step-up DC-DC converter and a step-up / step-down DC-DC converter. Also,
The present invention is also applicable to a DC-DC converter whose polarity is inverted.

【0024】[0024]

【発明の効果】以上のように、この発明のDC−DCコ
ンバータは、軽負荷時に、クロック信号の発振周波数が
下がり制御回路の消費電流を低減できるとともに、チョ
ークコイルに反対方向の電流が流れないのでスイッチン
グ損失を防止でき、軽負荷時の効率を改善することがで
きる。
As described above, in the DC-DC converter according to the present invention, when the load is light, the oscillation frequency of the clock signal is reduced, the current consumption of the control circuit can be reduced, and no current flows in the choke coil in the opposite direction. Therefore, switching loss can be prevented, and efficiency at light load can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の一実施例のDC−DCコンバータの
ブロック図。
FIG. 1 is a block diagram of a DC-DC converter according to an embodiment of the present invention.

【図2】 図1に示すDC−DCコンバータの動作を説
明するためのタイムチャート。
FIG. 2 is a time chart for explaining the operation of the DC-DC converter shown in FIG.

【図3】 従来のDC−DCコンバータのブロック図。FIG. 3 is a block diagram of a conventional DC-DC converter.

【図4】 図3のDC−DCコンバータの動作を説明す
るためのタイムチャート。
FIG. 4 is a time chart for explaining the operation of the DC-DC converter of FIG. 3;

【符号の説明】[Explanation of symbols]

23 Pチャネル型MOSFET 24 チョークコイル 25 センス抵抗 27 Nチャネル型MOSFET 28 転流ダイオード 29 制御回路 30 発振器 31 コンパレータ 32 オフセット電源 200 DC−DCコンバータ Reference Signs List 23 P-channel MOSFET 24 Choke coil 25 Sense resistor 27 N-channel MOSFET 28 Commutation diode 29 Control circuit 30 Oscillator 31 Comparator 32 Offset power supply 200 DC-DC converter

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】入力電源のチョークコイルへの供給を制御
して所定電圧に降圧または昇圧して出力する同期整流方
式のDC−DCコンバータにおいて、 チョークコイルに直列接続され、チョークコイルの電流
を検出するセンス抵抗と、センス抵抗の両端のうち片側
端に接続され、軽負荷を検出するためのチョークコイル
のスレッショルド電流をチョークコイルに逆起電力が発
生している期間に設定するために、前記片側端の電位を
オフセットするオフセット電源と、このオフセット電源
を介してセンス抵抗の両端に接続され、チョークコイル
の電流が前記スレッショルド電流以下で前記同期整流を
中止する信号を出力するコンパレータとを有することを
特徴とするDC−DCコンバータ。
1. A synchronous rectification type DC-DC converter for controlling the supply of an input power to a choke coil and stepping down or boosting the voltage to a predetermined voltage and outputting the voltage is connected in series to the choke coil and detects the current of the choke coil. To set a threshold current of a choke coil for detecting a light load during a period in which a back electromotive force is generated in the choke coil. An offset power supply for offsetting the potential of the terminal and a comparator connected to both ends of the sense resistor via the offset power supply and outputting a signal for stopping the synchronous rectification when the current of the choke coil is equal to or less than the threshold current. Characteristic DC-DC converter.
【請求項2】前記コンパレータの出力により軽負荷時に
発振器の発振周波数を下げることを特徴とする請求項1
記載のDC−DCコンバータ。
2. An oscillator according to claim 1, wherein the output of said comparator lowers the oscillation frequency of the oscillator at light load.
A DC-DC converter as described.
JP2001078016A 2001-03-19 2001-03-19 Dc-dc converter Pending JP2002281744A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001078016A JP2002281744A (en) 2001-03-19 2001-03-19 Dc-dc converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001078016A JP2002281744A (en) 2001-03-19 2001-03-19 Dc-dc converter

Publications (1)

Publication Number Publication Date
JP2002281744A true JP2002281744A (en) 2002-09-27

Family

ID=18934689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001078016A Pending JP2002281744A (en) 2001-03-19 2001-03-19 Dc-dc converter

Country Status (1)

Country Link
JP (1) JP2002281744A (en)

Cited By (12)

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Publication number Priority date Publication date Assignee Title
WO2007007752A1 (en) * 2005-07-11 2007-01-18 Rohm Co., Ltd. Step-down switching regulator, its control circuit, and electronic device using same
JP2007288987A (en) * 2006-04-20 2007-11-01 Smk Corp Dc-dc converter
WO2008066068A1 (en) * 2006-11-28 2008-06-05 Thine Electronics, Inc. Comparator type dc-dc converter
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US7598718B2 (en) 2002-11-12 2009-10-06 O2Micro International Limited Controller for DC to DC converter
US8624573B2 (en) 2010-05-26 2014-01-07 Samsung Electronics Co., Ltd. Power converters including zero-current detectors and methods of power conversion
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US8716990B2 (en) 2011-01-11 2014-05-06 Kabushiki Kaisha Toshiba Synchronous rectifying DC-to-DC converter device with compensated low-side switch offset voltage
US8872494B2 (en) 2012-02-10 2014-10-28 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device, DC-DC converter, and voltage conversion method
US9059632B2 (en) 2008-03-24 2015-06-16 O2Micro, Inc. Controllers for DC to DC converters
US10381941B2 (en) 2017-10-25 2019-08-13 Fujitsu Limited Switching power supply device and synchronous rectifier circuit

Cited By (21)

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Publication number Priority date Publication date Assignee Title
US7598718B2 (en) 2002-11-12 2009-10-06 O2Micro International Limited Controller for DC to DC converter
US7714560B2 (en) 2005-07-11 2010-05-11 Rohm Co., Ltd. Step-down switching regulator
JP2007020352A (en) * 2005-07-11 2007-01-25 Rohm Co Ltd Voltage-fall type switching regulator, and its control circuit, and electronic equipment using the same
JP4685531B2 (en) * 2005-07-11 2011-05-18 ローム株式会社 STEP-DOWN SWITCHING REGULATOR, ITS CONTROL CIRCUIT, AND ELECTRONIC DEVICE USING THE SAME
WO2007007752A1 (en) * 2005-07-11 2007-01-18 Rohm Co., Ltd. Step-down switching regulator, its control circuit, and electronic device using same
JP2007288987A (en) * 2006-04-20 2007-11-01 Smk Corp Dc-dc converter
JP4481270B2 (en) * 2006-04-20 2010-06-16 Smk株式会社 DC-DC converter
WO2008066068A1 (en) * 2006-11-28 2008-06-05 Thine Electronics, Inc. Comparator type dc-dc converter
JP2008136307A (en) * 2006-11-28 2008-06-12 Thine Electronics Inc Comparator type dc-dc converter
US7876081B2 (en) 2006-11-28 2011-01-25 Thine Electronics, Inc. DC-DC converter with substantially constant on-time and constant switching frequency
JP4629648B2 (en) * 2006-11-28 2011-02-09 ザインエレクトロニクス株式会社 Comparator DC-DC converter
TWI411209B (en) * 2006-11-28 2013-10-01 Thine Electronics Inc Comparator mode DC to DC converter
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US9059632B2 (en) 2008-03-24 2015-06-16 O2Micro, Inc. Controllers for DC to DC converters
US8624573B2 (en) 2010-05-26 2014-01-07 Samsung Electronics Co., Ltd. Power converters including zero-current detectors and methods of power conversion
US8716990B2 (en) 2011-01-11 2014-05-06 Kabushiki Kaisha Toshiba Synchronous rectifying DC-to-DC converter device with compensated low-side switch offset voltage
US8872494B2 (en) 2012-02-10 2014-10-28 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device, DC-DC converter, and voltage conversion method
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JP2014027794A (en) * 2012-07-27 2014-02-06 Rohm Co Ltd Power supply device, power supply system and power supply method
US10381941B2 (en) 2017-10-25 2019-08-13 Fujitsu Limited Switching power supply device and synchronous rectifier circuit

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