JP2002110925A - System lsi - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a system LSI which is developed in one body, without sectioning into two and enables a user section to be evaluated by an external unit and can reduce the development time. SOLUTION: An internal CPU and a user section of the system LSI are manufactured in as one package, to reduce the development time. An external CPU is used for tests and evaluations, including the wiring setting, inspections, etc., of the user section, without forming a prototype board, but using an external CPU. In a second mode, the internal CPU is disconnected at a first connection switching circuit 40 from the user section 20, an external CPU 80 is connected through a second connection switching circuit 50 to the user section 20, the external CPU accesses the user section to evaluate this section. In the first mode after completing the evaluation, the external CPU can be disconnected at the second connection switching circuit from the user section, and the first connection switching circuit connects the internal CPU to the user section to make the system LSI function as a finished product.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system LSI, and more particularly, to a system LSI having a built-in CPU unit and a user unit.

[0002]

2. Description of the Related Art Conventionally, this type of system LSI can be roughly divided into two parts, for example, a microcomputer part and a user gate part.
The circuit was designed separately. After the circuit design, a prototype board is created, the hardware and firmware are debugged, and these are integrated into one package for cost reduction and other purposes. As a typical example, when an ASIC is used as a user unit, a CPU is used.
Since the ASIC exists outside, the CPU should be operated after the ASIC development to develop the program.

[0003]

SUMMARY OF THE INVENTION The above system LSI
In, the circuit design is divided into two sections, a microcomputer section and a user gate section using an ASIC or the like, and after that, a prototype board is prepared, so that it takes a lot of time. However, since the development period is shortened today, there is a case where there is no time to create a prototype board and development of hardware and a program must be performed in parallel. Development is a major issue.

The present invention has been made in order to solve the above-mentioned problem. When a system LSI is developed, it is not integrated into two parts as in the prior art, but is developed as one. ICE (In C
It is an object of the present invention to provide a system LSI that enables evaluation including wiring settings and the like by using an ircuit emulator and can shorten a development period.

[0005]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a system LSI having an internal CPU unit and a user unit built therein, and an interface signal between the internal CPU and the user unit. There is a circuit for switching to an interface signal between the external CPU incorporated in the external device and the user unit, and the external CPU can also access the user unit.

According to such a configuration, a system LSI
In developing the device, the internal CPU unit and the user unit can be manufactured as one package, and the evaluation of the user unit can be freely evaluated using an external CPU without creating a prototype board. After the evaluation, it can be used as a system LSI of a final product incorporating the internal CPU unit and the user unit.

Further, the present invention provides a system LSI having a built-in CPU unit, a user unit, and a plurality of bus lines interposed therebetween, for connecting to an external CPU unit incorporated in an external device. A plurality of external connection terminals provided corresponding to each of the plurality of bus lines, and a plurality of external connection terminals disposed between the internal CPU unit and the plurality of bus lines; And the user unit are connected by the plurality of bus lines to enable the internal CPU unit to access the user unit. When the second mode signal is received, the internal CPU unit is disconnected from the plurality of bus lines. A first connection switching circuit for disabling the internal CPU unit from accessing the user unit, and a second mode signal between the plurality of external connection terminals and the plurality of bus lines; When the user unit and the external CPU unit connected to the plurality of external connection terminals are connected by a plurality of bus lines to enable the external CPU unit to access the user unit and receive the first mode signal And a second connection switching circuit for disconnecting the plurality of external connection terminals and the plurality of bus lines and making it impossible for the external CPU unit to access the user unit.

According to such a configuration, a system LSI
When developing a new product, the internal CPU and the user should be manufactured as a single package, and the test evaluation including the wiring setting and inspection of the user can be freely performed using the external CPU without creating a prototype board. Can be. That is, in the case of the setting of the second mode, the internal CPU unit can be disconnected from the user unit at the first connection switching circuit, and the second connection switching circuit connects the external CPU unit to the user unit. The CPU unit can access the user unit and freely evaluate the user unit, as the internal CPU unit does. Therefore, in the case of setting the first mode after the evaluation of the user unit has been successfully completed, the external CPU unit can be disconnected from the user unit at the second connection switching circuit, and the first connection switching circuit is connected to the internal CPU. Since the unit is connected to the user unit, the system LSI can function as a final product system LSI incorporating the internal CPU unit and the user unit.

[0009]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a block diagram showing a configuration of a system LSI according to an embodiment of the present invention. As shown by FIG. 1, the system LSI 1
00 denotes an internal CPU unit 10, a user unit 20, a bus 30 including a plurality of bus lines 31, 32,.
A first connection switching circuit 40 that connects the internal CPU unit 10 to the bus 30 or disconnects the internal CPU unit 10 from the bus 30 based on the external selection signal SL;
A plurality of bus lines 31, 32,..., 3n are provided corresponding to the plurality of bus lines 31 to enable connection with the external device 70, that is, connection with the external CPU unit 80 incorporated in the external device 70. A second device that connects the external device 70 to the bus 30 or disconnects the external device 70 from the bus 30 based on the external connection unit 60 including the external connection terminals 61, 62, to 6n and the external selection signal SL. Connection switching circuit 50
And In this example, it is assumed that an ICE (In Circuit Emulator) is used as the external device 70. Also, the first and second connection switching circuits 4
As a specific example of 0 and 50, it would be easy to use a buffer circuit controlled by using the external selection signal SL or a switching signal generated from the external selection signal SL as an enable signal.

Next, the operation of the system LSI 100 shown in FIG. 1 will be described. When the external selection signal SL indicates the first mode (ICE not used), the internal CPU
The unit 10 becomes active and the first connection switching circuit 40
Connects the internal CPU unit 10 to the user unit 20 via the bus 30. On the other hand, the second connection switching circuit 50 receiving the external selection signal SL instructing the first mode disconnects the bus 30 from the external connection unit 60, and prevents the external device 70 from accessing the user unit 20. Block. When the setting of the first mode is completed, the system LSI 100 sets the bus 30 including the plurality of bus lines 31, 32,.
Operable as a completed product (when evaluation is completed) having the internal CPU unit 10 and the user unit 20 connected to each other, and the internal CPU unit 10 and the user unit 20
, An address signal, an R / W signal, a wait signal, a clock signal, and a data signal are exchanged via the bus 30.

In the above-described system LSI 100, when the external selection signal SL indicates the second mode (using ICE), the internal CPU unit 10 is in the standby state, and the first connection switching circuit 40 is in the standby state. Is disconnected from the bus 30. On the other hand, the second connection switching circuit 50 that has received the external selection signal SL instructing the second mode connects the bus 30 to the external connection unit 60, and the external CPU unit 80 of the external device 70
0, the second connection switching circuit 50, enabling access to the user unit 20 via the bus 30. Therefore, when viewed from the user unit 20, the bus 30 is in the first mode.
In the second mode, the external CPU unit 80 of the external device 70 connected via the bus 30 receives the access from the internal CPU unit 10 connected via the bus 30. In this case, if the internal CPU section 10 and the external CPU section 80 are set to perform the same function, the same function can be performed internally and externally for the user section 20 in both modes. Become.

With the configuration as in the above-described embodiment, even if the internal CPU unit 10 and the user unit 20 are integrated into the system LSI 100 as one package, the system LSI 100 can be connected to the second by the external selection signal SL. If set to the mode, IC
With E, test evaluation including wiring setting and inspection for the user unit 20 can be freely performed. Therefore, as in the past, the circuit was designed by dividing the whole into two parts,
After that, there is no need to create and evaluate a prototype board. Even though the board is made directly in the form of the final product, the evaluation process for the user unit 20 can be executed in the same manner as in the related art by setting the second mode. After that, since the finished product can be immediately completed, the development period can be extremely short.

[0013]

Since the system LSI of the present invention is configured as described above, the system LSI
When developing I, the internal CPU unit and the user unit are manufactured as one package, and the evaluation of the user unit can be freely evaluated using an external CPU without creating a prototype board. After the evaluation, the internal CP
System LSI of final product incorporating U part and user part
The development period can be extremely short. Further, if the connection switching between the internal CPU unit and the external CPU unit for the user unit is performed using the first and second connection switching circuits based on the external selection signal, the connection can be easily performed using a well-known buffer circuit or the like. Can be configured.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a system LSI of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Internal CPU part 20 User part 30 Bus 31, 32, ..., 3n bus line 40 1st connection switching circuit 50 2nd connection switching circuit 60 External connection part 61, 62, ..., 6n External connection terminal 70 External device 80 External CPU unit 100 System LSI

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Toyoaki Yokoi 2-93-2 Nakamachi, Musashino-shi, Tokyo F-term in Yokogawa Electric Corporation (reference) 2G032 AA01 AK02 AK12 AK14 AL00 5F038 DF04 DF06 DF11 DF17 DT02 DT05 EZ20

Claims (2)

[Claims] 1. A system LSI having an internal CPU unit and a user unit, wherein an interface signal between the internal CPU and the user unit is converted into an interface signal between an external CPU incorporated in an external device and the user unit. A system LSI comprising a switching circuit, wherein the external CPU can execute access to a user unit. 2. A system LS including an internal CPU unit, a user unit, and a plurality of bus lines disposed therebetween.
I, a plurality of external connection terminals provided corresponding to each of the plurality of bus lines for connection with an external CPU unit incorporated in an external device; and an internal CPU unit and a plurality of bus lines. When the first mode signal is received, the internal CPU unit and the user unit are connected by the plurality of bus lines to enable the internal CPU unit to access the user unit. A first connection switching circuit that disconnects the internal CPU unit from the plurality of bus lines to disable the internal CPU unit from accessing the user unit, When a second mode signal is received between the user unit and the external CPU unit connected to the plurality of external connection terminals via a plurality of bus lines, the external CPU unit is connected to the user unit. Nia And a second connection that, when receiving the first mode signal, disconnects the plurality of external connection terminals and the plurality of bus lines to disable the external CPU unit from accessing the user unit. A system LSI comprising a switching circuit.