JP2002077023A - Mobile communication terminal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a mobile communication terminal that adopts a TDMA (time division multiple access) system by which power consumption can efficient ly be reduced in a standby mode. SOLUTION: A TDMA control section 30 of the mobile correction circuit terminal adopting the TDMA system is provided with a high frequency oscillator 20 that generates a high frequency clock and with a low frequency oscillator 25 that generates a low frequency clock so as to configure a circuit (ST circuit) 30B operated by the high frequency clock and a circuit (RTC circuit) 30A operated by the low frequency clock in a switching enabled way, and the TDMA control section is immediately switched even from a standby mode into an active mode by an interruption signal INT from a man-machine interface 90.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technology effective for controlling an operation mode in a mobile communication terminal using a TDMA (time division multiple access) system, and more particularly to a technology for reducing power consumption during standby. About.

[0002]

2. Description of the Related Art One of the main access control methods in the current digital mobile communication is TDMA (Time Division Mud).
There is a ltiple access (time division multiple access) system, and this system is used in Japan in mobile communication terminals such as PHS.

In the TDMA system, one frequency band is divided on a time axis and is assigned to a plurality of users so that a plurality of users can communicate at the same time. Specifically, a certain length of time (frame) that is the basic cycle
Is further divided into a plurality of fixed time widths (time slots), each of which is allocated to each user terminal, and each user terminal intermittently transmits and receives signals within the time of its own time slot.

FIG. 6 is a schematic configuration diagram of a general mobile communication terminal using the TDMA system. A conventional mobile communication terminal includes a CP that controls access to a base station and the like according to each of standby and active modes of the mobile communication terminal.
U10, a high-frequency oscillator 20 for generating a high-frequency clock,
A radio unit / modulation / demodulation unit 40, a bit counter 50 and a time slot counter 60 for measuring time based on a clock supplied from the high-frequency oscillator 20 in the active mode and the standby mode, and a base station receiving information of the time slot counter in the standby mode It comprises a frame counter 70 for measuring the time until transmission (hereinafter, referred to as a burst) to the radio section, and a radio section control circuit 80 for supplying a burst signal to the radio section and the modem section. Here, a circuit including the high-frequency oscillator 20, the bit counter 50, the time slot counter 60, the frame counter 70, and the radio unit control circuit 80 controls the time for accessing the base station and the like based on the clock supplied from the high-frequency oscillator 20. Therefore, the TDMA control unit 30
Shall be called.

For example, an active mode and a standby mode in a domestic PHS communication terminal will be described. In PHS, one frame is 5 ms, one frame is divided into eight, and one time slot is 625.
μs.

In the active mode (during a call), a burst is performed in one of eight divided time slots (time slot 7 in the figure) as shown in FIG. 9, and the clock supplied from the high-frequency oscillator is 384 kHz. In this case, 240-bit data is transmitted and received in the time slot 7 for each frame.

FIG. 7 shows a flowchart of the TDMA control unit 30 in the active mode. First, step S
At 11, S12, the time slot counter 60 and the bit counter 50 are reset. In the next step S13, the bit counter is counted up based on the high frequency clock generated from the high frequency oscillator 20. In step S14, the value of the bit counter 50 (B
It is determined whether or not C) is “239”. If BC = 239, the time slot counter 60 is counted up in step S15, and if BC ≠ 239, step S1 is performed.
3 and steps S13 and S1 until BC = 239.
4 is repeated. After the time slot counter 60 is counted up in step S15, step S16
And the value (TSC) of the time slot counter 60 is "7"
Is determined, and if TSC = 7, step S17 is performed.
Then, the burst is performed. On the other hand, if TSC ≠ 7, the process returns to S12 and returns to step S12 until TSC = 7.
Steps S16 to S16 are repeated. By such control, in the active mode, a burst is performed in one of eight time slots divided for each frame as shown in FIG.

In the standby mode (standby state),
As shown in FIG. 10B, the burst is performed once every 240 frames, that is, once every 1.2 s (5 ms × 240) for one time slot (625 μs). In the standby mode as well as in the active mode, a 384 kHz high frequency clock generated from the high frequency oscillator 20 is counted by the bit counter 50, and the time slot counter 60 and the frame counter 70 respectively use the time slot number (TSC) and the frame number (FCC). ) Is counted to measure time, and bursts are performed at regular intervals.

FIG. 8 shows a flowchart of the TDMA control unit 30 in the standby mode. Step S22-
Step S27 is equivalent to the flowchart (FIG. 7) used in the description of the active mode. In the standby mode, the operation of the frame counter 70 is further added.

After the counters are reset in steps S21, S22 and S23, the bit counter 50 is counted up according to the high-frequency clock generated by the high-frequency oscillator 20, and the value (BC) of the bit counter is set to "23".
When "9" is reached, the time slot counter 60 is counted up (steps S24 to S26). In the active mode, bursting is performed when TSC = 7 in step S27. However, in the standby mode, when TSC = 7, the frame counter 70 is counted up (step S29). In step S29, the value (FC) of the frame counter is “239” (FC = 23).
If 9), a burst is executed. If FC ≠ 239, the flow returns to step S22 to return to step S22 until FC = 239.
To S29 are repeated. In this way, once every 240 frames, that is, once every 1.2 s (5 ms × 240)
Each time, the burst is controlled for one time slot (625 μs).

By the way, since a detachable battery is used as a power source for a normal mobile communication terminal, there is a limit to the time during which the mobile communication terminal can be continuously used by one battery. Therefore, it is desirable to reduce the power consumption of the mobile communication terminal in order to increase the time until the battery is consumed.

However, in the above-mentioned conventional mobile communication terminal, even in the standby mode, all controls are performed based on a high-frequency clock (master clock) such as 384 kHz generated by a high-frequency oscillator, so that power consumption is reduced. Cannot be reduced efficiently.

In view of the above, a low-frequency clock oscillator is provided in addition to the high-frequency clock oscillator, and a means for switching between an operation using a high-frequency clock and an operation using a low-frequency clock is added to the TDMA control unit, so that the standby mode can be efficiently performed. An invention for reducing power consumption in (power save mode) has been proposed (Japanese Patent Laid-Open No. 10-10773).
No.).

[0014]

The mobile communication terminal according to the present invention is effective in reducing power consumption in the standby mode. However, in the standby mode, the user inputs data until the next TDMA slot to perform a burst comes. However, there is a problem in terms of transmission / reception performance that the transmitted data is not transmitted, and the user cannot receive the data desired by the user. In other words, when a burst is performed at a period of 240 frames in the standby mode, for example, even if the user finishes inputting a transmission / reception command at the tenth frame, transmission / reception actually starts after 230 frames. Therefore, smooth transmission and reception cannot be performed.

An object of the present invention is to provide a mobile communication terminal using a TDMA (Time Division Multiple Access) system capable of improving transmission / reception performance in a standby mode and efficiently reducing power consumption.

[0016]

The summary of the invention disclosed in the present application is as follows. That is, a radio unit and a modulation / demodulation unit for transmitting and receiving a radio wave of the TDMA system, control means for controlling access to the base station according to an operation mode, a timer control unit for controlling a time for accessing the base station, A standby in which at least a man-machine interface for controlling external input is provided, an active mode in which data is transmitted and received at a predetermined cycle to and from the base station, and a data transmission and reception in a cycle longer than the data transmission and reception cycle in the active mode A mobile communication terminal having a mode, wherein the timer control unit includes a high-frequency oscillator that generates a high-frequency clock, a low-frequency oscillator that generates a low-frequency clock, and a clock supplied from the high-frequency oscillator or the low-frequency oscillator. A bit counter for counting, and TDM according to the information of the bit counter. It comprises a time slot counter for counting time slots, a frame counter for counting the number of frames according to the information of the time slot counter in the standby mode, and a radio unit control circuit for supplying a burst signal to the radio unit and the modem unit. If there is no external input or signal reception such as key operation for a predetermined period of time, the control means selects the standby mode, and the radio unit control circuit is stopped along with the stop of the output from the high frequency oscillator, and at the same time the low frequency A low-frequency clock is supplied to only the three counters from the oscillator, time measurement is started based on the low-frequency clock, and after a predetermined time has elapsed, the output from the low-frequency oscillator is stopped, and at the same time, the bit is output from the high-frequency oscillator. High frequency clock for counter and time slot counter And a time measurement is started based on the high-frequency clock. After a predetermined time elapses, a burst signal is supplied from the radio unit control circuit to the radio unit and the modem unit to transmit and receive data to and from the base station. When an interrupt signal is transmitted from the man-machine interface to the control means and the timer control section in the standby mode, the mode is immediately changed from the standby mode to the active mode.

Thus, in the standby mode, most of the frames are controlled by the low-frequency clock and only the frames for executing the burst are controlled by the high-frequency clock, so that the power consumption is reduced. Further, conventionally, even in the standby mode, a circuit which has been continuously supplied with a high-frequency clock and operated has been started up only when necessary. For example, the radio unit control circuit and the like are only operated by the high frequency clock when supplying the burst signal to the radio unit, and thus can be stopped together with the high frequency oscillator while the TDMA control unit is operated by the low frequency clock. As a result, power consumption in the standby mode can be more efficiently reduced.

Further, even in the standby mode, the mode is immediately changed to the active mode by an interrupt signal from the man-machine interface, so that transmission / reception to / from the base station is performed in one frame cycle after the mode is changed. Therefore, smooth transmission and reception becomes possible.

Further, when data transmission / reception in the standby mode has been performed with the same base station for a predetermined time, it is preferable to lengthen the cycle of executing the burst. Thereby, power consumption can be reduced more effectively.

In other words, a mobile communication terminal using the TDMA system executes a burst at a predetermined cycle even in a standby mode to ensure optimal transmission and reception in a moving state, and is optimal for constantly transmitting and receiving. Although the base station is selected, if the communication terminal is in the same place for a long time, the base station that performs transmission and reception with the communication terminal does not change, so executing a burst in a short cycle wastes power. You are doing. Therefore, if the base station that performs transmission and reception with the communication terminal for a predetermined period of time does not change, it can be determined that the communication terminal is not in a moving state. Can be reduced well.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic configuration diagram of a mobile communication terminal according to the present invention. The mobile communication terminal according to the present embodiment includes a CPU 10 for controlling access to a base station or the like according to a standby mode or an active mode, and an R for controlling time and the like by operating each circuit based on a low frequency clock.
ST circuit (System T) for controlling the time for operating each circuit in the terminal based on a TC circuit (Real Time Clock circuit) 30A and a high frequency clock and performing a burst.
imming circuit) 30B, a TDMA control unit 30, a radio unit and a modem unit 40, and an interrupt signal INT for changing from a standby mode to an active mode when a key operation is performed.
It is schematically constituted by an MMI (Man-Machine Interface) 90 such as a key scan circuit for supplying a T circuit.

The mobile communication terminal of this embodiment automatically enters the standby mode if there is no external operation such as key operation or reception from the base station during the first predetermined time (for example, 5 ms). As shown in FIG. 10A, in the standby mode, the RTC circuit operates based on the low-frequency clock (32 kHz) from the 0th frame to the 238th frame.
Only the 239th frame uses the high frequency clock (38
4 kHz), and a burst is performed in the seventh time slot of the 239th frame. Note that the mobile communication terminal according to the present embodiment also performs control to turn off the backlight of the liquid crystal display panel if there is no external input such as a key operation for a second predetermined time (for example, 10 s).

When an external input such as a key operation is performed during the standby mode, an interrupt signal INT is supplied to the CPU 10, the RTC circuit 30A, and the ST circuit 30B via the MMI 90, and the CPU 10 determines that the CPU 10 is in the active mode. Then, the RTC circuit 30A is reset and S
The T circuit is started. As a result, as soon as the user starts the key input, the active mode is activated, and the burst is executed in one frame period. Therefore, when the key input operation is completed and the transmission / reception operation is requested, the input information is burst almost simultaneously and the smooth transmission / reception is possible. Becomes

FIG. 2 shows a specific configuration of the RTC circuit 30A and the ST circuit 30B. The RTC circuit 30A is a circuit that measures the time from immediately after the burst to one frame before the burst in the standby mode. The RTC circuit 30A generates a low-frequency clock, and measures the time based on the clock supplied from the low-frequency oscillator 25. A bit counter (R) 51 to be measured, a time slot counter (R) 61,
It comprises a frame counter 70 and the like.

The ST circuit 30B is a circuit for accurately measuring time in the active mode and the standby mode and executing a burst, and has a high frequency (38 in this embodiment).
4 kHz), a bit counter (S) 52 for measuring time based on the clock supplied from the high frequency oscillator 20, a time slot counter (S) 62, and a burst signal to the radio section and the modem section. It is composed of a radio control circuit and the like to supply.

Next, the operation procedure of the TDMA control unit according to this embodiment will be described with reference to the flowcharts shown in FIGS. First, the CPU 10 determines whether the current mode is the standby mode or the active mode.

First, in the case of the active mode, the ST circuit 30B is selected, and the control is executed based on the high frequency clock according to the flowchart shown in FIG. The flow chart shown in FIG. 4 is substantially the same as the flow chart (FIG. 7) shown in the prior art, and a description thereof will be omitted. However, the time slot counter and bit counter in FIG. It corresponds to the counter (S). Step S10
After the burst is performed in step 7, the mode is determined by the CPU 10. If the mode is the active mode, the TDMA control unit is controlled according to the flowchart of FIG.

Next, in the case of the standby mode, first, R
When the TC circuit 30A is selected and based on the low frequency clock, FIG.
The control according to the flowchart shown in FIG. At this time, since the RTC circuit 30A of the present embodiment is operated by the clock of 32 kHz, one time slot (625 μs) is formed by 20 bits.

At steps S111, S112 and S113, the frame counter 70 and the time slot counter (R)
61, after the bit counter (R) 51 is reset,
The bit counter (R) is counted up based on the 32 kHz low frequency clock generated by the low frequency oscillator 25, and the value (BC1) of the bit counter (R) is "19".
When (BC1 = 19), the time slot counter (R) is counted up (steps S114 to S114).
116). In step S117, it is determined whether the value (TSC1) of the time slot counter (R) is "7" (TSC1 = 7). If TS1 = 7, the frame counter is counted up. If TSC1 ≠ 7, the flow returns to step S114 to repeat step S1 until TSC1 = 7.
13 to S117 are repeated.

In step S119, it is determined whether the value (FC) of the frame counter is "238" (FC = 238). If FC = 238, the operation in the RTC circuit is terminated, and the operation shifts to the operation in the ST circuit. Then, control according to the flowchart of FIG. 4 is started. If FC ≠ 238, the process returns to step S113 and returns to step S1 until FC = 238.
13 to S119 are repeated.

As described above, in the standby state, each counter in the RTC circuit counts up based on the low frequency clock to measure the time, and when the predetermined time has elapsed, control is performed so as to shift to the operation of the ST circuit. .

However, in the RTC circuit, step S1
During the processing of each counter in steps S11 to S114, S116, and S118, control is also performed such that the operation immediately shifts to the operation of the ST circuit when an interrupt signal INT is input from the MMI 90 by key input or the like. The operation in the RTC circuit is invalidated at the same time as the operation proceeds to the operation of the ST circuit. Thus, control according to the flowchart of FIG. 4 is started.

First, in steps S101 and S102, the time slot counter (S) 62 and the bit counter (S)
52 is reset. Then, based on the 384 kHz high frequency clock generated by the high frequency oscillator 20, the bit counter (S) is counted up in step S103. Next, in step S104, the value (BC2) of the bit counter (S) is "239" (BC2 = 239).
Is determined, and if BC2 = 239, the process proceeds to step S
At 105, the time slot counter (S) is counted up, and if BC2 ≠ 239, the flow returns to step S103 to repeat steps S103 and S10 until BC2 = 239.
4 is repeated. Then, after the time slot counter (S) is counted up in step S105,
In step S106, it is determined whether the value (TSC2) of the time slot counter (S) is "7" (TSC2 = 7), and if TSC2 = 7, the process proceeds to step S107 to perform a burst. On the other hand, if TSC2 ≠ 7, S1
02 and return to steps S102-S until TSC = 7
Step 106 is repeated. After the burst is performed in step S107, the CPU 10 determines the mode. If the mode is the standby mode, the TDMA control unit is controlled according to the flowchart of FIG.

As described above, up to 239 frames out of 240 frames (1.2 s) are operated by the RTC circuit based on the low frequency clock, and only the 240th frame is operated by the ST circuit based on the high frequency clock. By executing the burst, power consumption in the standby state can be efficiently reduced. That is,
Circuits that were conventionally controlled by a high-frequency clock can save power by controlling them with a low-frequency clock, while circuits that are controlled only by a high-frequency clock (such as a radio unit control circuit) are controlled by a low-frequency clock. (0-239 frames)
Can be expected to further save power.

Further, in the communication terminal of this embodiment, the following burst cycle control is performed during the standby mode. FIG. 11 is an explanatory diagram illustrating an example of a burst cycle in the standby mode of the communication terminal according to the present embodiment. Normally, a burst is executed once every 240 frames as shown in FIG.

For a predetermined time (for example, 6 hours), if the communication terminal and the base station that transmitted and received are the same, FIG.
A burst is executed once every 480 frames as shown in FIG. That is, the 479th frame is operated by the RTC circuit based on the low frequency clock, and only the 480th frame is operated by the ST circuit based on the high frequency clock to execute the burst.

If the communication terminal and the base station that transmitted and received are the same for a predetermined time (for example, 6 hours),
The burst is executed once in 720 frames as in 1 (c). That is, the 719th frame is operated by the RTC circuit based on the low frequency clock, and only the 720th frame is operated by the ST circuit based on the high frequency clock to execute the burst.

As a result, the operation time of the RTC circuit with the low-frequency clock becomes longer, thereby saving power.
Since the number of bursts is reduced, power consumption due to the execution of the burst can also be reduced.

In the present embodiment, the burst cycle is changed every six hours. However, the burst cycle may be changed in a shorter time, or the time for changing the burst cycle may be set by the user. You can also. Alternatively, a mode having a long burst cycle can be selected by key input or the like. In addition to changing the burst cycle according to the elapsed time, the burst cycle can be changed (longened) even when the remaining battery power becomes lower than a certain value.

Although the invention made by the inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments. For example, in this embodiment, RT
An example in which the C circuit and the ST circuit are separately configured has been described.
It is also possible to use a circuit in which the bit counter and the time slot counter are shared as shown in FIG.

At this time, while the TDMA control unit is operated based on the low frequency clock in the standby mode, the clock output from the high frequency oscillator 20 is stopped, and a circuit such as the radio unit control circuit 80 operating only based on the high frequency clock is used. Is controlled to stop. On the other hand, the frame counter 70 that operates only on the basis of the low-frequency clock may be configured to be supplied with only the low-frequency clock from the low-frequency oscillator 25, and is stopped while operating based on the high-frequency clock. Note that both the high-frequency oscillator 20 and the low-frequency oscillator 25 are always started, and the clock supplied to the circuit may be switched between the high-frequency clock and the low-frequency clock, or one of the oscillators may be started. The other oscillator may be configured to stop when it is running.

[0042]

The effects obtained by the invention disclosed in the present application will be briefly described as follows. That is, in a mobile communication terminal using a TDMA system, a TDMA control unit is provided with a high-frequency oscillator for generating a high-frequency clock and a low-frequency oscillator for generating a low-frequency clock. The circuit that operates with only one of the low-frequency clock and the high-frequency clock is stopped while the TDMA control unit operates based on the other clock. As a result, the power consumption in the standby mode can be efficiently reduced. In addition, the mode is immediately changed from the standby mode to the active mode by an interrupt signal from the man-machine interface. After the mode change, a burst is performed in one frame cycle, so that smooth transmission and reception can be performed.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a mobile communication terminal of the present embodiment.

FIG. 2 is a specific example of an RTC circuit and an ST circuit constituting a TDMA control unit of the mobile communication terminal according to the present embodiment.

FIG. 3 is a flowchart showing an operation of the RTC circuit.

FIG. 4 is a flowchart showing the operation of the ST circuit.

FIG. 5 is another example of the TDMA control unit.

FIG. 6 is a schematic configuration diagram of a conventional mobile communication terminal.

FIG. 7 is a flowchart showing an operation in an active mode in a conventional mobile communication terminal.

FIG. 8 is a flowchart showing an operation in a standby mode in a conventional mobile communication terminal.

FIG. 9 is an explanatory diagram showing a burst method in an active mode of a mobile communication terminal using a TDMA scheme.

FIG. 10 is an explanatory diagram showing a burst method (a) in a standby mode of a mobile communication terminal of the present invention and a burst method (b) of a conventional mobile communication terminal in a standby mode.

FIG. 11 is an explanatory diagram illustrating a burst cycle according to the present embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 CPU 20 High frequency oscillator 25 Low frequency oscillator 30 TDMA control unit 30A RTC circuit 30B ST circuit 40 Radio unit and modulation / demodulation unit 50 bit counter 60 Time slot counter 70 Frame counter 80 Radio unit control circuit 90 Man-machine interface (MMI)

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5K011 BA00 BA06 DA00 DA06 JA01 KA03 5K028 AA00 BB06 CC02 CC05 DD01 DD02 HH03 SS11 5K067 AA43 CC04 CC22 EE02 EE10 GG03 GG11 HH21 HH22 KK00 KK13

Claims (1)

[Claims] 1. A radio unit and a modulation / demodulation unit for transmitting and receiving a radio wave of a TDMA system, control means for controlling access to a base station according to an operation mode, and timer control for controlling a time for accessing the base station. Unit, and at least a man-machine interface for controlling external input, an active mode in which data is transmitted and received to and from the base station in a predetermined cycle, and data transmission and reception in a cycle longer than the data transmission and reception cycle in the active mode. A mobile communication terminal having a standby mode to be performed, wherein the timer control unit includes: a high-frequency oscillator that generates a high-frequency clock; and a low-frequency oscillator that generates a low-frequency clock.
A bit counter that counts a clock supplied from the high-frequency oscillator or the low-frequency oscillator, a time slot counter that counts a TDMA time slot according to the information of the bit counter, and a bit counter that counts the time slot counter in a standby mode. It is composed of a frame counter for counting the number of frames, and a radio unit control circuit for supplying a burst signal to the radio unit and the modem unit. If there is no external input such as key operation for a predetermined time or reception of a signal, a standby mode is set by the control unit. Is selected, and the radio control circuit is stopped along with the stop of the output from the high-frequency oscillator. At the same time, the low-frequency oscillator supplies a low-frequency clock to only the three counters, and measures time based on the low-frequency clock. Is started and a predetermined time elapses At the same time, the output from the low-frequency oscillator is stopped, and at the same time, a high-frequency clock is supplied from the high-frequency oscillator to the bit counter and the time slot counter, and time measurement is started based on the high-frequency clock. A burst signal is supplied from the unit control circuit to the radio unit and the modem unit to transmit and receive data to and from the base station, and in a standby mode, an interrupt signal is transmitted from the man-machine interface to the control unit and the timer control unit. Wherein the mobile communication terminal changes the mode from the standby mode to the active mode when transmitted to the mobile communication terminal.