JP2002033464A - Method for fabricating semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technology for fabricating a high performance opto electronic device using a plastic support. SOLUTION: A first fixed substrate 101 and an element forming substrate 103 of resin are stuck through a first adhesion layer and then a semiconductor element and a light emitting element are formed on the element forming substrate. A second fixed substrate 106 of resin is then stuck onto the light emitting element through a second adhesion layer 107. Subsequently, it is irradiated with YAG laser under that state thus removing the first adhesion layer 102 and separating or stripping the first fixed substrate 101.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a device having a device in which a light-emitting material is interposed between electrodes (hereinafter, referred to as a light-emitting device) (hereinafter, referred to as a light-emitting device). In particular, a light-emitting device using a light-emitting material capable of obtaining EL (ElectroLuminescence) (hereinafter referred to as EL material), that is, E
The present invention relates to an electro-optical device typified by an L display panel and an electronic device having such an electro-optical device mounted as a component.

[0002] In this specification, a semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics, and an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.

[0003]

2. Description of the Related Art In recent years, a light emitting device (hereinafter, referred to as an EL display device) using a light emitting element utilizing an EL phenomenon of a light emitting material (hereinafter, referred to as an EL element) has been developed. E
The L display device has a structure having an EL element having a structure in which an EL material is interposed between an anode and a cathode. By applying a voltage between the anode and the cathode to flow a current through the EL material, the carriers are recombined to emit light. That is, the EL display device does not need a backlight as used in a liquid crystal display device because the light emitting element itself has a light emitting ability. Further, it has the advantages of a wide viewing angle, light weight, and low power consumption.

Various applications using such an EL display device are expected.
Since the thickness of the display device is small, and therefore, the weight of the display device can be reduced, attention has been paid to the use of the display device in a portable device. Therefore, it has been attempted to form a light emitting element on a flexible plastic film.

[0005] However, since the heat resistance of the plastic film is low, the maximum temperature of the process must be lowered, and as a result, it is impossible to form a TFT having better electric characteristics as when formed on a glass substrate. . Therefore, a high-performance light-emitting device using a plastic film has not been realized.

Japanese Patent Application Laid-Open No. 8-288522 describes a technique in which a thin film transistor is formed on a glass substrate, a resin substrate is bonded via a sealing layer, and then the glass substrate is peeled off. When this technology is used, TFT
Active layer is only protected by the base insulating film,
There has been a problem that the TFT is easily deteriorated.

In Japanese Patent Application Laid-Open No. H11-243209, after a separation layer is provided, separation is caused in the separation layer by a laser beam, and then the first transfer body is bonded via an adhesive layer. After joining the secondary transfer body,
Techniques for removing the primary transfer are described. Even when this technique is used, there is a problem that the active layer of the TFT is protected only by the base insulating film during the manufacturing process, so that the TFT is easily damaged and the TFT is easily deteriorated.

[0008]

SUMMARY OF THE INVENTION An object of the present invention is to provide a technique for manufacturing a high-performance electro-optical device using a plastic support (including a flexible plastic film or a plastic substrate). And

[0009]

SUMMARY OF THE INVENTION According to the present invention, an element forming substrate made of a plastic support is adhered to a first fixing substrate having heat resistance as compared with plastic with a first adhesive layer, and then the element forming substrate is bonded. After forming the necessary elements on the first
It is characterized in that the fixed substrate is separated.

After bonding an element formation substrate on the first fixed substrate with a first adhesive layer, necessary elements are formed on the element formation substrate, and a second fixed substrate is formed on the second fixed substrate. After bonding with the adhesive layer, the first fixed substrate may be separated. By providing the second fixed substrate and the second adhesive layer, necessary elements are protected, and E and E of external moisture and oxygen are protected.
It is possible to prevent a substance that promotes deterioration of the L layer due to oxidation from entering.

In the case of an active matrix type electro-optical device, the necessary elements refer to a semiconductor element (typically, a TFT) or an MIM element used as a pixel switching element and a light emitting element. In the case of a passive electro-optical device, it refers to a light emitting element.

The method of bonding the first fixed substrate and the element forming substrate is not particularly limited, but as shown in FIG. 1, after the first adhesive layer is formed on the first fixed substrate, the element forming substrate is bonded. Or a method of forming the first adhesive layer on the element forming substrate and then bonding the first fixed substrate.

As the element forming substrate and the second fixed substrate made of a plastic support, a resin substrate having a thickness of 10 μm or more, for example, PES (polyethylene sulfide),
PC (polycarbonate), PET (polyethylene terephthalate) or PEN (polyethylene naphthalate) can be used. After forming an adhesive layer on the first fixed substrate, an organic resin layer (a polyimide layer, a polyamide layer, a polyimideamide layer, a BCB (benzocyclobutene) layer, etc.) was formed thereon, and the element formation substrate May be called.

Further, as the element forming substrate, a metal substrate,
For example, a stainless steel substrate can be used. In that case, a required element may be formed by forming a base insulating film over a metal substrate. By using a thin metal substrate (thickness: 10 to 200 μm), a light-emitting device which can be reduced in weight and thickness and has flexibility can be obtained.

The first fixed substrate is separated after necessary elements are formed on the element forming substrate. As a typical means, all or part of the first adhesive layer is irradiated by laser light irradiation. Is used. In place of laser beam irradiation, for example,
A method for separating the first fixed substrate by etching described in Japanese Patent Application Publication No. 2 (1993) -209, and a method for separating the first fixed substrate by jetting a fluid (a liquid or a gas to which pressure is applied) to the first adhesive layer. (Typically water jet method)
May be used, or these may be used in combination.

As the laser beam, a pulse oscillation type or continuous emission type excimer laser, YAG laser, YV
An O ₄ laser can be used. As shown in FIG. 3D, a laser beam is passed through the first fixed substrate from the back surface and irradiates the first adhesive layer to vaporize only the first adhesive layer, thereby separating or separating the first fixed substrate. Therefore, as the first fixed substrate, at least a substrate through which a laser beam to be irradiated passes, typically, a substrate having a light-transmitting property, such as a glass substrate or a quartz substrate, is used. Is preferred.

In the present invention, since the laser beam passes through the first fixed substrate, it is necessary to appropriately select the type of the laser beam and the first fixed substrate. For example, if a quartz substrate is used as the first fixed substrate, a YAG laser (a fundamental wave (1064 nm), a second harmonic (532 nm), a third harmonic (355 nm), a fourth harmonic (266 nm), or an excimer laser) (Wavelength: 308 nm), a linear beam may be formed and passed through a quartz substrate, and an excimer laser does not pass through a glass substrate, so that if a glass substrate is used as the first fixed substrate, a YAG laser is used. A linear beam may be formed using the fundamental wave, the second harmonic, or the third harmonic, preferably using the second harmonic (wavelength: 532 nm), and may be transmitted through the glass substrate.

Further, an organic substance is used as the first adhesive layer,
Preferably, a laser beam which is entirely or partially vaporized by the irradiated laser beam is used. In order to efficiently absorb laser light only in the first adhesive layer, the first adhesive layer has a property of absorbing laser light, for example, when a second harmonic of a YAG laser is used, it is colored or black. (For example, a resin material containing a black colorant) is preferably used. However, a material that does not vaporize by heat treatment in the element formation step is used for the first adhesive layer. Further, the first adhesive layer may be a single layer or a stacked layer, and may have a structure in which an amorphous silicon film or a DLC film is provided between the first adhesive layer and the element formation substrate as shown in FIG. .

With such a structure, the thickness of the element forming substrate is very small, specifically, 50 μm to 3 μm.
Even with the use of a substrate having a thickness of 00 μm, preferably 150 μm to 200 μm, a highly reliable light-emitting device can be obtained. In addition, although it was difficult to form an element on such a thin substrate using a known known manufacturing apparatus, the present invention is intended to perform element formation by bonding to a first fixed substrate. In addition, a manufacturing apparatus using a thick substrate can be used without modifying the apparatus. Further, during the element formation step, the heat resistance of the element formation substrate can be improved by sandwiching the element formation substrate between the insulating film formed on the element formation substrate and the first fixed substrate. .

According to the structure of the invention disclosed in this specification, a first fixed substrate and an element forming substrate are attached to each other with a first adhesive layer provided on the element forming substrate, and after the element forming substrate is attached, an insulating layer is formed. Forming a film, forming a light emitting element on the insulating film, bonding a second fixed substrate on the light emitting element with a second adhesive layer, and removing the first adhesive layer by laser light irradiation And separating the first fixed substrate.

According to another aspect of the invention, a first fixed substrate and an element forming substrate are bonded to each other with a first adhesive layer provided on the fixed substrate, and an insulating film is formed after bonding the element forming substrate. Forming a light emitting element on the insulating film, bonding a second fixed substrate on the light emitting element with a second adhesive layer, and removing the first adhesive layer by irradiating a laser beam; A method for manufacturing a semiconductor device, comprising separating a first fixed substrate.

In each of the above structures, the element forming substrate and the second fixed substrate are characterized by being a support (including a flexible plastic film or a plastic substrate) made of an organic resin. Further, as the element forming substrate and the second fixed substrate, those having a smaller thickness than the first fixed substrate are used.

In each of the above structures, an amorphous silicon thin film may be formed between the element forming substrate and the first adhesive layer. Further, a diamond-like carbon thin film may be formed between the element forming substrate and the first adhesive layer.

In each of the above structures, the first adhesive layer may be colored or black using a pigment or dye to absorb the laser beam.

Further, in each of the above structures, the laser beam is irradiated by forming a linear beam and scanning the laser beam, and the laser beam is a pulse oscillation type or continuous emission type excimer laser. Alternatively, a YAG laser or a YVO ₄ laser can be used.

Further, in each of the above structures, the laser light is applied by passing the first fixed substrate from the back side of the first fixed substrate through the first fixed substrate and providing the laser light on the front surface of the first fixed substrate. The method is characterized in that the laser beam is applied to one adhesive layer. Therefore, it is preferable that the first fixed substrate transmits a laser beam to be used.

[0027]

Embodiments of the present invention will be described below.

First, the first fixed substrate 101 and the element forming substrate 103 are bonded together. There are two bonding methods as shown in FIG.

The first method is to provide the first adhesive layer 102 on the first fixed substrate 101 and then bond the first fixed substrate 101 and the element forming substrate 103 together. (Figure 1
(A1)) The state after bonding is shown in FIG. 1 (B1).

In the second method, the element forming substrate 10
3, after the first adhesive layer 102 is provided, the first fixed substrate 101
And the element formation substrate 103.
(FIG. 1 (A2)) The state after bonding is shown in FIG.
It was shown in 2).

Although not shown here, after forming a first adhesive layer on a first fixed substrate, an organic resin layer (polyimide layer, polyamide layer, polyimide amide layer, etc.) is formed thereon. It may be equivalent to an element forming substrate.

Further, as shown in FIG. 2A, an a-Si (amorphous silicon) layer 202A may be provided between the first adhesive layer 202B and the element forming substrate 203. In a later step, the first fixed substrate 201 may be separated by irradiating the a-Si layer with a laser beam. It is preferable to use an a-Si layer containing a large amount of hydrogen so that the first fixed substrate 201 is easily separated or separated. By irradiating a laser beam, hydrogen contained in the a-Si layer is vaporized to separate or separate the first fixed substrate.

As shown in FIG. 2B, a DLC film (specifically, a diamond-like carbon film) for protecting the element formation substrate 206 is provided between the first adhesive layer 205B and the element formation substrate 206. ) May be provided. The first
The fixed substrate 204 is the first fixed substrate 101 shown in FIG.
Is the same as

In this case, a device in which a DLC film is coated with a thickness of 2 to 50 nm as a protective film on one or both surfaces of the element forming substrate may be used. Note that the DLC film may be formed by a sputtering method or an ECR plasma CVD method. The characteristics of the DLC film has a peak of asymmetric about 1550 cm ^-1, a Raman spectrum distribution with a shoulder around 1300 cm ^-1. Further, it has a feature of exhibiting a hardness of 15 to 25 GPa when measured with a micro hardness tester. Such a carbon film has a role of preventing oxygen and water from entering and protecting the surface of the resin substrate.
In this manner, it is possible to prevent a substance that promotes deterioration of the EL layer due to oxidation, such as moisture and oxygen, from entering from the outside.
Therefore, a highly reliable EL light emitting device can be obtained.

As shown in FIG. 2C, a first DLC film 208A for protecting the element forming substrate and a first fixed substrate 207 are provided between the first adhesive layer 208C and the element forming substrate 209. A second DLC film 208B for facilitating separation or separation may be provided. Such first
As the DLC film 208A, a film formed under hydrogen-free film formation conditions may be used, and as the second DLC film 208B, a film formed under hydrogen-containing film formation conditions may be used. Also,
By irradiating the second DLC film 208B with a laser beam, the hydrogen contained in the film is vaporized to form the first fixed substrate 207.
May be separated or separated.

FIG. 3 (A) shows the state after bonding obtained by each of the above methods. Here, FIG. 1 (B1)
And the same as those in FIG. 1 (B2). Note that the same reference numerals as those in FIGS. 1B1 and 1B2 are used.

Next, after forming a base insulating film on the element forming substrate 103, necessary elements are formed on the base insulating film. Here, an example is described in which a pixel portion 105 including a driver circuit 104 and an EL element is formed. (FIG. 3 (B))

Next, the second fixed substrate 106 is bonded with the second adhesive layer 107. (FIG. 3C) Although the second fixed substrate 106 is used here to protect the EL element from intrusion of moisture, oxygen, and the like from the outside, it is not necessary to use the second fixed substrate 106 unless it is particularly necessary. As the second fixed substrate 106,
A resin substrate may be used, and a substrate provided with a DLC film as a protective film on one or both surfaces may be used.

Next, the first fixed substrate 101 is separated by irradiating a laser beam from the back side to vaporize all or a part of the first adhesive layer 102. (FIG. 3D) Therefore, the first
For the adhesive layer 102, a substance which causes a peeling phenomenon in a layer or at an interface by laser light is used. Further, a laser beam that passes through the first fixed substrate 101 and is absorbed by the first adhesive layer is appropriately selected. For example, if a quartz substrate is used as the first fixed substrate, a YAG laser (basic wave (1
064 nm), the second harmonic (532 nm), the third harmonic (355 nm), the fourth harmonic (266 nm) or an excimer laser (wavelength 308 nm) to form a linear beam and pass through a quartz substrate. Good. Note that the excimer laser does not pass through the glass substrate. Therefore, if a glass substrate is used as the first fixed substrate, a fundamental wave, a second harmonic, and a third harmonic of a YAG laser can be used, and a linear wave is preferably formed using the second harmonic (wavelength 532 nm). What is necessary is just to form a beam and let it pass through a glass substrate.

Finally, a light emitting device sandwiched between an element forming substrate as a resin substrate and a second fixed substrate as a resin substrate is completed.

As shown in FIG. 23, a light emitting device in which an element forming layer (including an EL element) is sandwiched between an element forming substrate 103 which is a resin substrate and a second fixed substrate 106 which is a resin substrate has a small size. It has flexibility that it does not break even when stress is generated. FIG. 23A shows a state when no curvature is given, and FIG. 23B shows a state when a curvature is given. In FIG. 23B, a compressive stress acts on the element forming substrate and a tensile stress acts on the second fixed substrate, but the stress hardly acts on the element forming layer, and the expansion and contraction in the central portion is ± 1 μm or less. It can be. It should be noted that there is no problem even if the curvature radius is given up to 10 cm.

The present invention having the above configuration will be described in more detail with reference to the following embodiments.

[0043]

[Embodiment 1] In this embodiment, an example of a method for manufacturing a light emitting device sandwiched between an element forming substrate which is a resin substrate and a second fixed substrate which is a resin substrate will be described with reference to FIGS. In addition,
Here, all the steps are performed at 350 ° C. or less, preferably 20 ° C.
It is performed at 0 ° C. or lower. However, it goes without saying that the present invention is not limited to this embodiment.

First, a glass substrate is used as the first fixed substrate 101. Then, the first fixed substrate 101 and the element forming substrate 103 which is a resin substrate were bonded to each other with the first adhesive layer 102 by using any of the methods described in the embodiments.
(FIG. 3 (A))

Next, after forming a base insulating film on the element forming substrate 103, necessary elements are formed on the base insulating film. Here, an example is described in which a pixel portion 105 including a driver circuit 104 and an EL element is formed. (FIG. 3 (B))

As the base insulating film, a silicon oxynitride film containing more nitrogen than oxygen in the film composition and a film containing more oxygen than nitrogen in the film composition are formed by a sputtering method capable of forming a film at a low temperature. A silicon oxynitride film was stacked.

Next, a semiconductor layer is formed on the base insulating film. Although the material of the semiconductor layer is not limited, preferably, silicon or silicon germanium (Si _x Ge _1-x (0 <X
<1)) It is good to form with an alloy etc. In this embodiment, an amorphous silicon film is formed by a sputtering method capable of forming a film at a low temperature, and a crystalline silicon film is formed by a laser crystallization method. When a crystalline semiconductor film is formed by a laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, a YAG laser, or a YVO ₄ laser can be used.

Next, a gate insulating film covering the semiconductor layer is formed. In this embodiment, a silicon oxide film is formed by a sputtering method capable of forming a film at a low temperature.

Next, a conductive layer is formed on the gate insulating film. The conductive layer is formed by forming a conductive film by a known means (a thermal CVD method, a plasma CVD method, a reduced pressure thermal CVD method, an evaporation method, a sputtering method, or the like), and then patterning the conductive film into a desired shape using a mask. I do.

Next, an impurity element imparting n-type or an impurity element imparting p-type is appropriately added to the semiconductor layer by ion implantation or ion doping, and LDD is performed.
An impurity region which forms a region, a source region, and a drain region is formed.

After that, an interlayer insulating film is formed using a silicon nitride film, a silicon nitride oxide film, or a silicon oxide film manufactured by a sputtering method. The added impurity element is activated. Here, laser light irradiation was performed. Activation may be performed by heat treatment at 350 ° C. or lower instead of laser light irradiation.

Next, after forming a contact hole reaching a source region or a drain region by using a known technique, a source electrode or a drain electrode is formed to obtain a TFT.

Next, hydrogenation is performed using a known technique, and the whole is hydrogenated to complete an n-channel TFT or a p-channel TFT. In this embodiment, the hydrogenation treatment is performed using hydrogen plasma which can be performed at a relatively low temperature.

Next, an interlayer insulating film is formed using a silicon nitride film, a silicon nitride oxide film, or a silicon oxide film manufactured by a sputtering method. Next, after forming a contact hole reaching the drain electrode of the pixel portion using a known technique, a pixel electrode is formed. Next, banks are formed at both ends of the pixel electrode, and the EL layer and the E layer are formed on the pixel electrode.
The anode (or cathode) of the L element is formed.

Next, all the elements included in the pixel portion and the driving circuit are covered with an insulating film.

Next, an insulating film covering all the elements formed on the element forming substrate and the second fixed substrate 106 are formed on the second adhesive layer 1.
Attach at 07. (FIG. 3 (C)) Here, E
Although the second fixed substrate 106 is used to protect the L element from intrusion of moisture, oxygen, or the like from the outside, it may not be used unless it is particularly necessary. As the second fixed substrate 106, a resin substrate may be used, and a substrate provided with a DLC film as a protective film on one or both surfaces may be used.

Next, the first fixed substrate 101 is separated by irradiating a laser beam from the back side to vaporize all or a part of the first adhesive layer 102. (FIG. 3D) In this embodiment, since a glass substrate is used as the first fixed substrate, YA
The fundamental wave, the second harmonic, and the third harmonic of the G laser are used. Here, a linear beam was formed using a second harmonic (wavelength: 532 nm), and the first adhesive layer was irradiated by passing through a glass substrate serving as the first fixed substrate 101.

Finally, a light emitting device sandwiched between an element forming substrate as a resin substrate and a second fixed substrate as a resin substrate was completed. Each film (insulating film,
Semiconductor film, conductive film, etc.)
It can be carried out at a temperature of 0 ° C or lower, preferably 200 ° C or lower.

[Embodiment 2] In this embodiment, a p-channel type T
This is an example of manufacturing an FT, which will be described with reference to FIGS.

First, the first fixed substrate 401 and the first adhesive layer 4
A base insulating film 404 is formed over the element formation substrate 403 attached with 02 (separation layer). As the base insulating film 404, a silicon oxide film, a silicon nitride film, a silicon nitride oxide film (SiOxNy), a laminated film of these, or the like is used.
The film can be used in a thickness range of 0 to 500 nm. As a forming means, a forming method such as a thermal CVD method, a plasma CVD method, an evaporation method, a sputtering method, and a reduced pressure thermal CVD method can be used.

In this embodiment, a silicon oxynitride film containing more nitrogen than oxygen in the film composition and an oxide containing more oxygen than nitrogen in the film composition are formed by a sputtering method capable of forming a film at a low temperature. A silicon nitride film was stacked.

The first fixed substrate 401 and the first adhesive layer 4
Any element manufactured by the method described in the above embodiment can be applied to the element formation substrate 403 attached with 02 (separation layer).

Next, a semiconductor layer 405 is formed over the base insulating film. The semiconductor layer 405 is formed by forming a semiconductor film having an amorphous structure by a known means (a thermal CVD method, a plasma CVD method, a low-pressure thermal CVD method, an evaporation method, a sputtering method, or the like), and then performing a known crystallization treatment. (A laser crystallization method, a thermal crystallization method, a thermal crystallization method using a catalyst such as nickel, or the like), and the crystalline semiconductor film obtained is patterned into a desired shape. The thickness of the semiconductor layer 405 is 20 to 100 nm (preferably 30 to 60 nm). The material of the crystalline semiconductor film is not limited, but is preferably silicon or silicon germanium (Si _x
It is preferable to use a Ge _1-X (0 <X <1)) alloy or the like.
In this embodiment, an amorphous silicon film is formed by a sputtering method capable of forming a film at a low temperature, and a crystalline silicon film is formed by a laser crystallization method. When a crystalline semiconductor film is formed by a laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, a YAG laser, a YVO ₄
Lasers can be used.

After the formation of the semiconductor layer 405, TF
In order to control the threshold value of T, a small amount of impurity element (boron or phosphorus) may be doped.

Next, a gate insulating film 406 covering the semiconductor layer 405 is formed. The gate insulating film 406 is made of plasma C
Using the VD method or the sputtering method, the thickness is 40 to 150 n
m is formed of an insulating film containing silicon. In this embodiment, a silicon oxide film is formed by a sputtering method capable of forming a film at a low temperature. (FIG. 4 (A))

Next, the conductive layer 4 is formed on the gate insulating film 406.
08 is formed. The conductive layer 408 is formed by forming a conductive film by a known method (a thermal CVD method, a plasma CVD method, a low-pressure thermal CVD method, an evaporation method, a sputtering method, or the like), and then using a mask 407 to pattern the conductive film into a desired shape. Formed. As a material of the conductive layer 408, Ta, W, Ti, M
It may be formed of an element selected from o, Al, Cu, Cr, and Nd, or an alloy material or a compound material containing the element as a main component. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. Further, an AgPdCu alloy may be used. In this embodiment, a W film is formed and patterned by a sputtering method capable of forming a film at a low temperature. The end of the conductive layer 408 is formed in a tapered shape. The etching conditions may be appropriately determined. For example, in the case of W, etching can be favorably performed by using a mixed gas of CF ₄ and Cl ₂ and negatively biasing the substrate.

Next, as shown in FIG. 4B, an impurity region (p + region) 409 for forming source and drain regions in a self-aligned manner is formed. This impurity region (p +
The region 409 is formed by an ion doping method, and is doped with an element of Group 13 of the periodic table represented by boron.
The impurity concentration of the impurity region (p + region) 409 is 1 × 1
The range is from 0 ^{20 to} 2 × 10 ²¹ / cm ³ .

Next, as shown in FIG.
8 is etched so that the end of the conductive layer 410 is set back.
To form In the structure of this embodiment, this is used as a gate electrode. Two etching steps are used to form the gate electrode, and the etching conditions are appropriately determined. For example, in the case of W can be a mixed gas of CF ₄ and Cl _2, better end by biasing the substrate to negative is processed into a tapered shape. CF ₄ and C
By mixing oxygen with l ₂ , anisotropic etching of W can be performed with good selectivity to the base.

Thereafter, as shown in FIG.
Using p-type impurity (acceptor) as a mask 410
And impurity regions (p-regions) 41 in a self-aligned manner.
Form one. Impurity of impurity region (p-region) 411
The concentration is 1 × 10¹⁷~ 2 × 10 ¹⁹/ Cm^ThreeRange
To do.

Thereafter, a sputtering method or a plasma CVD
An interlayer insulating film 413 is formed using a silicon nitride film or a silicon nitride oxide film manufactured by a method. The added impurity element is subjected to heat treatment at 350 to 500 ° C. or laser light irradiation for activation. Further, after forming a contact hole reaching the impurity region (p + region) using a known technique, the source electrode or the drain electrode 4 is formed.
14 are formed to obtain a TFT.

Finally, a hydrogenation treatment is performed using a known technique, and the whole is hydrogenated to complete a p-channel TFT.
(FIG. 4E)

In the semiconductor layer, an LDD (Lightly Doped) formed by a channel forming region 412 and an impurity region (p-region) is formed.
A source or drain region 409 formed of a ped drain region 411 and an impurity region (p + region) is formed. Here, the p-channel TFT is shown with an LDD structure, but it can be of course also manufactured with a single drain or a structure in which the LDD overlaps with the gate electrode. A basic logic circuit can be formed using the p-channel type TFT described in this embodiment, or a more complicated logic circuit (a signal division circuit, a D / A converter, an operational amplifier, a gamma correction circuit, and the like) can be formed. Further, a memory or a microprocessor may be formed. For example, all the driving circuits of the EL display device can be constituted by p-channel TFTs.

This embodiment can be combined with the first embodiment.

[Embodiment 3] In this embodiment, an n-channel type T
This is an example of manufacturing an FT, which will be described with reference to FIGS. Note that FIGS. 4A and 5A are the same, and thus the same reference numerals are used and description of the manufacturing process is omitted here.

After obtaining the state shown in FIG. 5A according to the second embodiment, a resist mask 415 is formed by a light exposure process.
Is formed, and the semiconductor film 405 is doped with an n-type impurity (donor) by ion implantation or ion doping. (FIG. 5B) Impurity region (n-region) to be manufactured
At 416, the doping concentration is between 1 × 10 ¹⁷ and
The range is set to 2 × 10 ¹⁹ / cm ³ .

Next, on the insulating film 406, tantalum,
The gate electrode 417 is formed using a conductive material containing one or more elements selected from tungsten, titanium, aluminum, and molybdenum. (FIG. 5C) A part of the gate electrode 417 is formed so as to partially overlap with the impurity region (n− region) 416 via the gate insulating film.

Thereafter, as shown in FIG. 5D, an n-type impurity (donor) is doped using the gate electrode 417 as a mask, and the impurity region (n + region) 41 is self-aligned.
8 is formed. The impurity concentration of the impurity region (n + region) 418 is set to be in a range of 1 × 10 ¹⁷ to 2 × 10 ¹⁹ / cm ³ .

After that, an interlayer insulating film 419 is formed using a silicon nitride film and a silicon nitride oxide film manufactured by a plasma CVD method. The added impurity element is subjected to heat treatment at 350 to 500 ° C. or laser light irradiation for activation. Further, after forming a contact hole reaching the impurity region (n + region) by using a known technique, a source electrode or a drain electrode 420 is formed, and TF
Get T.

Finally, hydrogenation is performed by using a known technique, and the whole is hydrogenated to complete an n-channel TFT.
(FIG. 5E)

In the semiconductor layer, an LDD (Lightly Doped) formed by a channel formation region 419 and an impurity region (n− region) is formed.
A source or drain region 418 formed by a ped drain region 416 and an impurity region (n + region) is formed. Further, the LDD region 416 is formed so as to overlap with the gate electrode 417, and the concentration of the electric field at the drain end is reduced, thereby preventing deterioration due to hot carriers. Of course, an n-channel TFT having a single drain or LDD structure can also be manufactured. A basic logic circuit can be formed using the n-channel TFT shown in this embodiment, or a more complicated logic circuit (a signal division circuit, a D / A converter, an operational amplifier, a gamma correction circuit, and the like) can be formed. Further, a memory or a microprocessor may be formed. For example, all the driving circuits of the EL display device can be configured by n-channel TFTs.

This embodiment can be combined with the first embodiment.

[Embodiment 4] In this embodiment, an n-channel type T
C that complementarily combines FT and p-channel TFT
This is an example of manufacturing a MOS circuit, which will be described with reference to FIGS.

According to the second embodiment, after forming a base insulating film on an element forming substrate bonded with a first fixed substrate and a first adhesive layer (separation layer), semiconductor layers 501 and 502 are formed.
(FIG. 6 (A))

Next, the gate insulating film 5 is formed by sputtering.
03, a first conductive film 504, and a second conductive film 505 are formed. (FIG. 6B) In this embodiment, the first conductive film 504 is formed of tantalum nitride or titanium to a thickness of 50 to 100 nm, and the second conductive film 505 is formed of tungsten to 100 to 3 nm.
It is formed to a thickness of 00 nm.

Next, as shown in FIG. 6C, a mask 506 made of a resist is formed, and a first etching process for forming a gate electrode is performed. There is no limitation on the etching method, but preferably, ICP (Inductively Coupled Plas) is used.
ma: Inductively coupled plasma) etching method is used. Mixture of CF ₄ and Cl ₂ as etching gas, 0.5～2P
a, preferably 500 at the pressure of 1 Pa
The plasma is generated by applying RF (13.56 MHz) power of W. 100W on substrate side (sample stage)
(13.56 MHz) power, and a substantially negative self-bias voltage is applied. When CF ₄ and Cl ₂ are mixed, etching can be performed at substantially the same rate even in the case of a tungsten film, a tantalum nitride film, and a titanium film.

Under the above etching conditions, the end portion can be formed into a tapered shape by the effect of the shape of the resist mask and the bias voltage applied to the substrate side. The angle of the tapered portion is set to 15 to 45 °. In order to perform etching without leaving a residue on the gate insulating film, the etching time may be increased by about 10 to 20%. Since the selectivity of the silicon oxynitride film to the W film is 2 to 4 (typically 3), the exposed surface of the silicon oxynitride film is etched by about 20 to 50 nm by the over-etching process. Thus, the first
The first shape conductive layers 507 and 508 (the first conductive layer 50) including the first conductive film and the second conductive film
7a, 508a and second conductive layers 507b, 508b) are formed. Reference numeral 509 denotes a gate insulating film, and a region which is not covered with the first shape conductive layer is etched to be thin by about 20 to 50 nm.

Then, a first doping process is performed to dope an n-type impurity (donor). (FIG. 6 (D))
The method is performed by an ion doping method or an ion implantation method. The condition of the ion doping method is that the dose is 1 × 10 ^{13 to} 5
Perform at × 10 ¹⁴ / cm ² . As the impurity element imparting n-type, an element belonging to Group 15 of the periodic table, typically, phosphorus (P) or arsenic (As) is used. In this case, the first shape conductive layers 507 and 508 serve as a mask for the doping element, and appropriately adjust the acceleration voltage (for example, 20 to 60 ke).
V), and impurity regions (n + regions) 520 and 521 are formed using the impurity elements that have passed through the gate insulating film 509. For example, the concentration of phosphorus (P) in the impurity region (n + region) is set to be in a range of 1 × 10 ²⁰ to 1 × 10 ²¹ / cm ³ .

Further, as shown in FIG. 7A, a second etching process is performed. Etching is performed using an ICP etching method, and CF ₄ , Cl _2, and O ₂ are mixed as an etching gas, and RF power (13.56 MHz) of 500 W is supplied to the coil-type electrode at a pressure of 1 Pa to generate plasma. .
On the substrate side (sample stage), 50 W RF (13.56
MHz) power is applied, and a lower self-bias voltage is applied than in the first etching process. Under such conditions, the tungsten film is anisotropically etched so that the tantalum nitride film or the titanium film as the first conductive layer is left. Thus, the second shape conductive layers 512 and 513 (the first conductive films 512 a and 513 a and the second conductive films 512
b, 513b). Reference numeral 516 denotes a gate insulating film, and a region which is not covered with the second shape conductive layers 512 and 513 is further etched by about 20 to 50 nm to reduce the film thickness.

Then, as shown in FIG.
Performs a grouping process. More doping than the first doping process.
N-type impurity (donor) under high acceleration voltage conditions
Doping. For example, when the acceleration voltage is 70 to 120 k
eV and 1 × 10¹³/ Cm ^TwoFIG. 6
(D) of the first impurity region formed in the island-like semiconductor film
An impurity region is formed inside. Doping is performed in the second
The conductive films 512b and 513b are used as masks for impurity elements.
And the lower region of the first conductive film 512a, 512a.
The region is doped so that an impurity element is added. This
Thus, impurities overlapping with the first conductive films 512a and 513a.
Object regions (n-regions) 514 and 515 are formed. this
In the impurity region, the second conductive layers 512a and 513a are almost
Since it remains at the same film thickness, it is formed along the second conductive layer.
Density difference in the direction¹⁷~ 1 × 10
¹⁹/ Cm^ThreeFormed at a concentration of

Then, as shown in FIG. 7B, a third etching process is performed, and the gate insulating film 346 is etched. As a result, the second conductive film is also etched, and the end portion recedes and becomes smaller, so that the third shape conductive layer 51 is formed.
7, 518 are formed. In the figure, reference numeral 519 denotes a remaining gate insulating film.

Then, as shown in FIG. 7C, a mask 520 made of a resist is formed, and a p-type impurity (acceptor) is doped into the island-shaped semiconductor layer 501 forming a p-channel TFT. Typically, boron (B) is used. The impurity concentration of the impurity regions (p + regions) 521 and 522 is set to 2 × 10 ²⁰ to 2 × 10 ²¹ / cm ³ ,
The conductivity type is inverted by adding boron 1.5 to 3 times the contained phosphorus concentration.

Through the above steps, impurity regions are formed in each of the island-shaped semiconductor layers. A third shape conductive layer 517,
518 is a gate electrode. After that, as illustrated in FIG. 7D, a protective insulating film 523 including a silicon nitride film or a silicon oxynitride film is formed by a plasma CVD method.
Then, a step of activating the impurity element added to each of the island-shaped semiconductor layers is performed for the purpose of controlling the conductivity type.

Further, a silicon nitride film 524 is formed,
Perform hydrotreating. As a result, hydrogenation can be achieved by diffusing hydrogen in the silicon nitride film 524 into the island-shaped semiconductor layer.

[0094] The interlayer insulating film 525 is formed of an organic insulating material such as polyimide or acrylic. Of course, plasma C
Although a silicon oxide film formed using TEOS (Tetraethyl Ortho silicate) by the VD method may be used, it is preferable to use the organic material from the viewpoint of improving flatness.

Next, a contact hole is formed, and aluminum (Al), titanium (Ti), tantalum (Ta) is formed.
The source wiring or the drain wiring 526 to
528 are formed.

Through the above steps, a CMOS circuit in which an n-channel TFT and a p-channel TFT are complementarily combined can be obtained.

The p-channel type TFT has a channel formation region 530 and impurity regions 521 and 522 functioning as a source region or a drain region.

In the n-channel type TFT, a channel formation region 531 and an impurity region 515a (Gate Overlapped Drain: overlapping with a gate electrode 518 made of a third shape conductive layer) are used.
GOLD region), an impurity region 515b (LDD region) formed outside the gate electrode, and an impurity region 516 functioning as a source or drain region.

Such a CMOS circuit makes it possible to form a driving circuit of an active matrix type EL display device. In addition, such an n-channel type T
The FT or p-channel TFT can be applied to a transistor forming a pixel portion.

A basic logic circuit can be formed by combining such CMOS circuits, or a more complicated logic circuit (signal division circuit, D / A converter, operational amplifier,
γ correction circuit), and a memory or a microprocessor can be formed.

This embodiment can be combined with the first embodiment.

[Embodiment 5] The n-channel type T shown in Embodiment 3
FT is the value of 15 in the periodic table for a semiconductor to be a channel formation region.
Group element (preferably phosphorus) or 1 of the periodic table
By adding an element belonging to Group 3 (preferably boron), an enhancement type and a depletion type can be separately formed.

When an NMOS circuit is formed by combining n-channel TFTs, an enhancement type TF
When formed by T (hereinafter referred to as EEMOS circuit)
And an enhancement type and a depletion type (hereinafter referred to as an EDMOS circuit).

Here, an example of the EEMOS circuit is shown in FIG.
FIG. 8B shows an example of the EDMOS circuit. FIG.
In (A), reference numerals 31 and 32 denote enhancement type n-channel TFTs (hereinafter, referred to as E-type NTFTs). In FIG. 8B, reference numeral 33 denotes an E-type N
TFT, 34 is a depletion type n-channel type TFT
(Hereinafter, referred to as D-type NTFT).

In FIGS. 8A and 8B, VDH
Denotes a power supply line to which a positive voltage is applied (positive power supply line);
DL is a power supply line to which a negative voltage is applied (negative power supply line).
The negative power supply line may be a ground potential power supply line (ground power supply line).

Further, FIG. 9 shows an example in which a shift register is manufactured using the EEMOS circuit shown in FIG. 8A or the EDMOS circuit shown in FIG. 8B. In FIG. 9, reference numerals 40 and 41 are flip-flop circuits. Also,
Reference numerals 42 and 43 denote E-type NTFTs. A clock signal (CL) is input to the gate of the E-type NTFT 42 and the E-type NTFT
The gate of the FT 43 has a clock signal (C
L bar) is input. The symbol indicated by 44 is an inverter circuit, and as shown in FIG.
The EEMOS circuit shown in FIG. 8A or the EDMOS circuit shown in FIG. Therefore, it is also possible to configure all the driving circuits of the EL display device with n-channel TFTs.

This embodiment corresponds to the first embodiment or the third embodiment.
It is possible to combine with

[Embodiment 6] Here, an example in which an EL (electroluminescence) display device is manufactured using the TFTs obtained in Embodiments 2 to 5 will be described below with reference to FIGS.

FIG. 10 shows an example of a light emitting device having a pixel portion and a drive circuit for driving the pixel portion over the same insulator (however, before sealing). Note that the drive circuit has a basic unit of CM.
2 illustrates an OS circuit and illustrates one pixel in a pixel portion. This C
The MOS circuit can be obtained according to the fourth embodiment.

In FIG. 10, reference numeral 601 denotes a first fixed substrate;
Reference numeral 602 denotes a first adhesive layer, 603 denotes an element forming substrate, on which a drive circuit 604 composed of an n-channel TFT and a p-channel TFT, and a current composed of a switching TFT composed of a p-channel TFT and an n-channel TFT. A control TFT is formed. In this embodiment,
All the TFTs are formed of top gate type TFTs.

N-channel TFT and P-channel TFT
The description of the FT may be omitted because it is sufficient to refer to the fourth embodiment.
The switching TFT has a structure (double gate structure) having two channel formation regions between a source region and a drain region. However, referring to the description of the structure of the p-channel TFT in Example 2, The description is omitted because it can be easily understood. Note that this embodiment is not limited to the double gate structure, and may have a single gate structure in which one channel formation region is formed or a triple gate structure in which three channel formation regions are formed.

Further, the drain region 60 of the current control TFT is used.
A contact hole is provided in the first interlayer insulating film 607 before the second interlayer insulating film 608 is provided on 6. This is to simplify the etching process when forming a contact hole in the second interlayer insulating film 608. A contact hole is formed in the second interlayer insulating film 608 so as to reach the drain region 606, and a pixel electrode 609 connected to the drain region 606 is provided. The pixel electrode 609 is an electrode functioning as a cathode of the EL element, and is formed using a conductive film containing an element belonging to Group 1 or 2 of the periodic table. In this embodiment, a conductive film made of a compound of lithium and aluminum is used.

Next, reference numeral 613 denotes an insulating film provided so as to cover the edge of the pixel electrode 609, and is referred to as a bank in this specification. The bank 613 may be formed using an insulating film containing silicon or a resin film. When a resin film is used, the specific resistance of the resin film is 1 × 10 ⁶ to 1 × 10 ¹² Ωm (preferably 1 × 10 ¹² Ωm).
When carbon particles or metal particles are added so as to be 10 ⁸ to 1 × 10 ¹⁰ Ωm), dielectric breakdown during film formation can be suppressed.

The EL element 610 is a pixel electrode (cathode).
609, an EL layer 611 and an anode 612. For the anode 612, a conductive film having a large work function, typically, an oxide conductive film is used. As the oxide conductive film, indium oxide, tin oxide, zinc oxide, or a compound thereof may be used.

In the present specification, a laminate in which a hole injection layer, a hole transport layer, a hole blocking layer, an electron transport layer, an electron injection layer or an electron blocking layer is combined with a light emitting layer is referred to as an EL layer. Define.

Although not shown here, it is effective to provide a passivation film so as to completely cover the EL element 610 after the anode 612 is formed. As the passivation film, an insulating film including a carbon film, a silicon nitride film, or a silicon nitride oxide film is used, and the insulating film is used as a single layer or a stacked layer in which the insulating films are combined.

Next, after performing a sealing (or enclosing) step for protecting the EL element, the first fixed substrate 601 was separated by laser irradiation as shown in the embodiment mode and the first embodiment. FIG. 1 shows a subsequent EL display device.
This will be described with reference to FIGS.

FIG. 11A is a top view showing a state in which the process up to sealing of the EL element has been performed, and FIG. 11B is a cross-sectional view of FIG. 11A taken along the line AA ′. 70 shown by dotted line
1 is a pixel portion, 702 is a source side drive circuit, and 703 is a gate side drive circuit. 704 is a cover material, 705
Denotes a first sealing material, and 706 denotes a second sealing material.

Reference numeral 708 denotes wiring for transmitting signals input to the source-side drive circuit 702 and the gate-side drive circuit 703, and a video signal or a clock signal from an FPC (flexible print circuit) 708 serving as an external input terminal. Receive. Although only the FPC is shown here, this FPC has a printed wiring board (P
WB) may be attached.

Next, the cross-sectional structure will be described with reference to FIG. A pixel portion and a source-side driver circuit 709 are formed over an insulator 700 (corresponding to the element formation substrate 603), and the pixel portion includes a current control TFT 710 and a pixel electrode 711 electrically connected to a drain thereof. It is formed by a plurality of pixels. In addition, the source side driving circuit 709
Are formed using a CMOS circuit combining an n-channel TFT and a p-channel TFT. Note that a polarizing plate (typically, a circularly polarizing plate) may be attached to the insulator 700.

The banks 7 are provided at both ends of the pixel electrode 711.
12, an EL layer 713 and an EL element anode 714 are formed on the pixel electrode 711. The anode 714 also functions as a common wiring for all pixels, and is electrically connected to the FPC 716 via the connection wiring 715. Further, all elements included in the pixel portion and the source-side driver circuit 709 are covered with a passivation film (not shown).

Further, a cover member 704 is attached by a first seal member 705. Note that a spacer may be provided to secure an interval between the cover member 704 and the EL element. The space 71 is provided inside the first sealing material 705.
7 are formed. Note that the first sealant 705 is preferably a material that does not transmit moisture or oxygen. Further, it is effective to provide a substance having a moisture absorbing effect or a substance having an antioxidant effect inside the void 717.

Note that a carbon film (specifically, a diamond-like carbon film) having a thickness of 2 to 30 nm is preferably provided as a protective film on the front and back surfaces of the cover member 704. Such a carbon film (not shown here) has a role of preventing oxygen and water from entering and mechanically protecting the surface of the cover member 704.

After bonding the cover member 704, the first
The second sealing material 70 is provided so as to cover the exposed surface of the sealing material 705.
6 are provided. The second sealing material 706 is the first sealing material 7
The same material as 05 can be used.

By enclosing the EL element with the above structure, the EL element can be completely shut off from the outside, and a substance such as moisture or oxygen, which accelerates the deterioration of the EL layer due to oxidation, can enter from the outside. Can be prevented. Therefore,
A highly reliable EL display device can be obtained.

This embodiment can be combined with the first embodiment.

[Embodiment 7] In this embodiment, in the EL display device obtained in Embodiment 6, a more detailed top structure of a pixel portion is shown in FIG. 12A, and a circuit diagram is shown in FIG. .
FIGS. 12A and 12B use the same reference numerals, so they may be referred to each other.

The source of the switching TFT 802 is connected to the source wiring 815, and the drain is connected to the drain wiring 8
05. The drain wiring 805 is electrically connected to the gate electrode 807 of the current controlling TFT 806. The source of the current controlling TFT 806 is electrically connected to the current supply line 816, and the drain is electrically connected to the drain wiring 817. Also, the drain wiring 8
Reference numeral 17 is electrically connected to a pixel electrode (cathode) 818 indicated by a dotted line.

At this time, a storage capacitor is formed in a region 819. The storage capacitor 819 is connected to the current supply line 81
6, a semiconductor film 820 electrically connected to the gate insulating film 6, an insulating film (not shown) in the same layer as the gate insulating film, and the gate electrode 807. In addition, a capacitor formed by the gate electrode 807, the same layer (not shown) as the first interlayer insulating film, and the current supply line 816 can be used as a storage capacitor.

This embodiment corresponds to the first embodiment or the sixth embodiment.
It is possible to combine with

[Embodiment 8] In this embodiment, FIG. 13 shows an example of a circuit configuration of the EL display device shown in Embodiment 6 or 7. Note that this embodiment shows a circuit configuration for performing digital driving. In the present embodiment, the source side driving circuit 901
A pixel portion 906 and a gate driver circuit 907 are provided. In this specification, a drive circuit is a generic term including a source-side processing circuit and a gate-side drive circuit.

The source side driving circuit 901 includes a shift register 902, a latch (A) 903, a latch (B) 904,
A buffer 905 is provided. In the case of analog driving, a sampling circuit (transfer gate) may be provided instead of the latches (A) and (B). The gate driver circuit 907 includes a shift register 908 and a buffer 909.

Further, in this embodiment, the pixel portion 906 includes a plurality of pixels, and the plurality of pixels are provided with an EL element. At this time, the cathode of the EL element is a current control TFT.
It is preferable to be electrically connected to the drain.

The source side drive circuit 901 and the gate side drive circuit 907 are formed of the n-channel TFT or the p-channel TFT obtained in the second to fourth embodiments.

Although not shown, a gate drive circuit may be further provided on the side opposite to the gate drive circuit 907 with the pixel portion 906 interposed therebetween. In this case, both have the same structure and share a gate line, and a structure is adopted in which, even if one of them is broken, a gate signal is sent from the remaining one to operate the pixel portion normally.

This embodiment can be combined with the first, sixth, or seventh embodiment.

[Embodiment 9] In this embodiment, FIG. 14 shows an example of an EL display device in which TFTs used for a pixel portion and a driving circuit are all constituted by inverted staggered TFTs.

In FIG. 14, reference numeral 1001 denotes a first fixed substrate, 1002 denotes a first adhesive layer, and 1003 denotes an element forming substrate.
And an element forming substrate 1003 attached with a first adhesive layer 1002 (separation layer). If necessary, a base insulating film may be formed over the element formation substrate.

Next, a gate wiring (including a gate electrode) 1004 having a single-layer structure or a stacked structure is formed over the element formation substrate 1003. Means for forming the gate wiring 12 include thermal CVD, plasma CVD, and reduced pressure thermal CVD.
10 to 1000 n using a method, a vapor deposition method, a sputtering method, or the like.
After forming a conductive film having a thickness of m, preferably 30 to 300 nm, the conductive film is formed by a known patterning technique. The gate wiring 12 is made of a material mainly composed of a conductive material or a semiconductor material, such as Ta (tantalum), Mo (molybdenum), Ti (titanium), W (tungsten), chromium (Cr), or the like. Refractory metal materials, silicide which is a compound of these metal materials and silicon, N
The structure is not particularly limited as long as it has a structure having at least one material layer mainly composed of a material such as polysilicon having conductivity of a type or a P type, a low-resistance metal material Cu (copper), Al (aluminum) or the like. Can be used.

Next, a gate insulating film 1005 is formed.

Next, an amorphous semiconductor film is formed. Next, a laser crystallization treatment is performed on the amorphous semiconductor film to form a crystalline semiconductor film. After that, the obtained crystalline semiconductor film is patterned into a desired shape to form a semiconductor layer. Next, an insulating layer 1006 is formed over the semiconductor layer. This insulating layer 1006 protects a channel formation region in a step of adding an impurity element.

Next, an impurity element for imparting n-type or an impurity element for imparting p-type is appropriately added to the semiconductor layer by ion implantation or ion doping, and LDD is performed.
An impurity region which forms a region, a source region, and a drain region is formed.

After that, an interlayer insulating film is formed using a silicon nitride film, a silicon nitride oxide film, or a silicon oxide film manufactured by a sputtering method. The added impurity element is activated. Here, laser light irradiation was performed. Activation may be performed by heat treatment at 350 ° C. or lower instead of laser light irradiation.

Next, after forming a contact hole reaching a source region or a drain region by using a known technique, a source electrode or a drain electrode is formed to obtain an inversely staggered TFT.

Next, hydrogenation is performed using a known technique, and the whole is hydrogenated to complete an n-channel TFT and a p-channel TFT. In this embodiment, the hydrogenation treatment is performed using hydrogen plasma which can be performed at a relatively low temperature.

Next, a first interlayer insulating film 1007 is formed using a silicon nitride film, a silicon nitride oxide film, or a silicon oxide film formed by a sputtering method. Then
After forming a contact hole reaching the drain region 1000 of the pixel portion by using a known technique, the second interlayer insulating film 1 is formed.
008 is formed. Next, after forming a contact hole reaching the drain region 1000 of the pixel portion by using a known technique, a pixel electrode 1009 is formed. Next, banks 1010 are formed at both ends of the pixel electrode, and E
The anode 1013 of the L layer 1011 and the EL element 1012 is formed.

In FIG. 14, an N-channel TFT 1014 and a P-channel TFT 1015 are formed on an element forming substrate.
, A switching TFT 1016 formed of a P-channel TFT, and a current control TFT 1017 formed of an N-channel TFT. Further, in this embodiment, all the TFTs are formed by inverted staggered TFTs.

The switching TFT 1016 has a structure (double gate structure) having two channel forming regions between a source region and a drain region.
The description of the structure of the P-channel TFT in Embodiment 2 can be easily understood by referring to the description of the structure, and thus the description is omitted. Note that this embodiment is not limited to the double gate structure, and may have a single gate structure in which one channel formation region is formed or a triple gate structure in which three channel formation regions are formed.

Further, it is preferable that all elements included in the pixel portion and the driving circuit are covered with a passivation film (not shown).

The following steps are performed in accordance with the steps of the sixth embodiment.
After bonding the second fixed substrate with the second adhesive layer, the first adhesive layer 1002 is irradiated with a laser to irradiate the first fixed substrate 1001.
And the light emitting device is completed.

This embodiment is similar to the first embodiment, the seventh embodiment,
Alternatively, it can be freely combined with the eighth embodiment.

[Embodiment 10] In this embodiment, FIG. 15 shows an example of an EL display device in which all TFTs used for a pixel portion and a driver circuit are constituted by N-channel TFTs.

In FIG. 15, reference numeral 1101 denotes a first fixed substrate, 1102 denotes a first adhesive layer, and 1103 denotes an element forming substrate.
Then, a base insulating film is formed over the element formation substrate 1103 attached with the first adhesive layer 1102 (separation layer).

An N-channel TFT 11 is formed on the underlying insulating film.
04, a driving circuit including an N-channel TFT 1105,
Switching TFT 110 composed of N-channel type TFT
Current control TFT 1 composed of 6 and N-channel TFTs
107 are formed. Note that the description of the N-channel TFT is omitted since the third embodiment may be referred to. Also,
The description of the EL element 1108 may be omitted because Embodiment 6 may be referred to.

Further, it is preferable that all elements included in the pixel portion and the driving circuit are covered with a passivation film (not shown).

After the state shown in FIG. 15 is obtained, the second fixing substrate is bonded with the second adhesive layer according to the process of the sixth embodiment, and then the first adhesive layer 1102 is irradiated with a laser to perform the first fixing. The light emitting device may be completed by separating the substrate 1101.

By forming the gate-side driver circuit and the source-side driver circuit only with the N-channel TFT, the pixel portion and the driver circuit can all be formed with the N-channel TFT. Therefore, the yield and throughput of the TFT process in manufacturing an active matrix type electro-optical device can be significantly improved, and the manufacturing cost can be reduced.

This embodiment can be implemented when either one of the source-side drive circuit and the gate-side drive circuit is an external IC chip.

In this embodiment, the driving circuit is constituted by using only the E-type NTFT.
It may be formed by combining TFTs.

This embodiment is similar to the first embodiment, the third embodiment,
It can be freely combined with Embodiment 5, Embodiment 7, or Embodiment 8. Further, in this embodiment, a top gate type TFT is used. However, the present invention is not particularly limited, and an inverted stagger type TFT as shown in Embodiment 9 can be used.

[Embodiment 11] In this embodiment, FIG. 16 shows an example of an EL display device in which TFTs used for a pixel portion and a driver circuit are all constituted by P-channel TFTs.

In FIG. 16, reference numeral 1201 denotes a first fixed substrate, 1202 denotes a first adhesive layer, and 1203 denotes an element formation substrate.
Then, a base insulating film is formed over the element formation substrate 1203 attached with the first adhesive layer 1202 (separation layer).

On top of this, an N-channel TFT 1204,
A driving circuit including an N-channel TFT 1205, a switching TFT 1206 including an N-channel TFT, and a current control TFT 1207 including an N-channel TFT.
Are formed. Note that the description of the N-channel TFT is omitted because it is sufficient to refer to the second embodiment.

In this embodiment, interlayer insulating films 1208 and 1209 are formed on the current control TFT 1207, and a pixel electrode 1210 electrically connected to the drain of the current control TFT 1207 is formed thereon. In this embodiment, the pixel electrode 1210 made of a transparent conductive film having a large work function functions as an anode of an EL element.

Then, similarly to the sixth embodiment, the pixel electrode 121 is formed.
A bank 1211 is formed on 0.

Next, an EL layer 1212 is formed on the pixel electrode 1210. A cathode 1213 made of a conductive film containing an element belonging to Group 1 or 2 of the periodic table is provided on the EL layer 1212. Thus, an EL element 1214 including the pixel electrode (anode) 1210, the EL layer 1212, and the cathode 1213 is formed.

Further, it is preferable that all elements included in the pixel portion and the driving circuit are covered with a passivation film (not shown).

However, this embodiment is different from the sixth, ninth and tenth embodiments in the radiation direction of light from the EL element.
The element formation substrate must be transparent.

The following steps are performed in accordance with the steps of Example 6.
After bonding the second fixed substrate with the second adhesive layer, the first fixed layer 1201 is irradiated with a laser to irradiate the first fixed substrate 1201 with laser.
And the light emitting device is completed.

This embodiment is similar to the first embodiment, the second embodiment,
It can be freely combined with Embodiment 6, Embodiment 7, or Embodiment 8. Further, in this embodiment, a top gate type TFT is used. However, the present invention is not particularly limited, and an inverted stagger type TFT as shown in Embodiment 9 can be used.

[Embodiment 12] This embodiment shows an example in which a driver circuit is formed using a decoder using a P-channel TFT as shown in FIG. 4 instead of a general shift register. FIG. 17 illustrates an example of a gate-side drive circuit.

In FIG. 17, reference numeral 1300 denotes a decoder of the gate side drive circuit, and 1301 denotes a buffer section of the gate side drive circuit.

First, the gate side decoder 1300 will be described. First, reference numeral 1302 denotes an input signal line (hereinafter, referred to as a selection line) of the decoder 1300. Here, A1 and A1 bars (signals of which polarity of A1 is inverted), A2 and A2 bars (A2
, An and An bars (signals with inverted polarity of An).

The selection line 1302 transmits the signal shown in the timing chart of FIG. As shown in FIG.
Is ¹ , the frequency of A2 is 2 ^-1 times, the frequency of A3 is 2 ^-2 times, and the frequency of An is 2- ^(n-1) times.

Reference numeral 1303a denotes a first stage NAND circuit (also referred to as a NAND cell), and 1303b denotes a second stage NA circuit.
The ND circuit 1303c is an n-th stage NAND.

The NAND circuits 1303a to 1303c
Are formed by combining P-channel TFTs 1304 to 1309 to form a NAND circuit.

In the NAND circuit 1303a,
A1, A2,... An (these are referred to as positive selection lines).
304 to 1306 are connected in parallel with each other, are connected to a positive power supply line (V _DH ) 1310 as a common source, and are connected to an output line 1311 as a common drain.

Next, the buffer 1301 is connected to the NAND circuit 1
A plurality of buffers 1 corresponding to each of 303a to 1303c
313a to 1313c. However, the buffers 1313a to 1313c may have the same structure. The buffers 1313a to 1313c are formed using P-channel TFTs 1314 to 1316 as one conductivity type TFTs.

The P-channel TFT 1316 has a reset signal line (Reset) as a gate and a positive power supply line 1319.
Are the source, and the gate wiring 1318 is the drain.
Note that the ground power supply line 1317 may be a negative power supply line (however, a power supply line for applying a voltage that turns on a P-channel TFT used as a switching element of a pixel).

Next, the structure of the source side driving circuit is shown in FIG. The source side driving circuit shown in FIG.
1, including a latch 1402 and a buffer 1403. Note that the configurations of the decoder 1401 and the buffer 1403 are the same as those of the gate-side drive circuit, and thus description thereof is omitted here.

In the case of the source-side drive circuit shown in FIG. 19, the latch 1402 comprises a first-stage latch 1404 and a second-stage latch 1405. Each of the first-stage latch 1404 and the second-stage latch 1405 has a plurality of unit units 1407 each including m P-channel TFTs 1406a to 1406c.

Then, the P-channel type TFT 1406a-
The sources of 1406c are video signal lines (V1, V2,.
Vk) 1409. When a negative voltage is applied to the output line 1408, the P-channel TFTs 1406a to 1406a to
1406c is turned on, and a video signal corresponding to each is captured. The video signal thus captured is held in capacitors 1410a to 1410c connected to P-channel TFTs 1406a to 1406c, respectively.

The second stage latch 1405 also has a plurality of unit units 1407b.
Is formed of m P-channel TFTs 1411a to 1411c. The gates of the P-channel TFTs 1411a to 1411c are all connected to the latch signal line 1412, and when a negative voltage is applied to the latch signal line 1412, the P-channel TFTs 1411a to 1411c are turned on all at once.

As a result, capacitors 1410a-141
The signal held at 0c is a P-channel TFT 14
Capacitor 141 connected to each of 11a to 1411c
3a to 1413c, and output to the buffer 303 at the same time. Then, via the buffer, the source wiring 1
414. The source lines are sequentially selected by the source-side drive circuit having the above operation.

As described above, by forming the gate-side drive circuit and the source-side drive circuit only with the P-channel TFT, the pixel portion and the drive circuit can be entirely formed of the P-channel TFT.
It can be formed by FT. Therefore, the yield and throughput of the TFT process in manufacturing an active matrix type electro-optical device can be significantly improved, and the manufacturing cost can be reduced.

This embodiment is similar to the first embodiment, the second embodiment,
It can be freely combined with the sixth embodiment, the seventh embodiment, the eighth embodiment, and the eleventh embodiment. Further, in this embodiment, a top gate type TFT is used. However, the present invention is not particularly limited, and an inverted stagger type TFT as shown in Embodiment 9 can be used.

[Embodiment 13] This embodiment shows an example in which a driver circuit is formed by using a decoder using an N-channel TFT as shown in FIG. 5 instead of a general shift register. FIG. 20 illustrates an example of a gate-side drive circuit.

In FIG. 20, 1500 is a decoder of the gate side drive circuit, and 1501 is a buffer section of the gate side drive circuit. Note that the buffer unit indicates a portion where a plurality of buffers (buffer amplifiers) are integrated. The buffer refers to a circuit that drives without giving the influence of the subsequent stage to the preceding stage.

First, the gate side decoder 1500 will be described. First, reference numeral 1502 denotes an input signal line (hereinafter, referred to as a selection line) of the decoder 1500. Here, A1 and A1 bars (signals having inverted polarity of A1), A2 and A2 bars (A2
, An and An bars (signals with inverted polarity of An). That is, it can be considered that 2n selection lines are arranged.

A selection line 1502 transmits a signal shown in the timing chart of FIG. As shown in FIG.
Is ¹ , the frequency of A2 is 2 ^-1 times, the frequency of A3 is 2 ^-2 times, and the frequency of An is 2- ^(n-1) times.

Reference numeral 1503a denotes a first stage NAND circuit (also referred to as a NAND cell), and 1503b denotes a second stage NA circuit.
The ND circuit 1503c is an n-th stage NAND. NA
The number of ND circuits required is equal to the number of gate wirings, and here n is required. That is, in the present embodiment, the decoder 150
0 is composed of a plurality of NAND circuits.

In addition, NAND circuits 1503a to 1503c
Are formed by combining N-channel TFTs 1504 to 1509 to form a NAND circuit. The gates of the N-channel TFTs 1504 to 1509 are connected to the selection line 1.
502 (A1, A1 bar, A2, A2 bar ... An, An
Connected to one of the bars).

In the NAND circuit 1503a,
A1, A2... An (these are referred to as positive selection lines).
504 to 1506 are connected in parallel with each other, connected to a negative power supply line (V _DL ) 1510 as a common source, and connected to an output line 1511 as a common drain.

In this embodiment, the NAND circuit includes n N-channel TFTs connected in series and n N-channel TFTs connected in parallel.

Next, the buffer section 1501 is formed by a plurality of buffers 1513a to 1513c corresponding to the NAND circuits 1503a to 1503c, respectively. However, the buffers 1513a to 1513c may have the same structure.

The buffers 1513a to 1513c store N
It is formed using channel type TFTs 1514 to 1516.

In this embodiment, buffers 1513a to 1513a to
Reference numeral 1513c denotes a second N-channel TFT which is connected in series to the first N-channel TFT (N-channel TFT 1514) and the first N-channel TFT, and has the drain of the first N-channel TFT as a gate. Including a TFT (N-channel TFT 1515).

The N-channel TFT 1516 (third TFT)
N-channel TFT) has a reset signal line (Reset) as a gate, a negative power supply line (V _DL ) 1519 as a source,
The gate wiring 1518 is used as a drain. Note that the negative power supply line (V _DL ) 1519 may be a ground power supply line (GND).

Note that the N-channel TFT 1516 is used as a reset switch for forcibly pulling down the gate wiring 1518 to which a positive voltage is applied to a negative voltage. That is,
When the selection period of the gate wiring 1518 ends. A reset signal is input to apply a negative voltage to the gate wiring 1518.
However, the N-channel TFT 1516 can be omitted.

Next, the structure of the source side drive circuit is shown in FIG. The source side driving circuit shown in FIG.
1, a latch 1522 and a buffer unit 1523.

In the case of the source-side drive circuit shown in FIG. 22, the latch 1522 includes a first-stage latch 1524 and a second-stage latch 1525. Each of the first-stage latch 1524 and the second-stage latch 1525 has a plurality of unit units 1527 each formed of m N-channel TFTs 1526a to 1526c. Decoder 15
An output line 1528 from 21 is composed of m N-channel TFTs 1526a to 1526c forming a unit 1527.
Input to the gate. Note that m is an arbitrary integer.

The N-channel TFTs 1526a-
Sources of the 1526c are video signal lines (V1, V2,.
Vk) 1529. That is, when a positive voltage is applied to the output line 1528, the N-channel TFT 152
6a to 1526c are turned on, and video signals corresponding to each of them are captured. The video signals thus captured are N-channel TFTs 1526a to 1526c.
Are held by capacitors 1530a to 1530c connected to each of.

The second-stage latch 1525 also has a plurality of unit units 1527b.
Is formed of m N-channel TFTs 1531a to 1531c. The gates of the N-channel TFTs 1531a to 1531c are all connected to a latch signal line 1532, and when a negative voltage is applied to the latch signal line 1532, the N-channel TFTs 1531a to 1531c are turned on all at once.

As a result, capacitors 1530a-153
The signal held at 0c is changed to an N-channel TFT 15.
Capacitor 153 connected to each of 31a to 1531c
3a to 1533c and buffer 1523 at the same time.
Is output to. Then, the data is output to the source wiring 1534 via the buffer. The source lines are sequentially selected by the source-side drive circuit having the above operation.

As described above, by forming the gate-side drive circuit and the source-side drive circuit only with the N-channel TFT, the pixel portion and the drive circuit are all N-channel TFTs.
It can be formed by FT. Therefore, the yield and throughput of the TFT process in manufacturing an active matrix type electro-optical device can be significantly improved, and the manufacturing cost can be reduced.

This embodiment can also be implemented when one of the source-side drive circuit and the gate-side drive circuit is an external IC chip.

In this embodiment, the driving circuit is constituted by using only the E-type NTFT.
It may be formed by combining TFTs.

In this embodiment, the first embodiment, the third embodiment,
It can be freely combined with Embodiment 5, Embodiment 7, or Embodiment 8. Further, in this embodiment, a top gate type TFT is used. However, the present invention is not particularly limited, and an inverted stagger type TFT as shown in Embodiment 9 can be used.

[Embodiment 14] As a device forming substrate, a metal substrate, for example, a stainless steel substrate can be used.
In this embodiment, an example in that case will be described below.

In this embodiment, a stainless steel substrate (thickness: 10 to 200 μm) is used as the element forming substrate of the first embodiment. First, according to the embodiment, the first fixed substrate and the stainless steel substrate are bonded with the first adhesive layer.

Thereafter, according to the first embodiment, a necessary element may be formed by forming a base insulating film on an element forming substrate made of a stainless steel substrate. Note that, unlike the first embodiment,
Since a stainless steel substrate having high heat resistance is used, a TFT can be manufactured by using a process at a higher temperature (about 500 ° C. or lower) than in Example 1.

Since the stainless steel substrate is used for separating the first fixed substrate, the first fixed substrate separation can be performed without any influence on the elements formed on the element forming substrate even when laser light is irradiated. can do.

Further, since the stainless steel substrate has a light-shielding property, the light emitting device of this embodiment is a light emitting device that emits light upward.

By using a thin metal substrate (thickness: 10 to 200 μm), a light-emitting device which can be reduced in weight and thickness and has flexibility can be obtained. In addition, since a metal substrate is used, a TFT formed on an element substrate is used.
A heat radiation effect of the element is obtained.

This embodiment can be freely combined with any one of Embodiments 1 to 13.

[Embodiment 15] A drive circuit and a pixel portion formed by carrying out the present invention are used for various electro-optical devices (active matrix liquid crystal display, active matrix EL display, active matrix EC display). Can be. That is, the invention of the present application can be applied to all electronic devices in which these electro-optical devices are incorporated in a display unit.

Examples of such electronic devices include a video camera, a digital camera, a head-mounted display (goggle type display), a car navigation, a car stereo, a personal computer, a portable information terminal (a mobile computer, a mobile phone, an electronic book, etc.), and the like. Is mentioned. Examples of these are shown in FIGS.

FIG. 24A shows a personal computer, which includes a main body 2001, an image input section 2002, and a display section 20.
03, a keyboard 2004 and the like. The present invention can be applied to the image input unit 2002, the display unit 2003, and other driving circuits.

FIG. 24B shows a video camera, which includes a main body 2101, a display portion 2102, an audio input portion 2103, operation switches 2104, a battery 2105, and an image receiving portion 210.
6 and so on. The present invention can be applied to the display portion 2102 and other driver circuits.

FIG. 24C shows a mobile computer (mobile computer) including a main body 2201, a camera section 2202, an image receiving section 2203, operation switches 2204, a display section 2205, and the like. The present invention can be applied to the display portion 2205 and other driving circuits.

FIG. 24D shows a goggle type display, which comprises a main body 2301, a display portion 2302, and an arm portion 230.
3 and so on. The present invention can be applied to the display portion 2302 and other driving circuits.

FIG. 24E shows a player using a recording medium (hereinafter, referred to as a recording medium) on which a program is recorded, and includes a main body 2401, a display section 2402, and a speaker section 240.
3, a recording medium 2404, an operation switch 2405, and the like. This player uses a DVD (D
digital Versatile Disc), CD
And the like, it is possible to perform music appreciation, movie appreciation, games, and the Internet. The present invention can be applied to the display portion 2402 and other driving circuits.

FIG. 24F shows a digital camera, which includes a main body 2501, a display section 2502, an eyepiece section 2503, operation switches 2504, an image receiving section (not shown), and the like. The present invention can be applied to the display portion 2502 and other driving circuits.

FIG. 25A shows a mobile phone,
01, audio output unit 2902, audio input unit 2903, display unit 2904, operation switch 2905, antenna 2906
And so on. The present invention can be applied to the audio output unit 2902, the audio input unit 2903, the display unit 2904, and other driving circuits.

FIG. 25B shows a portable book (electronic book), which includes a main body 3001, display portions 3002 and 3003, a storage medium 3004, operation switches 3005, and an antenna 3006.
And so on. The present invention can be applied to the display units 3002 and 3003 and other driving circuits.

FIG. 25C shows a display, which includes a main body 3101, a support 3102, a display portion 3103, and the like.
The present invention can be applied to the display portion 3103. The display of the present invention is particularly advantageous when the screen is enlarged, and is advantageous for a display having a diagonal of 10 inches or more (particularly 30 inches or more).

As described above, the applicable range of the present invention is extremely wide, and can be applied to electronic devices in all fields. Further, the electronic apparatus of the present embodiment can be realized by using a configuration composed of any combination of the embodiments 1 to 14.

[0228]

According to the present invention, an element forming layer (EL) is formed by an element forming substrate which is a resin substrate and a second fixed substrate which is a resin substrate.
The light-emitting device sandwiching the element (including the element) has a flexibility that it is not damaged even if some stress is generated.

Further, the thickness of the element forming substrate is very small.
Specifically, 50 μm to 300 μm, preferably 150 μm
Even with a substrate having a thickness of m to 200 μm, a highly reliable light-emitting device can be obtained.

[Brief description of the drawings]

FIG. 1 is a view showing a substrate bonding step.

FIG. 2 is a diagram showing a state of a bonded substrate.

FIG. 3 illustrates a manufacturing process.

FIG. 4 is a diagram showing a manufacturing process of a p-channel TFT.

FIG. 5 is a diagram illustrating a manufacturing process of an n-channel TFT.

FIG. 6 illustrates a process for manufacturing a CMOS circuit.

FIG. 7 illustrates a process for manufacturing a CMOS circuit.

FIG. 8 illustrates a structure of an NMOS circuit.

FIG. 9 illustrates a structure of a shift register.

FIG. 10 is a cross-sectional structural view of a driver circuit and a pixel portion of an EL display device.

11A and 11B are a top view and a cross-sectional view of an EL display device.

12A and 12B are a top view and a circuit diagram of a pixel in an EL display device.

FIG. 13 is a circuit block diagram of a digitally driven EL display device.

FIG. 14 is a cross-sectional structural view of a driver circuit and a pixel portion of an EL display device.

FIG. 15 is a cross-sectional structural view of a driver circuit and a pixel portion of an EL display device.

FIG. 16 is a cross-sectional structural view of a driving circuit and a pixel portion of an EL display device.

FIG. 17 illustrates a configuration of a gate-side drive circuit.

FIG. 18 is a diagram illustrating a timing chart of a decoder input signal.

FIG. 19 is a diagram illustrating a configuration of a source side driver circuit.

FIG. 20 illustrates a structure of a gate-side drive circuit.

FIG. 21 illustrates a timing chart of a decoder input signal.

FIG. 22 illustrates a configuration of a source side driver circuit.

FIG. 23 is a diagram showing a state where a curvature is given.

FIG. 24 illustrates an example of an electronic device.

FIG. 25 illustrates an example of an electronic device.

Continued on front page F term (reference) 5C094 AA31 BA03 BA27 CA19 CA24 DA06 DA14 DA15 EA04 EA07 EB02 GB10 HA05 HA06 HA08 5F048 AB03 AB04 AB10 AC02 AC04 BA14 BA16 BB01 BB04 BB06 BB09 BC03 BC05 BC06 BC16 5F110 AA30 BB02 DD02 DD17 DD30 EE02 EE04 EE06 EE09 EE14 EE23 EE28 EE43 EE44 EE45 FF02 FF28 FF30 GG01 GG02 GG13 GG25 GG32 GG35 GG42 GG43 GG44 GG45 GG47 HJ01 HJ04 HJ12 HJ13 HJ23 NN03 NN03 NN03 NN03 NN03 NN03 NN03 NN03 NN03 NN04

Claims (13)

[Claims] A first fixing substrate and an element forming substrate are bonded to each other with a first adhesive layer provided on the element forming substrate, and an insulating film is formed after the element forming substrate is bonded; A light emitting element is formed on the light emitting element, and a second fixed substrate is bonded on the light emitting element with a second adhesive layer. Then, the first adhesive layer is removed by irradiating a laser beam to separate the first fixed substrate. A method for manufacturing a semiconductor device. 2. A method according to claim 1, wherein the first fixed substrate and the element forming substrate are bonded to each other with a first adhesive layer provided on the fixed substrate, and an insulating film is formed after bonding the element forming substrate. After a light emitting element is formed on the light emitting element and a second fixed substrate is bonded on the light emitting element with a second adhesive layer, the first adhesive layer is removed by irradiating a laser beam to separate the first fixed substrate. A method for manufacturing a semiconductor device, comprising: 3. The method for manufacturing a semiconductor device according to claim 1, wherein the element forming substrate and the second fixed substrate are substrates made of an organic resin. 4. The method for manufacturing a semiconductor device according to claim 1, wherein an amorphous silicon thin film is formed between the element forming substrate and the first adhesive layer. 5. The method for manufacturing a semiconductor device according to claim 1, wherein a diamond-like carbon thin film is formed between the element forming substrate and the first adhesive layer. 6. The method for manufacturing a semiconductor device according to claim 1, wherein the first adhesive layer is colored. 7. The method for manufacturing a semiconductor device according to claim 1, wherein the first adhesive layer is black. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the first fixed substrate is an insulating substrate having a light-transmitting property. 9. The semiconductor device according to claim 1, wherein the laser beam is a pulse oscillation type or continuous emission type excimer laser, a YAG laser, or a YVO ₄ laser. Production method. 10. The method according to claim 1, wherein
The method for manufacturing a semiconductor device, wherein the laser light is a fundamental wave, a second harmonic, or a third harmonic of a YAG laser. 11. The method for manufacturing a semiconductor device according to claim 1, wherein the irradiation with the laser light is performed by forming a linear beam and scanning the laser beam. 12. The method according to claim 1, wherein the irradiation of the laser beam is performed by passing the first fixed substrate from the back side of the first fixed substrate to the front side of the first fixed substrate. Irradiating the laser beam to the first adhesive layer provided in the semiconductor device. 13. The semiconductor device according to claim 1, wherein the semiconductor device is a video camera, a digital camera,
A method for manufacturing a semiconductor device, which is a goggle-type display, a car navigation system, a personal computer, or a personal digital assistant.