JP2001313422A - Light-emitting element and manufacturing method for the light-emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light-emitting element, on both faces of which electrodes are formed and which comprises a nitride semiconductor layer, and to provide a manufacturing method for the light-emitting element. SOLUTION: In the manufacturing method, a wafer on which an n-type nitride semiconductor layer and a p-type nitride semiconductor layer are laminated on a substrate is divided into light-emitting elements. The manufacturing method contains a p-electrode forming process, where a first metal layer which comes into ohmic contact with the p-type nitride semiconductor layer is formed nearly over the whole face of the p-type nitride semiconductor layer and a warpage preventing layer, which prevents the warpage of the wafer, is formed in the upper part from the metal layer. The manufacturing method contains a substrate removal process, where after the p-electrode formation process, the substrate is removed from the face on the opposite side of a substrate face on which the nitride semiconductor layer is laminated, in such a way that at least a part of the n-type nitride semiconductor layer is exposed in the respective regions of the light-emitting elements to be divided. The manufacturing method contains an n-electrode formation process where an n-electrode is formed, so as to come into contact with at least a part of the exposed n-type nitride semiconductor layer. The manufacturing method contains a division process, where the wafer on which the p-electrode and the n-electrode are formed is divided to form the light-emitting elements.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrode used for a light emitting device such as an LED (light emitting diode) and an LD (laser diode), particularly a nitride semiconductor layer (for example, In _x Al _y G).
a _1-xy N, 0 ≦ x, 0 ≦ y, x + y ≦ 1) and a method for manufacturing a light-emitting element.

[0002]

2. Description of the Related Art In recent years, light-emitting elements having a nitride semiconductor layer, such as blue LEDs and LDs, have attracted attention. This nitride semiconductor layer emits light by carrier coupling between the carrier injected from the p-type nitride semiconductor layer and the carrier injected from the n-type nitride semiconductor layer. In particular, when formed on a sapphire substrate, good crystallinity can be obtained. However, sapphire is an insulating material, and an electrode cannot be formed on a sapphire substrate surface. For this reason,
When a substrate made of an insulating material such as a sapphire substrate is used for a light emitting element, it is necessary to form an electrode on the exposed contact layer by removing the semiconductor layer by etching or the like.

[0003]

As described above, when an electrode is formed by removing a semiconductor layer, the number of light emitting elements obtained per unit area of a wafer is reduced, and the manufacturing cost is increased. there were. In addition, since the electrode portions approach each other, it is necessary to perform high-precision position control during bonding.

On the other hand, after forming a nitride semiconductor layer on a wafer-like sapphire substrate, the sapphire substrate is removed by polishing or the like, and positive and negative electrodes are formed at positions facing each other with the semiconductor layer interposed therebetween. was there. However, as the sapphire substrate is polished, the wafer is warped due to the mismatch between the lattice constants of the nitride semiconductor layer and sapphire, and the semiconductor layer is cracked, thereby lowering the production yield and increasing the production cost. There was a point. In particular, since the lattice constant mismatch between the sapphire substrate and the nitride semiconductor is large, this warping becomes a serious problem in a light-emitting element made of a nitride semiconductor.

Therefore, the present invention provides a light emitting device having a nitride semiconductor layer in which electrodes are formed on both sides of a light emitting device and a method of manufacturing the light emitting device while obtaining good crystallinity without lowering the manufacturing yield. The purpose is to provide at low cost.

[0006]

According to a method of manufacturing a light emitting device of the present invention, a light emitting device for dividing a wafer having at least an n-type nitride semiconductor layer and a p-type nitride semiconductor layer laminated on a substrate for each light-emitting device is provided. In the device manufacturing method, a first metal layer for obtaining ohmic contact with the p-type nitride semiconductor layer is formed on substantially the entire surface of the p-type nitride semiconductor layer, and the warpage of the wafer is formed above the metal layer. A p-electrode forming step of forming a warp preventing layer for preventing, and after the p-electrode forming step, at least a part of the n-type nitride semiconductor layer is exposed in each region of the light emitting element to be divided. A substrate removing step of removing the substrate from a surface opposite to a substrate surface on which the nitride semiconductor layer is laminated; and forming an n-electrode so as to contact at least a part of the exposed n-type nitride semiconductor layer. Electrode formation process , And a dividing step to the p electrode and the n electrode is divided for each region to be divided and formed wafer emitting element. This makes it possible to provide a light-emitting element having a nitride semiconductor layer in which electrodes are formed on both surfaces of the light-emitting element while obtaining good crystallinity and at a low cost without lowering the production yield.

Further, in the method for manufacturing a light emitting device of the present invention, the warpage preventing layer may have a structure including at least a second metal layer having a thickness of 10 μm or more.

In the method for manufacturing a light emitting device according to the present invention, the second metal layer is made of a metal containing at least Ni.

Further, in the method for manufacturing a light emitting device according to the present invention, the second metal layer is formed by electroless plating.

Further, in the method for manufacturing a light emitting device according to the present invention, the warpage preventing layer may be formed by removing at least one metal bump formed on the first metal layer and a portion where the metal bump is formed. It may be at least composed of a resin layer formed on the first metal layer.

Further, the method for manufacturing a light emitting device of the present invention further includes an Au layer forming step of forming an Au layer containing at least Au above the warpage preventing layer.

In the method for manufacturing a light emitting device according to the present invention, the substrate uses sapphire.

In the method for manufacturing a light emitting device according to the present invention, the n-electrode is a transparent electrode.

The light emitting device of the present invention has at least n
A light emitting element having an n-electrode and a p-electrode, wherein the n-electrode and the p-electrode face each other with the semiconductor layer interposed therebetween; A first metal layer for obtaining ohmic contact with the p-type nitride semiconductor layer over substantially the entire surface of the p-type nitride semiconductor layer;
At least an anti-warp layer is provided above the metal layer to prevent the wafer from warping.

In a light emitting device according to the present invention, there is provided a light emitting device having at least an n-type nitride semiconductor layer and a p-type nitride semiconductor layer laminated thereon and having an n-electrode and a p-electrode. A first metal layer for obtaining ohmic contact with the p-type nitride semiconductor layer over substantially the entire surface of the p-type nitride semiconductor layer, and a warp prevention for preventing warpage of the wafer above the metal layer At least a portion of the substrate is removed to expose the n-type nitride semiconductor layer, and the n-electrode is in contact with at least a portion on the exposed n-type nitride semiconductor layer. May be formed.

In the light-emitting device according to the present invention, the warpage prevention layer may include at least a second metal layer having a thickness of 10 μm or more.

Further, in the light emitting device of the present invention, the second metal layer is made of a metal containing at least Ni.

In the light-emitting device according to the present invention, the second metal layer is formed by electroless plating.

Further, in the light emitting device according to the present invention, the warpage prevention layer is formed of one or more metal bumps formed on the first metal layer, and the first metal layer excluding a portion where the metal bump is formed. It may be constituted at least by a resin layer formed on the layer.

In the light emitting device of the present invention, the resin layer has a thickness of 20 μm or more.

Further, in the light emitting device according to the present invention, the p-electrode includes at least Au containing Au above the warpage preventing layer.
u layer.

Further, in the light emitting device of the present invention, the substrate uses sapphire.

In the light-emitting device according to the present invention, the n-electrode is a transparent electrode.

[0024]

(Embodiment 1) A light emitting element and a method for forming an electrode of the light emitting element according to the present invention will be described below.

As shown in FIG. 1A, a semiconductor layer 2 is formed on a wafer-like substrate 1. As the substrate 1, for example, an insulating substrate such as sapphire or spinel is used. The semiconductor layer 2 is formed by a nitride semiconductor layer,
Nitride semiconductor In _x A doped with n-type impurities such as Si
_{l y Ga 1-xy N (} 0 ≦ x, 0 ≦ y, x + y ≦ 1) and the n-type nitride semiconductor layer 21 made of, p-type nitride semiconductor formed of a nitride semiconductor doped with p-type impurities such as Mg Layer 23
At least.

After the formation of the semiconductor layer 2, FIG.
As shown in FIG. 3, an ohmic contact with the p-type nitride semiconductor layer 23 is obtained on the p-type nitride semiconductor layer 23, for example, Ni /
A first p-electrode 31, which is a first metal layer having Pt formed thereon, and a warp prevention layer 32 are sequentially formed on the Pt layer. Here, the warp prevention layer 32 is formed from a metal layer having a thickness of 10 μm or more. As described above, since the p-electrode 3 including the second metal layer having a thickness of at least 10 μm is formed on almost the entire surface of the wafer, the supporting of the wafer for removing the substrate 1 is performed with sufficient strength over the entire wafer. A member can be obtained. This support metal layer 32 is preferably formed by electroless plating. This is because, when an insulating material such as sapphire is used for the substrate 1, it is difficult to apply an electric field uniformly to the entire wafer and to form a uniform metal layer. At this time, if the thickness of the warp prevention layer 32 is not uniform, the wafer is distorted, and the semiconductor layer 2 is easily broken.

Thereafter, as shown in FIG. 1C, the wafer on which the p-electrode 3 having the supporting metal layer 32 is formed on the support 5 is placed so that the p-electrode 3 side faces the support 5.
The substrate 1 is polished and removed so that the n-type nitride semiconductor layer 21 is exposed by using the polishing member 6. Alternatively, after leaving the substrate at 10 to 100 μm, at least a part of the substrate 1 may be removed by etching or a dicing saw. Thus, at least a part of n-type nitride semiconductor layer 21 is exposed. As described above, by forming the p-electrode having at least the second metal layer having a thickness of 10 μm or more on the p-type nitride semiconductor layer 23, it is possible to reduce the warpage of the wafer caused during the polishing of the substrate 1, Cracks can be prevented. In addition, the substrate 1 can be polished while reducing distortion and maintaining parallelism with high accuracy.

Then, the exposed n-type nitride semiconductor layer 21
N electrode 4 made of, for example, W / Al or ITO
To form In this case, an n-electrode may be formed so as to contact at least a part of the exposed n-type nitride semiconductor layer. In particular, by forming the n-electrode 4 as a transparent electrode, the p-electrode 3 formed with a sufficient thickness and having a high reflectance is used as a reflection surface, and light generated in the semiconductor layer 2 is extracted with high efficiency. Can be. W /
In the case of Al, W is formed in a thickness of 10 to 30 °, Al is formed in a thickness of about 20 to 40 °, and in the case of ITO, the thickness is set to 1000 to 5000 °, whereby a transparent electrode can be obtained.

The light emitting element can be obtained by dividing the wafer on which the electrodes are formed as described above into an appropriate size. According to the method for forming an electrode of a light emitting element of the present invention, the yield can be improved because the wafer can be prevented from cracking, and the number of light emitting elements obtained per unit area of the wafer can be improved. Further, in the light emitting device of the present invention, since the p electrode 3 and the n electrode 4 can be formed to face each other with the semiconductor layer 2 interposed therebetween, uniform light emission can be obtained. Further, when sapphire is used as the substrate 1, a nitride semiconductor layer 2 having good crystallinity can be formed, so that light emission with high luminous efficiency can be obtained. (Embodiment 2) A light emitting device and a method for forming an electrode of the light emitting device of the present invention will be described below.

As shown in FIG. 7A, a semiconductor layer 2 is formed on a wafer-like substrate 1. As the substrate 1, for example, an insulating substrate such as sapphire or spinel is used. The semiconductor layer 2 is formed by a nitride semiconductor layer,
Nitride semiconductor In _x A doped with n-type impurities such as Si
_{l y Ga 1-xy N (} 0 ≦ x, 0 ≦ y, x + y ≦ 1) and the n-type nitride semiconductor layer 21 made of, p-type nitride semiconductor formed of a nitride semiconductor doped with p-type impurities such as Mg Layer 23
At least.

After the formation of the semiconductor layer 2, FIG.
As shown in FIG.
A first p-electrode 31, which is a metal layer formed with a metal capable of obtaining ohmic contact with the type nitride semiconductor layer 23, for example, a Ni / Pt layer, is formed. This first p electrode 31 is made of Ni / Pt
A configuration in which a Pt layer is further stacked on the layer may be adopted.

After the formation of the first p-electrode, a plurality of metal bumps 32a are formed on the first p-electrode 31, as shown in FIG. Next, as shown in FIG.
The resin layer 3 is formed on the first p-electrode 31 except for the portion where
2b is formed. Then, a surface treatment for making the surface uniform by grinding or the like is performed. These metal bumps 32
The warp preventing layer 32 for preventing the warpage of the wafer during polishing of the substrate 1 is formed by the resin layer 31a and the resin layer 31b. It is preferable that the warp prevention layer 32 has a thickness of about 40 to 80 μm. Since the warp prevention layer is formed on almost the entire surface of the wafer in this manner, a wafer supporting member for removing the substrate 1 can be obtained with sufficient strength over the entire wafer.

Thereafter, as shown in FIG. 7E, the wafer on which the p-electrode 3 having the warp preventing layer 32 is formed on the support 5 is placed so that the p-electrode 3 side faces the support 5.
The substrate 1 is polished and removed so that the n-type nitride semiconductor layer 21 is exposed by using the polishing member 6. Alternatively, after leaving the substrate at 10 to 100 μm, at least a part of the substrate 1 may be removed by etching or a dicing saw. Thus, at least a part of n-type nitride semiconductor layer 21 is exposed. As described above, by forming the p-electrode having at least the warpage prevention layer 32 having a thickness of 10 μm or more on the p-type nitride semiconductor layer 23, the warpage of the wafer generated during polishing of the substrate 1 can be reduced, and the semiconductor layer 2 can be reduced. Cracks can be prevented.
In addition, the substrate 1 can be polished while reducing distortion and maintaining parallelism with high accuracy.

Then, the exposed n-type nitride semiconductor layer 21
N electrode 4 made of, for example, W / Al or ITO
To form In this case, an n-electrode may be formed so as to contact at least a part of the exposed n-type nitride semiconductor layer.

The wafer on which the electrodes are formed as described above is divided into a suitable size including at least one metal bump 32a to obtain a light emitting device. According to the method for forming an electrode of a light emitting element of the present invention, the yield can be improved because the wafer can be prevented from cracking, and the number of light emitting elements obtained per unit area of the wafer can be improved. Further, the light emitting device of the present invention has a p-electrode 3, an n-electrode 4
Can be formed facing each other with the semiconductor layer 2 interposed therebetween, so that uniform light emission can be obtained. Further, when sapphire is used as the substrate 1, a nitride semiconductor layer 2 having good crystallinity can be formed, so that light emission with high luminous efficiency can be obtained. (Example 1) An example in which the method for forming an electrode of a light emitting element according to the present invention is applied to an LED will be described.

For example, a sapphire C-plane is used as the substrate 1 and each layer is formed by a metal organic chemical vapor deposition method (MOCVD method). As shown in FIG. 2A, a buffer layer (not shown) for relaxing the lattice constant mismatch between the substrate 1 and the nitride semiconductor layer 2 on the substrate 1 and an n-type for obtaining ohmic contact with the n-electrode. An n-type contact layer which is a nitride semiconductor layer 21, an active layer 2 which generates light by carrier coupling
2. A p-type nitride semiconductor layer 23 composed of a p-type cladding layer for confining carriers in the active layer and a p-type contact layer for obtaining ohmic contact with the p-electrode is sequentially formed.

The buffer layer is made of GaN having a film thickness of 10 to 500.degree. The n-type contact layer has a thickness of 1 to 20 μm, preferably 2 to 6 μm.
m of Si-doped GaN. Further, an n-type cladding layer made of, for example, AlGaN doped with Si may be formed on the n-type contact layer. The active layer 22 may be composed of InGaN or GaN / In
It may be configured as a GaN / GaN single well layer or a multiple quantum well layer. The p-type cladding layer has a thickness of 100 to 5
It is made of Mg-doped AlGaN of 00 °. Also,
This p-type cladding layer can be omitted if the confinement of carriers in the active layer is sufficient. The p-type contact layer has a thickness of 0.001 to 0.5 μm, preferably 0.05 to 0.2 μm.
It is composed of μm Mg-doped GaN.

As shown in FIG. 2B, Ni is formed to a thickness of 100 ° on the p-type nitride semiconductor layer 23 of the wafer formed as described above, and Pt is formed thereon to a thickness of 500 °. After forming by sputtering or the like, annealing is performed. This combination of Ni / Pt is Ni / A
Good ohmic contact with p-type nitride semiconductor layer 23 can be obtained also for u, Co / Au and Pd / Pt. Further, after forming the Ni / Pt layer, Pt is formed to a thickness of 5000 °, and annealing is performed to form the first p-electrode 31.

After the formation of the first p-electrode 31, palladium Pd is roughened by sputtering or etching to a thickness of several to 1,000 to roughen the surface to be absorbed, thereby forming an underlayer 32a. This Pd acts as a reaction catalyst. Then, on the underlayer 32a, 10-
The second metal layer 32b is formed by electroless plating with a thickness of at least μm, preferably 50 to 300 μm. The phosphorus content is preferably 5 to 10%. 1000 at the end
It is formed by electroless plating or vapor deposition with a thickness of Å. When an insulator such as sapphire is used for the substrate 1 of the nitride semiconductor layer 2, it is difficult to apply a uniform electric field to the entire wafer. Therefore, a metal layer having a sufficient thickness is formed by electroless plating. Is preferred. Examples of other electroless plating of Ni include Cu, Au, and Ag. In particular, Ni is more preferable because the formation rate is high and it is easy to obtain a sufficient thickness.

Thereafter, as shown in FIG.
The wafer on which is formed is placed on a support table 5 such as a surface plate, and the surface of the substrate 1 is polished by a polishing member 6 such as a grindstone. As described above, by forming the second metal layer 32b having a sufficient thickness as compared with the first p-electrode 31, it is possible to prevent the wafer from being distorted at the time of polishing the substrate. Can be polished.

The polishing of the substrate 1 is performed until the n-type nitride semiconductor layer 21 is exposed, as shown in FIG. After the substrate 1 is polished, the region damaged by the polishing of the n-type contact layer 21 is etched by about 1 to 2 μm by RIE. After that, the exposed n-type contact layer 21 is made of tungsten with a thickness of
An n-electrode 4 is formed by sputtering with a thickness of 0 °, annealing is performed, and an n-electrode 4 is formed as shown in FIG. Further, this n-electrode 4 may be formed from ITO.
The wafer thus formed is divided by a dicing saw to obtain light emitting elements as shown in FIG.

Although the example in which the n-electrode is formed on the entire surface of the wafer is shown here, the n-electrode is partially formed by patterning.
By forming the electrode 4, the light extraction efficiency from the light emitting element can be improved. (Example 2) The steps up to the formation of the p-electrode 3 are performed in the same manner as in Example 1. After the formation of the p-electrode, the light-emitting element is placed on the support base 5 and the substrate 1 is set to 10 μm to 1 μm as shown in FIG.
Polishing is performed by the polishing member 6 so as to leave about 00 μm on the n-type nitride semiconductor layer 21 side. The thickness of the substrate 1 to be left may be appropriately set according to the control accuracy of polishing. Thereafter, as shown in FIG. 4B, the substrate 1 is shaved by a dicing saw to a depth of about 0.5 to 2.0 μm of the n-type contact layer to form a groove. After the formation of the groove, the sapphire substrate 1 and the n-type nitride semiconductor layer 21 are subjected to RI
Etching is performed in E to remove the n-type nitride semiconductor layer 21 by about 1 to 2 μm.

Then, the substrate 1 and the n-type nitride semiconductor layer 21 are formed by sputtering tungsten W to a thickness of 20 ° and then aluminum Al to a thickness of 30 ° by sputtering, and annealing is performed, as shown in FIG. The n-electrode 4 is formed as shown in FIG. The wafer thus formed is divided for each light emitting element by a dicing saw as shown in FIG.

In the second embodiment, the n-type nitride semiconductor layer 21
Damage due to polishing can be minimized. Further, it is possible to prevent the n-type nitride semiconductor layer 21 from being excessively polished due to variation in control of the polishing depth.

The n-electrode 4 does not necessarily need to be formed on the entire surface of the n-type nitride semiconductor layer 21. As shown in the perspective view of the light-emitting element shown in FIG. It may be formed. Here, FIG. 5B is a plan view of the example of the n-electrode 4 shown in FIG. The number of grooves formed in the n-type nitride semiconductor layer 21 does not need to be one, and a plurality of grooves may be formed. Of course, it is not necessary to form the n-electrode 4 in the whole area of the groove, and it is sufficient to form the n-electrode 4 only in the area necessary for carrier injection.

Further, grooves formed in the n-type nitride semiconductor layer 21 may be formed from the center of the light emitting device to each corner of the light emitting device as shown in FIG. However, FIG. 6 shows FIG.
FIG. 4 is a plan view of the n-electrode 4 as viewed from directly above, similarly to FIG. In this example, since the n-electrodes 4 are formed in two directions that are not parallel to each other in the plane of the n-type nitride semiconductor layer 21 from the center of the light-emitting element, carriers are relatively uniformly injected over the entire surface of the light-emitting element, and light emission is performed. Light emission in the element can be made uniform.

Further, it is preferable to form a groove by using a dicing saw because it is not necessary to add a new configuration to a light emitting device manufacturing apparatus. However, the shape for exposing the n-type nitride semiconductor layer 21 is as follows. The n-type nitride semiconductor layer 2 need not be formed in a groove shape, and at least a part of the substrate necessary for performing carrier injection is removed regardless of the shape.
1 may be exposed. (Embodiment 3) An example in which the method for forming an electrode of a light emitting element according to the present invention is applied to an LED will be described.

For example, each layer is formed by a metal organic chemical vapor deposition method (MOCVD method) using the sapphire C plane as the substrate 1. As shown in FIG. 8A, a buffer layer (not shown) for reducing the lattice constant mismatch between the substrate 1 and the nitride semiconductor layer 2 on the substrate 1 and an n-type for obtaining ohmic contact with the n-electrode. An n-type contact layer which is a nitride semiconductor layer 21, an active layer 2 which generates light by carrier coupling
2. A p-type nitride semiconductor layer 23 composed of a p-type cladding layer for confining carriers in the active layer and a p-type contact layer for obtaining ohmic contact with the p-electrode is sequentially formed.

The buffer layer is made of GaN having a film thickness of 10 ° to 500 ° grown at a low temperature. The n-type contact layer has a thickness of 1 to 20 μm, preferably 2 to 6 μm.
m of Si-doped GaN. Further, an n-type cladding layer made of, for example, AlGaN doped with Si may be formed on the n-type contact layer. The active layer 22 may be composed of InGaN or GaN / In
It may be configured as a GaN / GaN single well layer or a multiple quantum well layer. The p-type cladding layer has a thickness of 100 to 5
It is made of Mg-doped AlGaN of 00 °. Also,
This p-type cladding layer can be omitted if the confinement of carriers in the active layer is sufficient. The p-type contact layer has a thickness of 0.001 to 0.5 μm, preferably 0.05 to 0.2 μm.
It is composed of μm Mg-doped GaN.

As shown in FIG. 8B, Ni is formed to a thickness of 100 ° on the p-type nitride semiconductor layer 23 of the wafer formed as described above, and Pt is formed thereon to a thickness of 500 °. After forming by sputtering or the like, annealing is performed. This combination of Ni / Pt is Ni / A
Good ohmic contact with p-type nitride semiconductor layer 23 can be obtained also for u, Co / Au and Pd / Pt. Further, after forming the Ni / Pt layer, Pt is formed to a thickness of 5000 °, and is annealed to form the first p-electrode 31.

After the formation of the first p-electrode 31, a plurality of metal bumps 32a are formed on the first p-electrode 31, and then a resin layer 32b is formed on the first p-electrode 31 excluding the portion where the metal bump 32a is formed. Is done. The metal bump 32a is composed of a gold bump, a copper bump, a solder bump, or the like. The resin layer 32b is made of an epoxy resin or the like.
By these metal bumps 32a and resin layer 31b,
Warpage prevention layer 3 for preventing wafer warpage during polishing of substrate 1
2 are formed. The thickness of the warpage prevention layer 32 is preferably 20 μm or more, and more preferably about 40 to 80 μm. Since the warp prevention layer is formed on almost the entire surface of the wafer in this manner, a wafer supporting member for removing the substrate 1 can be obtained with sufficient strength over the entire wafer. Further, after forming the warpage prevention layer 32 composed of the metal bumps 32a and the resin layer 32b, it is preferable to perform a surface treatment to make the thickness uniform, thereby preventing the wafer from being distorted during substrate polishing.

At the end, Au is formed to a thickness of 1000 ° by plating or vapor deposition to form an Au layer 34.
Thereby, the adhesion between the p-electrode 3 and the lead member or the wire can be improved. This Au layer 34
Can be omitted if the adhesion between the warp prevention layer 32 and the lead member or wire is good.

Thereafter, as shown in FIG.
The wafer on which is formed is placed on a support table 5 such as a surface plate, and the surface of the substrate 1 is polished by a polishing member 6 such as a grindstone. As described above, by forming the warp prevention layer 32 having a sufficient thickness as compared with the first p-electrode 31, it is possible to prevent the wafer from being distorted at the time of polishing the substrate. Polishing can be performed.

The polishing of the substrate 1 is performed until the n-type nitride semiconductor layer 21 is exposed, as shown in FIG. After the substrate 1 is polished, the region damaged by the polishing of the n-type contact layer 21 is etched by about 1 to 2 μm by RIE. After that, the exposed n-type contact layer 21 is made of tungsten with a thickness of
An n-electrode 4 is formed at a thickness of 0 ° by sputtering, annealing is performed, and an n-electrode 4 is formed as shown in FIG. Further, this n-electrode 4 may be formed from ITO.
The wafer thus formed is divided by a dicing saw to obtain light emitting elements as shown in FIG. In the example shown in FIG. 9, each light emitting element has two metal bumps 32.
Although a configuration is provided having a, a single metal bump 32a may be provided for each light emitting element, as long as at least one metal bump 32a is provided.

Although the example in which the n-electrode is formed on the entire surface of the wafer is shown here, the n-electrode is partially formed by patterning.
By forming the electrode 4, the light extraction efficiency from the light emitting element can be improved. (Example 4) The steps up to the formation of the p-electrode 3 are performed in the same manner as in Example 1. After the formation of the p-electrode 3, the light-emitting element is placed on the support 5 and the substrate 1 is set to 10 μm as shown in FIG.
Polishing is performed by the polishing member 6 so as to leave about 100 μm on the n-type nitride semiconductor layer 21 side. The thickness of the substrate 1 to be left may be appropriately set according to the control accuracy of polishing. Thereafter, as shown in FIG. 10 (b), the substrate 1 is made to have an n-type contact layer of 0.5 to 2.0 μm using a dicing saw.
It is cut to a certain depth to form a groove. After the formation of the groove, the sapphire substrate 1 and the n-type nitride
Etching is performed by the IE so that the n-type nitride semiconductor layer 21 is shaved by about 1 to 2 μm.

Then, the substrate 1 and the n-type nitride semiconductor layer 21 are formed by sputtering tungsten W to a thickness of 20 ° and then aluminum Al to a thickness of 30 ° by sputtering, and annealing is performed, as shown in FIG. The n-electrode 4 is formed as shown in FIG. The wafer thus formed is divided for each light emitting element by a dicing saw as shown in FIG.

In the second embodiment, the n-type nitride semiconductor layer 21
Damage due to polishing can be minimized. Further, it is possible to prevent the n-type nitride semiconductor layer 21 from being excessively polished due to variation in control of the polishing depth.

The n-electrode 4 does not necessarily need to be formed on the entire surface of the n-type nitride semiconductor layer 21. Like the second embodiment, the n-electrode 4 is partially formed as shown in the perspective view of the light-emitting element shown in FIG. Alternatively, the n-electrode 4 may be formed. Here, FIG.
FIG. 6 is a plan view of the example of the n-electrode 4 shown in FIG. The number of grooves formed in the n-type nitride semiconductor layer 21 does not need to be one, and a plurality of grooves may be formed. Of course, it is not necessary to form the n-electrode 4 in the whole area of the groove, and it is sufficient to form the n-electrode 4 only in the area necessary for carrier injection.

Further, the groove formed in the n-type nitride semiconductor layer 21 may be formed from the center of the light emitting element to each corner of the light emitting element as shown in FIG. However,
FIG. 6 is a plan view of the n-electrode 4 as viewed from directly above, similarly to FIG. 5B. In this example, since the n-electrodes 4 are formed in two directions that are not parallel to each other in the plane of the n-type nitride semiconductor layer 21 from the center of the light-emitting element, carriers are relatively uniformly injected over the entire surface of the light-emitting element, and light emission is performed. Light emission in the element can be made uniform.

Further, it is preferable to form a groove by using a dicing saw because it is not necessary to add a new structure to a light emitting device manufacturing apparatus. However, the shape for exposing the n-type nitride semiconductor layer 21 is as follows. The n-type nitride semiconductor layer 2 need not be formed in a groove shape, and at least a part of the substrate necessary for performing carrier injection is removed regardless of the shape.
1 may be exposed.

[0061]

According to the light emitting device and the method for forming an electrode of the light emitting device of the present invention, it is possible to provide a light emitting device having a nitride semiconductor layer having electrodes formed on both sides of the light emitting device while obtaining good crystallinity. it can.

[Brief description of the drawings]

FIG. 1 is a view schematically showing steps from formation of a p-electrode to polishing of a substrate in Embodiment 1 of the present invention.

FIG. 2 is a diagram schematically showing steps from formation of a p-electrode to polishing of a substrate in Example 1 of the present invention.

FIG. 3 is a diagram illustrating a case where a substrate is removed according to the first embodiment of the present invention;
It is a figure which shows roughly the process until formation of an electrode and division | segmentation into a light emitting element.

FIG. 4 is a diagram illustrating a state in which the substrate is removed according to the second embodiment of the present invention;
It is a figure which shows roughly the process until formation of an electrode and division | segmentation into a light emitting element.

FIG. 5 is a schematic view of a light emitting device according to a modification of the second embodiment of the present invention.

FIG. 6 is a schematic plan view of a light emitting device according to another modification of the second embodiment of the present invention, as viewed from an n-electrode side.

FIG. 7 is a drawing schematically showing steps from formation of a p-electrode to polishing of a substrate in Embodiment 2 of the present invention.

FIG. 8 is a view schematically showing steps from formation of a p-electrode to polishing of a substrate in a third embodiment of the present invention.

FIG. 9 is a diagram illustrating a state where n is removed from the substrate according to the third embodiment of the present invention;
It is a figure which shows roughly the process until formation of an electrode and division | segmentation into a light emitting element.

FIG. 10 is a drawing schematically showing steps from removal of a substrate to formation of an n-electrode and division into light-emitting elements in Example 4 of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Sapphire substrate 2 ... Nitride semiconductor layer 21 ... N-type nitride semiconductor layer 22 ... Active layer 23 ... P-type nitride semiconductor layer 3 ... P electrode 31 ... 1st metal layer 32 ... Warp prevention layer 32a ... Underlayer 32b ... 2nd metal layer 32c ... Metal bump 32d ... Resin layer 34 ... Au layer 4 ... n electrode 5 ... Support table 6 ... Polishing member

 ──────────────────────────────────────────────────続 き Continued from the front page F term (reference) 4M104 AA04 AA07 AA09 BB04 BB05 BB07 BB18 BB36 CC01 DD34 DD37 DD53 DD78 EE05 EE09 EE18 FF13 GG04 HH20 5F041 CA40 CA46 CA77 CA82 CA85 CA92 CA93 CA98 CA99 5F07 CB CB CB CB CB

Claims (18)

[Claims] 1. A method for manufacturing a light-emitting device, comprising: dividing a wafer on which at least an n-type nitride semiconductor layer and a p-type nitride semiconductor layer are laminated on a substrate for each light-emitting device; Forming a first metal layer for obtaining ohmic contact with the p-type nitride semiconductor layer over substantially the entire surface;
A p-electrode forming step of forming a warp preventing layer for preventing warping of the wafer above the metal layer; and after the p-electrode forming step, the n-type nitride semiconductor is formed in each region of the light emitting element to be divided. A substrate removing step of removing the substrate from a surface opposite to a substrate surface on which the nitride semiconductor layer is laminated so that at least a part of the layer is exposed; and at least a portion on the exposed n-type nitride semiconductor layer. An n-electrode forming step of forming an n-electrode so as to be in contact with a part thereof; and a dividing step of dividing the wafer on which the p-electrode and the n-electrode are formed for each region to be divided into light emitting elements. A method for manufacturing a light emitting element. 2. The method according to claim 1, wherein the warp prevention layer includes at least a second metal layer having a thickness of 10 μm or more. 3. The method according to claim 2, wherein the second metal layer is made of a metal containing at least Ni. 4. The method according to claim 2, wherein the second metal layer is formed by electroless plating. 5. The anti-warp layer comprises at least one metal bump formed on the first metal layer and a resin formed on the first metal layer excluding a portion where the metal bump is formed. 2. The method of claim 1, wherein the at least one layer comprises at least one layer.
3. The method for manufacturing a light emitting device according to item 1. 6. The method for manufacturing a light emitting device according to claim 1, further comprising an Au layer forming step of forming an Au layer containing at least Au above the warp prevention layer. 7. The method according to claim 1, wherein the substrate uses sapphire. 8. The method according to claim 1, wherein the n-electrode is a transparent electrode. 9. A light emitting device having a semiconductor layer in which at least an n-type nitride semiconductor layer and a p-type nitride semiconductor layer are laminated and having an n-electrode and a p-electrode, wherein the n-electrode and the p-electrode are The p-electrode is formed so as to face the semiconductor layer, and the p-electrode is formed on almost the entire surface of the p-type nitride semiconductor layer.
A light emitting device comprising at least a first metal layer for obtaining ohmic contact with a type nitride semiconductor layer and a warp preventing layer for preventing warping of the wafer above the metal layer. 10. At least an n-type nitride semiconductor layer and a p-type nitride semiconductor layer.
A semiconductor layer in which a nitride semiconductor layer is stacked, and n
In a light emitting device having an electrode and a p-electrode, the p-electrode is formed on almost the entire surface of the p-type nitride semiconductor layer.
A first metal layer for obtaining ohmic contact with the n-type nitride semiconductor layer, and a warp preventing layer for preventing the warpage of the wafer above the metal layer, wherein the n-type nitride semiconductor layer is A light emitting device, wherein at least a part of the substrate is removed and exposed, and the n-electrode is formed so as to be in contact with at least a part of the exposed n-type nitride semiconductor layer. 11. The warp prevention layer includes at least a second metal layer having a thickness of 10 μm or more.
Or the light-emitting element according to 10. 12. The light emitting device according to claim 11, wherein said second metal layer is made of a metal containing at least Ni. 13. The light emitting device according to claim 11, wherein said second metal layer is formed by electroless plating. 14. The anti-warp layer includes at least one metal bump formed on the first metal layer and a resin formed on the first metal layer excluding a portion where the metal bump is formed. The light-emitting device according to claim 9, wherein the light-emitting device comprises at least a layer. 15. The light emitting device according to claim 14, wherein said resin layer has a thickness of 20 μm or more. 16. The light emitting device according to claim 9, wherein the p-electrode has an Au layer containing at least Au above the warp prevention layer. 17. The light emitting device according to claim 9, wherein the substrate uses sapphire. 18. The light emitting device according to claim 9, wherein said n-electrode is a transparent electrode.