JP2001308531A - Multilayer printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board by which connection of signal wires to electrode pins can be performed with reliability and no plating failure occurs even if pitch of the signal wires is reduced. SOLUTION: The board 1 on which a socket 2 provided with several electrode pins 6 of narrow pitch is mounted forms multiple layers comprising a power supply layer 11, a ground layer 12 and a signal layer 13. The signal layer 13 has an inner layer 8a of signal wires in its inside and is further provided with through holes 16 into which the electrode pins 6 are inserted. Each through hole 16 is comprised of a part 16b of regular diameter whose internal diameter is a normal value, and a part 16a of small diameter whose internal diameter near the inner layer 8a of signal wires is smaller than that of the part 16b of regular diameter.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board, and more particularly to a multilayer printed wiring board having a structure in which a socket having narrow pitch electrode pins is mounted, and the electrode pins are inserted into through holes and connected by soldering. .

[0002]

2. Description of the Related Art In a semiconductor device, in order to extract an initial failure in a short time, a burn-in test is performed in a high-temperature environment with a voltage applied. This prevents the initial failure from being shipped to the market. The burn-in uses a board on which a circuit pattern is formed and on which necessary electronic components are mounted, and a burn-in board including a socket for mounting a semiconductor device on the board.

FIG. 3 shows an example of a burn-in board.
A plurality of sockets 2 for mounting a semiconductor device 5 to be burned in are mounted on a substrate 1 on which a circuit pattern is formed on the surface and inside. At a predetermined position on the back surface (lower surface) of the substrate 1, a passive component 3 such as a resistor or a capacitor is attached. The socket 2 has a plurality of socket electrode pins 6 arranged in a matrix. The socket electrode pins 6 are inserted into through holes (not shown) provided in the substrate 1 and soldered. An edge electrode portion 4 connected to a circuit pattern and used for connection to the outside is provided at one end of the substrate 1, and the entire back surface of the substrate 1 is covered with a protective cover 7 except for this portion.

FIG. 4 shows the details of the connection between the socket electrode pins 6 and the substrate 1. The substrate 1 includes a power supply layer 11 provided with power supply wiring for supplying power to the semiconductor device, a ground layer 12 provided with wiring for grounding and laminated on the power supply layer 11, and a signal layer 13 laminated on the ground layer 12. Having a multilayer structure. The signal layer 13 has an inner layer signal wiring 8 a provided inside, a pattern wiring 8 b formed on the surface, and the pattern wiring 8 b extends to the edge electrode portion 4. The socket electrode pins 6 of the socket 2 are inserted into through holes 10 provided through the substrate 1, and solder 9
Are connected by soldering.

FIG. 5 shows the arrangement of the inner layer signal wiring 8a and the socket electrode pins 6 on the substrate 1. Socket electrode pin 6
Is composed of an inner signal pin 14 and an outer signal pin 15, and the inner signal pin 14 is connected to an inner layer signal wiring 8a routed between signal pins arranged on the outside.

In the through hole 10, a conductor layer (not shown) is formed on the inner surface by plating to connect the socket electrode pins 6. The socket electrode pins 6 are soldered to a conductor layer.

In Japanese Unexamined Patent Publication No. Hei 8-264940, a through hole having a first outer diameter is formed in a through hole of a multilayer substrate.
Next, a second outer diameter is opened to a predetermined depth so as to be coaxial with the through hole having the first outer diameter. A conductor layer is formed in the through hole thus formed by plating. The conductor layer is made thicker at the second outer diameter, thinner at the first outer diameter, and has the same thickness as the inside even at the opening where the thickness tends to be thicker, and has a uniform inner diameter over the entire through hole. To do.

Further, since the metal wiring pattern of the multilayer substrate is extremely thin, the area exposed in the through hole is small,
The contact area with the conductor layer due to the plating process is reduced, and a connection failure may occur. Therefore, Japanese Patent Application Laid-Open No. 8-153
In JP-A-971, the inner diameter of the through-hole is made different for each laminated plate, the exposed surface of the metal wiring pattern is formed on the upper layer, and the contact area with the solder in the through-hole is increased.

[0009]

However, according to the conventional multilayer printed wiring board, when a narrow pitch socket having a pitch of 0.65 to 0.75 mm is used, a through hole 10 is required.
Aspect ratio (= substrate thickness / through-hole diameter) increases, and when plating the inner wall of the through-hole, it becomes difficult to flow the plating solution through the through-hole, and poor plating (which causes a reduction in connection reliability) is likely to occur. .

Further, when the inner diameter of the through hole 10 is reduced, it is difficult to increase the amount of solder for soldering the socket electrode pin 6 and the through hole 10, and the contact area between the solder 9 and the inner wall of the through hole 10 is reduced. Smaller,
Connection strength is weakened. As a result, the reliability of the pin connection decreases.

According to Japanese Patent Application Laid-Open No. 8-264940, an opening in which the thickness of the conductor layer is likely to be large is larger than the required inside diameter of the through-hole so that the conductor layer in the through-hole has a uniform inside diameter. This is the second outer diameter, and it is inevitable that the interval between the socket electrode pins becomes large. Therefore, if the pitch of the signal wiring becomes narrow due to the narrow pitch socket, it cannot be applied.

Further, according to Japanese Patent Application Laid-Open No. 8-153971, since the inner diameter of the through-hole differs for each laminated plate, the maximum diameter of the through-hole increases as the number of layers increases. For this reason, if the pitch of the signal wiring becomes narrow due to the narrow pitch socket, it cannot be applied.

Accordingly, an object of the present invention is to provide a multilayer printed wiring board which can be reliably connected to electrode pins even if the pitch of signal wiring is narrowed by application to a narrow pitch socket, and which does not cause plating failure. Is to do.

[0014]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a multi-layer comprising a signal layer in which a socket having a plurality of electrode pins having a narrow pitch is mounted and a signal wiring is formed inside. The printed wiring board includes a through hole that is used to insert and solder the plurality of electrode pins and that has an inner diameter near the signal wiring of the signal layer smaller than other parts. Provided is a multilayer printed wiring board.

According to this structure, since the inside diameter of the through hole is smaller in the vicinity of the signal wiring of the signal layer than in other portions, the aspect ratio does not increase even if the pitch of the electrode pins of the socket is narrow. The connection between the through-hole and the electrode pin is ensured, and no plating failure occurs.

[0016]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a first embodiment of a multilayer printed wiring board according to the present invention. Hereinafter, a case where a multilayer printed wiring board is used for a burn-in board will be described. Also, a multilayer printed wiring board will be described as a substrate. Figure 3 shows the overall view of the burn-in board
And the signal wiring 8 in the burn-in board inner layer.
5 and the arrangement of the socket electrode pins 6 are also as shown in FIG. Also, in socket 2,
A narrow pitch socket having a pitch of 0.65 to 0.75 mm is used.

A power supply layer 11 having a power supply wiring, a ground layer 12 provided with a ground wiring, and a signal layer 13 having an internal signal wiring 8a formed therein are provided at predetermined positions on the upper surface of the multilayered substrate 1. Has a plurality of sockets 2 for mounting the semiconductor device 5. Socket 2
Through holes 16 into which the socket electrode pins 6 are inserted.
Consists of a small diameter portion 16a and a standard diameter portion 16b. Power supply layer 1
1 and a standard diameter portion 16 provided on the ground layer 12
b is the conventional inner diameter corresponding to the pitch of the socket electrode pins 6, and the small diameter portion 16 a is the inner layer signal wiring 8 of the signal layer 13.
It is provided in the portion a and is machined to an inner diameter smaller than the standard diameter portion 16b. The overall shape of the through hole 16 is a bottle shape. By providing the standard diameter portion 16b in this manner, the depth of the small diameter portion 16a in the inner layer signal wiring 8a becomes shallow and the aspect ratio becomes low.

When soldering the through-hole 16 through the socket electrode pins 6, the amount of supplied solder is small in the small diameter portion 16a, but the solder is sufficiently penetrated into the standard diameter portion 16b, so that the solder connection is insufficient. It will not be. Therefore, the reliability of the connection is ensured. In addition, through hole 1
The conductive layer in 6 is formed by plating.
The presence of the standard diameter portion 16b makes it easier for the plating solution to flow into the through hole 16, so that plating can be easily performed.

Next, another embodiment of the present invention will be described in detail with reference to the drawings. FIG. 2 shows another embodiment of the multilayer printed wiring board of the present invention. In FIG. 2, the same reference numerals are used for the same components as those in FIG. 1, and thus the duplicate description will be omitted. The present embodiment is a case where two inner layer signal wires 8a are horizontally provided side by side between the socket electrode pins 6. Again,
With a structure in which the inside diameter of the through hole 16 adjacent to the inner layer signal wiring 8a in the signal layer 13 is reduced, the reliability of the connection between the socket electrode pin 6 and the substrate through hole 16 is not impaired. The area where the inner layer wiring can be formed can be expanded, and the number of wirings between pins can be increased. As a result, the number of layers of the multilayer substrate can be reduced, and the cost of the substrate can be reduced.

A method of performing burn-in by a burn-in board using a multilayer printed wiring board having the structure shown in FIGS. 1 and 2 will be described. A burn-in board having a semiconductor device 5 mounted on a socket 2 is set in a burn-in apparatus having a constant temperature bath. Then, after heating to a predetermined temperature, a voltage is applied to the semiconductor device 5 or a test signal is input, and the semiconductor device 5 is brought into a test state for a predetermined time.

In the above embodiment, the signal layer 13 is provided on one surface of the substrate 1, but may be provided on the opposite side or in the center.

[0022]

As described above, according to the multilayer printed wiring board of the present invention, the through hole having the smaller inner diameter than the standard diameter portion is provided near the signal wiring of the signal layer. In addition, it is possible to reduce defective through-hole plating, increase the amount of solder at the connection portion and increase the connection area, and improve the connection reliability between the socket electrode pin and the through-hole.

[Brief description of the drawings]

FIG. 1 is a front sectional view showing a main part of a first embodiment of a burn-in board of the present invention.

FIG. 2 is a front sectional view showing a main part of another embodiment of the burn-in board of the present invention.

FIG. 3 is a front sectional view showing the entire configuration of the burn-in board.

FIG. 4 is a front sectional view showing details of a connection portion between a socket electrode pin and a substrate.

5 is a front sectional view showing details of the arrangement of inner layer signal wiring and socket electrode pins on the substrate of the burn-in board of FIG. 3;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Socket 5 Semiconductor device 6 Socket electrode pin 8a Inner layer signal wiring 8b Pattern wiring 9 Solder 11 Power supply layer 12 Ground layer 13 Signal layer 16 Through hole 16a Small diameter section 16b Standard diameter section

Continued on the front page F term (reference) 5E317 AA24 BB01 BB11 CC31 CC53 CD34 GG07 GG14 5E338 AA03 BB04 BB13 BB14 BB25 BB75 CC01 CC04 CC06 EE11 EE23 EE33 EE51 5E346 AA42 BB02 BB03 BB04 BB06 H33H33

Claims (3)

[Claims] 1. A multilayer printed wiring board having a signal layer in which a socket having a plurality of narrow pitch electrode pins is mounted and in which a signal wiring is formed, wherein the plurality of electrode pins are inserted and soldered. A multi-layer printed wiring board, characterized in that the multi-layer printed wiring board includes a through hole having a smaller inner diameter than the other portion of the signal layer in the vicinity of the signal wiring. 2. The semiconductor device according to claim 2, wherein the through hole has a thickness of 0.65 to 0.7.
2. The multilayer printed circuit board according to claim 1, wherein the pitch is 5 mm. 3. The multilayer printed wiring board according to claim 1, wherein the signal layer is disposed on an outermost layer.