JP2001196512A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2001196512A JP2001196512A JP2000002360A JP2000002360A JP2001196512A JP 2001196512 A JP2001196512 A JP 2001196512A JP 2000002360 A JP2000002360 A JP 2000002360A JP 2000002360 A JP2000002360 A JP 2000002360A JP 2001196512 A JP2001196512 A JP 2001196512A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- heat
- resin
- semiconductor element
- adhesive layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Wire Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体素子を配線
板上にフリップチップ接続して構成された半導体装置に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device formed by connecting semiconductor elements on a wiring board by flip-chip bonding.
【０００２】[0002]
【従来の技術】半導体素子の高集積化・信号処理の高速
化・高出力化にともなってワイヤーボンドを用いた半導
体装置に代わり、最近では実装密度に優れ、高密度に形
成された電極の接続にも対応できるため、はんだ等のバ
ンプを用い直接半導体素子をプリント配線板に実装する
形態の、フリップチップ実装を有したＢＧＡ型半導体装
置が広く採用されてきている。2. Description of the Related Art Along with higher integration of semiconductor elements and higher speed and higher output of signal processing, instead of a semiconductor device using wire bonds, recently, the connection density of electrodes formed at a high mounting density is excellent. Therefore, a BGA type semiconductor device having flip-chip mounting, in which a semiconductor element is directly mounted on a printed wiring board by using a bump such as solder, has been widely adopted.
【０００３】しかし、フリップチップ実装により半導体
素子からの発熱による温度上昇が問題となっており、そ
の対策として例えば特開平９―８２８８２号公報に記載
されているように、半導体素子の裏面に熱伝導性の高い
ヒートスプレッダやヒートシンク等の放熱部材の一面を
熱伝導性樹脂ペースト材で接着し、その他面がパッケー
ジの外側に露出し放熱するといったパッケージ構造が採
用されている。図３は上記従来のＢＧＡ型半導体装置の
構造を示す構成図であり、図中１はプリント配線板、２
は半導体素子、３はバンプ、４はアンダーフィル樹脂、
５はリング、はリング接着剤、７は放熱部材のヒートス
プレッダ、８は熱伝導性樹脂ペースト材、９は外部接続
用バンプである。なお、上記従来の半導体装置におい
て、ヒートスプレッダ等の放熱部材７としては、銅やア
ルミニウムといった金属製のものが用いられ、熱伝導性
ペースト材８としては、熱伝導性のよいアルミナ、窒化
アルミまたは窒化ホウ素など無機系のフィラーを熱硬化
性のエポキシ樹脂またはシリコーン樹脂等に充填した絶
縁性ペースト材が用いられ、さらに高放熱性が要求され
る場合は銀や銅といった金属製のフィラーを充填したペ
ースト材が用いられている。However, the temperature rise due to the heat generated from the semiconductor element due to the flip chip mounting poses a problem. As a countermeasure, for example, as described in Japanese Patent Application Laid-Open No. 9-82882, heat conduction is applied to the back surface of the semiconductor element. A package structure is adopted in which one surface of a heat dissipating member such as a heat spreader or a heat sink having high performance is bonded with a heat conductive resin paste material, and the other surface is exposed to the outside of the package to dissipate heat. FIG. 3 is a block diagram showing the structure of the above-mentioned conventional BGA type semiconductor device. In FIG.
Is a semiconductor element, 3 is a bump, 4 is an underfill resin,
5 is a ring, is a ring adhesive, 7 is a heat spreader of a heat radiating member, 8 is a heat conductive resin paste material, and 9 is a bump for external connection. In the above-described conventional semiconductor device, the heat dissipating member 7 such as a heat spreader is made of metal such as copper or aluminum, and the heat conductive paste material 8 is alumina, aluminum nitride or nitride having good heat conductivity. An insulating paste material containing an inorganic filler such as boron filled in a thermosetting epoxy resin or silicone resin. If high heat dissipation is required, a paste filled with a metal filler such as silver or copper is used. Wood is used.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、上記熱
伝導性樹脂ペースト材においては、フィラーを高充填に
すると流動性が損なわれ、塗布作業性が制約されるため
に充填量には限度があり、それにより熱伝導性は限ら
れ、例えば、無機系熱伝導性ペースト材の場合は３〜５
Ｗ／ｍ・Ｋが限界であり、金属系熱伝導性ペースト材の
場合では１０Ｗ／ｍ・Ｋ程度である。作業性を損なわず
フィラーを高充填化する手法としては溶剤を併用する方
法があるが接着時に溶剤が残留したり、さらには溶剤の
蒸発によって接着層にボイドが発生し熱伝導性が逆に悪
くなる場合もあり、安定した熱伝導性を得るには課題が
あった。また、金属系熱伝導性ペースト材では体積抵抗
率が１〜５×１０-5Ω・ｃｍ以上であって、放熱部材と
の絶縁が充分ではなく、半導体装置に用いた場合、リー
ク電流が発生するという課題があった。However, in the above-mentioned heat conductive resin paste material, when the filler is filled at a high level, the fluidity is impaired, and the workability of coating is restricted, so that the filling amount is limited. Accordingly, the thermal conductivity is limited. For example, in the case of an inorganic thermal conductive paste material, 3 to 5
W / m · K is the limit, and in the case of a metal-based heat conductive paste material, it is about 10 W / m · K. As a method of increasing the filler filling without impairing the workability, there is a method of using a solvent in combination, but the solvent remains at the time of bonding, and furthermore, the evaporation of the solvent generates voids in the adhesive layer and conversely deteriorates the thermal conductivity In some cases, there was a problem in obtaining stable thermal conductivity. In addition, the metal-based heat conductive paste material has a volume resistivity of 1 to 5 × 10 −5 Ω · cm or more, is not sufficiently insulated from a heat radiating member, and causes leakage current when used in a semiconductor device. There was a problem to do.
【０００５】また、半導体素子の熱膨張率は非常に小さ
いので、熱伝導性ペースト材のような熱膨張率が大きい
接着剤を用いると半導体素子からの発熱による温度変化
に伴う熱応力が大きくなり、接着材面の剥離や半導体素
子の変形・破損を生じるという課題があった。Further, since the coefficient of thermal expansion of a semiconductor element is very small, the use of an adhesive having a large coefficient of thermal expansion such as a heat conductive paste material results in an increase in thermal stress due to a temperature change due to heat generated from the semiconductor element. In addition, there has been a problem that peeling of the adhesive surface and deformation and breakage of the semiconductor element occur.
【０００６】本発明はかかる課題を解消するためになさ
れたもので、放熱特性および絶縁特性（体積抵抗率が１
×１０12Ω・ｃｍ以上程度）に優れた半導体装置を得る
こと、さらに、実装信頼性の高い半導体装置を得ること
を目的とする。The present invention has been made to solve such a problem, and has a heat radiation characteristic and an insulation characteristic (having a volume resistivity of 1%).
It is an object of the present invention to obtain a semiconductor device excellent in (× 10 12 Ω · cm or more) and a semiconductor device having high mounting reliability.
【０００７】[0007]
【課題を解決するための手段】本発明に係る第１の半導
体装置は、配線板に実装した半導体素子と、この半導体
素子に接着層を介して接合した放熱部材とを備えた半導
体装置において、上記接着層が、少なくとも表面が粗面
であるセラミックス板とこの両粗面をならすように設け
た樹脂層とからなるものである。According to a first aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor element mounted on a wiring board; and a heat radiating member joined to the semiconductor element via an adhesive layer. The adhesive layer is composed of a ceramic plate having at least a rough surface and a resin layer provided so as to smooth both rough surfaces.
【０００８】本発明に係る第２の半導体装置は、上記第
１の半導体装置において、セラミックス板が気孔を有す
るセラミックスのものである。A second semiconductor device according to the present invention is the first semiconductor device described above, wherein the ceramic plate has ceramics having pores.
【０００９】本発明に係る第３の半導体装置は、上記第
２の半導体装置において、セラミックスの気孔率が５〜
２０体積％のものである。A third semiconductor device according to the present invention is the above-mentioned second semiconductor device, wherein the porosity of the ceramic is 5 to 5.
It is 20% by volume.
【００１０】本発明に係る第４の半導体装置は、上記第
２または第３の半導体装置において、接着層が気孔を有
するセラッミクス板に熱硬化性樹脂を含浸したものであ
る。A fourth semiconductor device according to the present invention is a semiconductor device according to the second or third semiconductor device, wherein a thermosetting resin is impregnated in a ceramics plate having an adhesive layer having pores.
【００１１】本発明に係る第５の半導体装置は、上記第
４の半導体装置において、気孔を有するセラッミクス板
に樹脂を含浸してなる樹脂含浸セラッミクス板の熱膨張
率の値が半導体素子と放熱部材の熱膨張率の値の間のも
のである。In a fifth semiconductor device according to the present invention, in the fourth semiconductor device, the value of the coefficient of thermal expansion of the resin-impregnated ceramics plate obtained by impregnating the resin into the ceramics plate having pores is such that the semiconductor element and the heat radiation member Is between the values of the coefficient of thermal expansion.
【００１２】本発明に係る第６の半導体装置は、上記第
１ないし第５のいずれかの半導体装置において、半導体
素子または放熱部材の接着層側の面が粗面化処理されて
いるものである。A sixth semiconductor device according to the present invention is the semiconductor device according to any one of the first to fifth semiconductor devices, wherein the surface of the semiconductor element or the heat radiating member on the adhesive layer side is roughened. .
【００１３】[0013]
【発明の実施の形態】実施の形態１．図１は本発明の第
１の実施の形態の半導体装置の構造を説明する説明図で
あり、図において、１はプリント配線板、２は半導体素
子、３はバンプ、４はバンプの接続信頼性の向上のため
に塗布されたアンダーフィル樹脂、５はリング、６はリ
ング接着剤、７は放熱部材であるヒートスプレッダ、９
は外部接続用バンプで半導体装置と外部プリント配線板
とを電気的に接続させるために設けられ、１０は接着層
で、少なくとも表面が粗面であるセラミックス板とこの
両粗面をならすように設けた樹脂層とからなる。つま
り、半導体素子２はバンプ３によりプリント配線板１上
にフリップチップ実装され、バンプ３の接続信頼性の向
上のためにアンダーフィル樹脂４が塗布されている。放
熱部材であるヒートスプレッダ７は、リング５とリング
接着剤６により、プリント配線板１に固着されている。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is an explanatory view for explaining the structure of a semiconductor device according to a first embodiment of the present invention. In the figure, 1 is a printed wiring board, 2 is a semiconductor element, 3 is a bump, and 4 is the connection reliability of the bump. 5 is a ring, 6 is a ring adhesive, 7 is a heat spreader as a heat radiating member, 9 is a ring adhesive.
Is an external connection bump for electrically connecting the semiconductor device to the external printed wiring board, and 10 is an adhesive layer provided so as to smooth out the ceramic plate having at least a rough surface and both rough surfaces. And a resin layer. That is, the semiconductor element 2 is flip-chip mounted on the printed wiring board 1 by the bump 3, and the underfill resin 4 is applied to improve the connection reliability of the bump 3. A heat spreader 7 serving as a heat radiating member is fixed to the printed wiring board 1 by a ring 5 and a ring adhesive 6.
【００１４】特に、本発明においては、接着層１０が、
少なくとも表面が粗面である熱伝導性のセラミックス板
とこの両粗面にこの粗面をならすように設けた樹脂層で
構成され、上記樹脂層により各々半導体素子２の能動層
を設けた面の反対側の面と上記セラミックス板、および
ヒートスプレッダ７と上記セラミックス板を接着するも
のである。また、上記接着層１０は、セラミックス板を
用いているので、ほとんどがセラミックスで構成され、
セラミックスを充填材として用いた従来に比べて、絶縁
性とともに、高熱伝導性が得られ、上記接着層１０を用
いた本発明の実施の形態の半導体装置の放熱性が向上す
る。また、接着層１０を構成する樹脂層は表面が粗面で
あるセラミックス板に設けているので、セラミックス板
に保持されるが、その厚さはセラミックス板の粗面をな
らすことができ、半導体素子２またはヒートスプレッダ
７と接着可能であれば、薄い程接着層１０の放熱性およ
び絶縁性が高いことはいうまでもない。In particular, in the present invention, the adhesive layer 10
It is composed of a thermally conductive ceramic plate having at least a rough surface and a resin layer provided on both rough surfaces so as to smooth the rough surface. The other surface is bonded to the ceramic plate, and the heat spreader 7 is bonded to the ceramic plate. Further, since the adhesive layer 10 uses a ceramic plate, most of the adhesive layer 10 is made of ceramics.
Compared with the conventional case using ceramics as a filler, high thermal conductivity as well as insulation can be obtained, and the heat dissipation of the semiconductor device of the embodiment of the present invention using the adhesive layer 10 is improved. Further, since the resin layer constituting the adhesive layer 10 is provided on the ceramic plate having a rough surface, the resin layer is held by the ceramic plate. Needless to say, as long as the adhesive layer 10 can be bonded to the heat spreader 2 or the heat spreader 7, the thinner the adhesive layer 10, the higher the heat dissipation and insulation.
【００１５】また、セラミックス板の表面が粗面である
ので、その上に設けた樹脂層との接着力を保ち、この樹
脂層により放熱部材とも接着されるが、接着層１０側の
半導体素子または放熱部材表面を物理的または化学的に
粗面化することにより、接着表面積を大きくして、接着
力を向上させることが可能となる。Since the surface of the ceramic plate is rough, the adhesive strength with the resin layer provided thereon is maintained, and the ceramic layer is bonded to the heat radiating member. By physically or chemically roughening the surface of the heat dissipating member, it is possible to increase the bonding surface area and improve the bonding strength.
【００１６】また、上記接着層１０を、気孔を有するセ
ラミックス板に未硬化の熱硬化性樹脂を含浸することに
よりセラミックス板に樹脂層を設けてなる樹脂含浸セラ
ミックス板を得、この放熱部材と半導体素子に熱圧着す
ることにより介在させてもよい。上記熱硬化性樹脂は、
例えばエポキシ系樹脂、ポリイミド系樹脂、ポリアミド
イミド系樹脂、反応型ポリエステル系樹脂、シリコーン
変性エポキシ系樹脂、シリコーン樹脂等を用いれば良
く、中でもシリコーン変性エポキシ系樹脂を用いると熱
応力緩和に優れ、作業性も良好で高接着性といった点で
好適となる。The adhesive layer 10 is impregnated with an uncured thermosetting resin into a ceramic plate having pores to obtain a resin-impregnated ceramic plate having a resin layer provided on the ceramic plate. It may be interposed by thermocompression bonding to the element. The thermosetting resin,
For example, an epoxy resin, a polyimide resin, a polyamideimide resin, a reactive polyester resin, a silicone-modified epoxy resin, or a silicone resin may be used. It has good properties and is suitable in terms of high adhesiveness.
【００１７】上記少なくとも表面が粗面であるセラミッ
クス板としては、セラミックス板の表面を物理的または
化学的に粗面化したものを用いることができるが、気孔
を有するセラミックスであれば必然的に表面が粗面とな
るので好ましい。As the above-mentioned ceramic plate having at least a rough surface, a ceramic plate whose surface is physically or chemically roughened can be used. Is preferable because it becomes a rough surface.
【００１８】気孔を有するセラミックス板は通常のセラ
ミックスの焼成法により得られ、原料として、アルミ
ナ、窒化アルミ、窒化ホウ素（高放熱性を要求する場合
は窒化アルミ、窒化ホウ素等が特に好適）等高熱伝導性
を有するものを用い、上記粒子を焼結するのが一般的な
方法である。なお、上記気孔としては、多孔質のように
連なった開気孔や、外部から遮断された閉気孔がある
が、セラミックス内部の気孔が多すぎると、放熱性が低
下する。上記気孔を有するセラミックスの気孔率が５〜
２０体積％であることが好ましく、５％未満では樹脂の
含浸量が不十分となり、半導体素子２の裏面と金属製の
ヒートスプレッダまたはヒートシンク等の放熱部材との
接着強度が不十分となると同時に接着界面にボイドが発
生する可能性がある。また気孔率が２０％を超えると、
接着強度は十分に得られるがセラミックス板自体の高熱
伝導性が損なわれる。The ceramic plate having pores is obtained by a usual firing method of ceramics. As a raw material, a high heat source such as alumina, aluminum nitride, boron nitride (in the case of requiring high heat dissipation, aluminum nitride, boron nitride, etc. is particularly preferable) It is a general method to sinter the above particles using a conductive material. As the pores, there are open pores connected like a porous body and closed pores blocked from the outside. However, if there are too many pores inside the ceramic, the heat radiation property is reduced. The porosity of the ceramic having the pores is 5 to 5.
Preferably, it is 20% by volume, and if it is less than 5%, the impregnation amount of the resin becomes insufficient, and the bonding strength between the back surface of the semiconductor element 2 and a heat radiating member such as a metal heat spreader or a heat sink becomes insufficient, and at the same time, the bonding interface becomes low. May cause voids. When the porosity exceeds 20%,
Although sufficient adhesive strength can be obtained, the high thermal conductivity of the ceramic plate itself is impaired.
【００１９】なお、本発明の第１の実施の形態の半導体
装置において、プリント配線板１は、例えば複数の絶縁
層が積層され、各層に回路配線としての導体パターンが
形成されてなるものであり、導体パターンの一部はプリ
ント配線板１の半導体素子２面に導出されバンプ３を介
し、半導体素子２と電気的に接続される。また、導体パ
ターンの一部はプリント配線板１の外部接続用バンプ９
面に導出され外部プリント配線板と電気的に接続され
る。上記プリント配線板１としては、例えば厚膜集積回
路基板、多層セラミックス配線基板、セラミックス・プ
ラスチック複合配線基板または多層プリント配線板が用
いられ、例えばＩＶＨやＢＶＨ入り多層プリント配線板
等、半導体素子パッケージや混成集積回路基板等に用い
られているものである。中でもプリント配線板１として
ＩＶＨやＢＶＨ入り多層プリント配線板を用いた場合に
は、以下のような特徴を有することから本発明のＢＧＡ
型半導体装置に特に好適である。つまり、絶縁層とし
て、ガラスクロスまたは有機系不織布で熱硬化性樹脂を
強化しているために、軽くて衝撃にも強く、クラック等
の発生を防止できる。セラミックス配線基板に比べ誘電
率、誘電正接が低く、電気特性に優れた配線板が得られ
る。In the semiconductor device according to the first embodiment of the present invention, the printed wiring board 1 has a structure in which, for example, a plurality of insulating layers are laminated, and a conductor pattern as a circuit wiring is formed on each layer. A part of the conductor pattern is led out to the surface of the semiconductor element 2 of the printed wiring board 1 and is electrically connected to the semiconductor element 2 via the bump 3. A part of the conductor pattern is formed on the external connection bump 9 of the printed wiring board 1.
And is electrically connected to an external printed wiring board. As the printed wiring board 1, for example, a thick film integrated circuit board, a multilayer ceramic wiring board, a ceramic / plastic composite wiring board or a multilayer printed wiring board is used. For example, a semiconductor element package such as a multilayer printed wiring board containing IVH or BVH is used. It is used for a hybrid integrated circuit board or the like. Above all, when a multilayer printed wiring board containing IVH or BVH is used as the printed wiring board 1, the BGA of the present invention has the following features.
It is particularly suitable for a type semiconductor device. That is, since the thermosetting resin is reinforced with glass cloth or an organic nonwoven fabric as the insulating layer, it is light and resistant to impact, and can prevent the occurrence of cracks and the like. A wiring board having a lower dielectric constant and a lower dielectric loss tangent than a ceramic wiring board and having excellent electrical characteristics can be obtained.
【００２０】配線としては、銅のフルアディティブ法、
セミアディティブ法など微細配線工法が可能となり、高
密度化に最適である。また、絶縁層間の配線接続には炭
酸ガスレーザ、ＹＡＧレーザまたはエキシマーレーザ等
での小径ビア接続が可能であり、高密度化に適してい
る。As the wiring, a copper full additive method,
Fine wiring method such as semi-additive method becomes possible, and it is most suitable for high density. In addition, a small diameter via connection using a carbon dioxide laser, a YAG laser, an excimer laser, or the like is possible for the wiring connection between the insulating layers, which is suitable for high density.
【００２１】半導体素子２は、シリコン基板に形成され
たＩＣ・ＬＳＩ等の集積回路等であり、その表面に形成
された電極パッドとプリント配線板１上の電極パッドと
をはんだバンプ等のバンプ３で接続することにより、プ
リント配線板１上に半導体素子２がフリップチップ実装
される。このようなフリップチップ実装としては種々の
方法を取ることができ、例えば金バンプの圧接法、低融
点はんだバンプ接合法等によることができる。これらの
場合は、バンプ３の接続信頼性向上のためにフリップチ
ップ実装後、アンダーフィル樹脂４をプリント配線板１
と半導体素子２の間にディスペンス等の方式で注入充填
する。一方、アンダーフィル樹脂を用いない場合は異方
性導電フィルム、異方性導電ペースト等による接合法を
取ることができる。The semiconductor element 2 is an integrated circuit such as an IC or LSI formed on a silicon substrate, and the electrode pads formed on its surface and the electrode pads on the printed wiring board 1 are connected to bumps 3 such as solder bumps. As a result, the semiconductor element 2 is flip-chip mounted on the printed wiring board 1. Various methods can be used for such flip-chip mounting, for example, a gold bump pressing method, a low melting point solder bump bonding method, or the like. In these cases, the underfill resin 4 is applied to the printed wiring board 1 after flip-chip mounting to improve the connection reliability of the bumps 3.
And filling between the semiconductor element 2 by a method such as dispensing. On the other hand, when an underfill resin is not used, a joining method using an anisotropic conductive film, an anisotropic conductive paste, or the like can be employed.
【００２２】また、プリント配線板１にヒートスプレッ
ダ７を固着させるために用いるリング５は、銅、アルミ
等の金属からできており、リング接着剤６で、プリント
配線板１とヒートスプレッダ等の放熱部材７に接着され
る。リング接着剤６は低応力性を示す樹脂系が好適に用
いられ、テープ状、ペースト状のものが用いられてい
る。また、放熱部材であるヒートスプレッダ７の形状は
図１に示した板状のものに限らず、リング５と一体にな
った形状のものや、絞り加工を施したものを採用しても
良く、このような加工を施すには、例えば押し出し成
型、プレス成型、切削加工等の方法によればよい。The ring 5 used to fix the heat spreader 7 to the printed wiring board 1 is made of a metal such as copper or aluminum. Adhered to. The ring adhesive 6 is preferably made of a resin exhibiting low stress, and is in the form of a tape or a paste. Further, the shape of the heat spreader 7 serving as the heat radiating member is not limited to the plate-like shape shown in FIG. 1, but may be a shape integrated with the ring 5 or a shape subjected to drawing. In order to perform such processing, for example, a method such as extrusion molding, press molding, and cutting may be used.
【００２３】また、図２は本発明の実施の形態の半導体
装置において、他の放熱部材を用いた半導体装置の構造
を説明する説明図であり、図において、１１は放熱部材
であるヒートシンクで、図１に示すように、ヒートスプ
レッダを介さずヒートシンク１１を直接、上記高熱伝導
性セラミックス板に樹脂層で接着したものでもよい。こ
の構造により、半導体素子２からの放熱が高熱伝導性の
セラミックス板と樹脂層とからなる接着層１０を介して
直接ヒートシンク１１に伝わるために放熱性をより一層
増大させることができるものとなる。FIG. 2 is an explanatory view for explaining the structure of a semiconductor device using another heat dissipating member in the semiconductor device according to the embodiment of the present invention. In FIG. 2, reference numeral 11 denotes a heat sink which is a heat dissipating member. As shown in FIG. 1, a heat sink 11 may be directly bonded to the above-mentioned high thermal conductive ceramics plate with a resin layer without using a heat spreader. With this structure, the heat radiation from the semiconductor element 2 is directly transmitted to the heat sink 11 via the adhesive layer 10 composed of a ceramic plate and a resin layer having high thermal conductivity, so that the heat radiation can be further increased.
【００２４】[0024]
【実施例】実施例１．次に、本発明の半導体装置につい
て具体例を説明する。通常の方法により、窒化アルミ原
料を焼成して気孔率１５体積％、厚み１５０μmの高熱
伝導性セラミックス板を作成した。含浸樹脂としては、
両末端にエポキシ基を有するシリコーン樹脂と、通常の
ビスフェノールＡ型エポキシ樹脂、多官能エポキシ樹脂
を重量比で２：１：１で配合し、ケトン系溶剤で希釈し
８０％溶液を作製した。触媒はアミン系触媒を用いた。
その後、含浸樹脂を真空下でセラミックス板に含浸後、
１００℃で１０分の乾燥し樹脂含浸セラミックス板を得
た。このセラミックス板を用い１７０℃のオーブンで９
０分間熱処理を行い含浸樹脂を完全硬化させた。この完
全に含浸樹脂を硬化させた状態での樹脂含浸セラミック
ス板について、レーザフラッシュ法により熱伝導率を、
熱分析法により熱膨張率を、さらにＪＩＳＫ―６９１１
により体積抵抗率を測定した。その結果、それぞれにつ
いて次のような測定値を得た。 熱伝導率：７６Ｗ／ｍ・Ｋ 熱膨張率：８．２×１０-6／Ｋ 体積抵抗率：４．８×１０16Ω・ｃｍ[Embodiment 1] Next, a specific example of the semiconductor device of the present invention will be described. The aluminum nitride raw material was fired by a usual method to prepare a high thermal conductive ceramic plate having a porosity of 15% by volume and a thickness of 150 μm. As impregnating resin,
A silicone resin having epoxy groups at both ends, a normal bisphenol A-type epoxy resin, and a polyfunctional epoxy resin were mixed at a weight ratio of 2: 1: 1, and diluted with a ketone solvent to prepare an 80% solution. The catalyst used was an amine-based catalyst.
After impregnating the ceramic plate with impregnated resin under vacuum,
After drying at 100 ° C. for 10 minutes, a resin-impregnated ceramic plate was obtained. Using this ceramic plate in an oven at 170 ° C, 9
Heat treatment was performed for 0 minutes to completely cure the impregnated resin. For the resin impregnated ceramic plate in a state where the impregnated resin is completely cured, the thermal conductivity is determined by a laser flash method.
The coefficient of thermal expansion was determined by the thermal analysis method, and
Was used to measure the volume resistivity. As a result, the following measured values were obtained for each. Thermal conductivity: 76 W / m · K Thermal expansion coefficient: 8.2 × 10 −6 / K Volume resistivity: 4.8 × 10 16 Ω · cm
【００２５】これらの結果より、本発明の半導体装置に
係わる上記樹脂含浸セラミックス板は、絶縁性を保持し
たまま熱伝導性が非常に高く、熱膨張率も半導体素子
（熱膨張率：３×１０-6／Ｋ）とヒートスプレッダやヒ
ートシンク等の放熱部材（熱膨張率：１６×１０-6／
Ｋ）との間であることから、シリコン等からなる半導体
素子と放熱部材を接着させる部材として優れた特性を有
していることが分かる。From these results, it can be seen that the resin impregnated ceramic plate according to the semiconductor device of the present invention has a very high thermal conductivity while maintaining the insulating property, and has a thermal expansion coefficient of the semiconductor element (thermal expansion coefficient: 3 × 10 3). -6 / K) and heat dissipating members such as heat spreaders and heat sinks (thermal expansion coefficient: 16 × 10 -6 /
K), it can be seen that it has excellent characteristics as a member for bonding a semiconductor element made of silicon or the like and a heat radiating member.
【００２６】次いで、プリント配線板上にフリップチッ
プ実装したシリコンからなる１５ｍｍの半導体素子と厚
さ１００μmのヒートスプレッダとを上記本発明に係わ
る樹脂含浸セラミックス板で接着させ、熱抵抗の測定に
より放熱特性を、−４５℃〜＋１２５℃での１０００サ
イクル熱衝撃試験により耐ヒートショック性を評価した
結果、放熱特性には問題なく、かつ半導体素子とヒート
スプレッダの界面での剥離もなく優れた評価結果とな
り、本発明の実施例の半導体装置は、優れた放熱特性を
維持したまま、高い実装信頼性が得られることが判明し
た。Next, a 15-mm semiconductor element made of silicon and a 100-μm-thick heat spreader, which are flip-chip mounted on a printed wiring board, are adhered to each other with the resin-impregnated ceramic plate according to the present invention. The heat shock resistance was evaluated by a 1000-cycle thermal shock test at -45 ° C to + 125 ° C. As a result, there was no problem with the heat radiation characteristics, and there was no peeling at the interface between the semiconductor element and the heat spreader. It has been found that the semiconductor device according to the embodiment of the invention can achieve high mounting reliability while maintaining excellent heat radiation characteristics.
【００２７】以上述べたように本発明の実施例の半導体
装置における上記接着層は、半導体素子からの放熱特性
が格段に優れると同時に、半導体素子とヒートスプレッ
ダまたはヒートシンク等の放熱部材を電気的に絶縁する
と同時に、熱膨張率が半導体素子と放熱部材との間にあ
ることから両者間で発生する熱応力の低減が可能とな
り、実装信頼性の高い半導体装置を得ることができる。As described above, the adhesive layer in the semiconductor device according to the embodiment of the present invention has excellent heat radiation characteristics from the semiconductor element, and at the same time, electrically insulates the semiconductor element from the heat radiation member such as a heat spreader or a heat sink. At the same time, since the coefficient of thermal expansion is between the semiconductor element and the heat dissipating member, the thermal stress generated between the two can be reduced, and a semiconductor device with high mounting reliability can be obtained.
【００２８】[0028]
【発明の効果】本発明の第１の半導体装置は、配線板に
実装した半導体素子とこの半導体素子に接着層を介して
接合した放熱部材とを備えた半導体装置において、上記
接着層が、少なくとも表面が粗面であるセラミックス板
とこの両粗面をならすように設けた樹脂層とからなるも
ので、放熱特性および絶縁特性が優れるという効果があ
る。According to a first aspect of the present invention, there is provided a semiconductor device including a semiconductor element mounted on a wiring board and a heat radiating member joined to the semiconductor element via an adhesive layer, wherein the adhesive layer has at least It is composed of a ceramic plate having a rough surface and a resin layer provided so as to smooth the two rough surfaces, and has an effect of having excellent heat radiation characteristics and insulation characteristics.
【００２９】本発明の第２の半導体装置は、上記第１の
半導体装置において、セラミックス板が気孔を有するセ
ラミックスのもので、放熱特性および絶縁特性が優れる
という効果がある。According to the second semiconductor device of the present invention, in the first semiconductor device, the ceramic plate is made of a ceramic having pores, and has an effect of being excellent in heat radiation characteristics and insulation characteristics.
【００３０】本発明の第３の半導体装置は、上記第２の
半導体装置において、セラミックスの気孔率が５〜２０
体積％のもので、放熱特性に優れ、実装信頼性が高いと
いう効果がある。According to a third semiconductor device of the present invention, in the second semiconductor device, the porosity of the ceramic is 5 to 20.
By volume%, it has excellent heat radiation characteristics and high mounting reliability.
【００３１】本発明の第４の半導体装置は、上記第２ま
たは第３の半導体装置において、接着層が気孔を有する
セラッミクス板に熱硬化性樹脂を含浸したもので、放熱
特性に優れ、実装信頼性が高いという効果がある。A fourth semiconductor device according to the present invention is the semiconductor device according to the second or third semiconductor device, wherein the thermosetting resin is impregnated in a ceramics plate having an adhesive layer having pores, and has excellent heat radiation characteristics and high mounting reliability. There is an effect that the property is high.
【００３２】本発明の第５の半導体装置は、上記第４の
半導体装置において、気孔を有するセラッミクス板に樹
脂を含浸してなる樹脂含浸セラッミクス板の熱膨張率の
値が半導体素子と放熱部材の熱膨張率の値の間のもの
で、実装信頼性が高いという効果がある。According to a fifth aspect of the present invention, in the above-mentioned fourth semiconductor device, the value of the coefficient of thermal expansion of the resin-impregnated ceramics plate obtained by impregnating the resin into the ceramics plate having pores is equal to that of the semiconductor element and the heat radiation member. It is between the values of the coefficient of thermal expansion and has the effect of high mounting reliability.
【００３３】本発明の第６の半導体装置は、上記第１な
いし第５のいずれかの半導体装置において、半導体素子
または放熱部材の接着層側の面が粗面化処理されている
もので、実装信頼性が高いという効果がある。According to a sixth aspect of the present invention, there is provided a semiconductor device according to any one of the first to fifth aspects, wherein the surface of the semiconductor element or the heat radiating member on the side of the adhesive layer is roughened. The effect is that the reliability is high.
【図１】 本発明の第１の実施の形態の半導体装置の構
造を説明する説明図である。FIG. 1 is an explanatory diagram illustrating a structure of a semiconductor device according to a first embodiment of the present invention.
【図２】 本発明の第１の実施の形態の半導体装置の別
の放熱部材を用いた半導体装置の構造を説明する説明図
である。FIG. 2 is an explanatory diagram illustrating a structure of a semiconductor device using another heat radiation member of the semiconductor device according to the first embodiment of the present invention.
【図３】 従来の半導体装置の構成を示す構成図であ
る。FIG. 3 is a configuration diagram illustrating a configuration of a conventional semiconductor device.
１ プリント配線板、２ 半導体素子、３ バンプ、７
ヒートスプレッダ（放熱部材）、１０ 接着層、１１
ヒートシンク（放熱部材）。1 printed wiring board, 2 semiconductor element, 3 bump, 7
Heat spreader (heat dissipating member), 10 adhesive layer, 11
Heat sink (heat dissipation member).
───────────────────────────────────────────────────── フロントページの続き (72)発明者 藤岡 弘文 東京都千代田区丸の内二丁目２番３号 三 菱電機株式会社内 Ｆターム(参考） 5F036 AA01 BB03 BB05 BC05 BE09 5F044 RR10 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hirofumi Fujioka 2-3-2 Marunouchi, Chiyoda-ku, Tokyo F-term (reference) 5F036 AA01 BB03 BB05 BC05 BE09 5F044 RR10
Claims (6)
導体素子に接着層を介して接合した放熱部材とを備えた
半導体装置において、上記接着層が、少なくとも表面が
粗面であるセラミックス板とこの両粗面をならすように
設けた樹脂層とからなることを特徴とする半導体装置。1. A semiconductor device comprising a semiconductor element mounted on a wiring board and a heat radiating member joined to the semiconductor element via an adhesive layer, wherein the adhesive layer is formed of a ceramic plate having at least a rough surface. A semiconductor device comprising: a resin layer provided so as to smooth both of these rough surfaces.
クスであることを特徴とする請求項１に記載の半導体装
置。2. The semiconductor device according to claim 1, wherein the ceramic plate is a ceramic having pores.
であることを特徴とする請求項２に記載の半導体装置。3. The porosity of the ceramic is 5 to 20% by volume.
The semiconductor device according to claim 2, wherein
熱硬化性樹脂を含浸したものであることを特徴とする請
求項２または請求項３に記載の半導体装置。4. The semiconductor device according to claim 2, wherein the adhesive layer is formed by impregnating a ceramics plate having pores with a thermosetting resin.
浸してなる樹脂含浸セラッミクス板の熱膨張率の値が半
導体素子と放熱部材の熱膨張率の値の間であることを特
徴とする請求項４に記載の半導体装置。5. A resin-impregnated ceramics plate obtained by impregnating a resin into a ceramics plate having pores, wherein the value of the coefficient of thermal expansion is between the values of the coefficients of thermal expansion of the semiconductor element and the heat radiating member. 5. The semiconductor device according to 4.
面が粗面化処理されていることを特徴とする請求項１な
いし請求項５のいずれかに記載の半導体装置。6. The semiconductor device according to claim 1, wherein a surface of the semiconductor element or the heat radiation member on the adhesive layer side is subjected to a roughening treatment.
Priority Applications (1)
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|---|---|---|---|
| JP2000002360A JP2001196512A (en) | 2000-01-11 | 2000-01-11 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000002360A JP2001196512A (en) | 2000-01-11 | 2000-01-11 | Semiconductor device |
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| Publication Number | Publication Date |
|---|---|
| JP2001196512A true JP2001196512A (en) | 2001-07-19 |
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ID=18531476
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| KR100762195B1 (en) | 2005-09-09 | 2007-10-02 | 니뽄 가이시 가부시키가이샤 | Heat spreader module and method of manufacturing same |
| JP2012119675A (en) * | 2010-11-11 | 2012-06-21 | Kitagawa Ind Co Ltd | Electronic circuit and heat sink |
| US8598701B2 (en) | 2009-12-14 | 2013-12-03 | Panasonic Corporation | Semiconductor device |
| WO2015022956A1 (en) * | 2013-08-14 | 2015-02-19 | 電気化学工業株式会社 | Boron nitride/resin composite circuit board, and circuit board including boron nitride/resin composite integrated with heat radiation plate |
| JP5996435B2 (en) * | 2010-11-22 | 2016-09-21 | 株式会社東芝 | Semiconductor module and method for manufacturing semiconductor module |
| JP2017135150A (en) * | 2016-01-25 | 2017-08-03 | 日東シンコー株式会社 | Heat dissipation member and semiconductor module |
| JPWO2017155110A1 (en) * | 2016-03-10 | 2019-04-04 | デンカ株式会社 | Ceramic resin composite |
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