JP2001126867A - Method of manufacturing display - Google Patents
Method of manufacturing displayInfo
- Publication number
- JP2001126867A JP2001126867A JP30403299A JP30403299A JP2001126867A JP 2001126867 A JP2001126867 A JP 2001126867A JP 30403299 A JP30403299 A JP 30403299A JP 30403299 A JP30403299 A JP 30403299A JP 2001126867 A JP2001126867 A JP 2001126867A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- anode
- etching
- liquid phase
- display device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 238000000034 method Methods 0.000 claims abstract description 42
- 239000007791 liquid phase Substances 0.000 claims abstract description 13
- 238000000059 patterning Methods 0.000 claims description 7
- 238000005530 etching Methods 0.000 abstract description 27
- 238000005401 electroluminescence Methods 0.000 abstract description 9
- 238000004020 luminiscence type Methods 0.000 abstract 2
- 239000003086 colorant Substances 0.000 abstract 1
- 239000010408 film Substances 0.000 description 78
- 238000004528 spin coating Methods 0.000 description 7
- 239000010409 thin film Substances 0.000 description 5
- 230000003071 parasitic effect Effects 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229920001709 polysilazane Polymers 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Electroluminescent Light Sources (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、インクジェットプ
ロセスにより発光層が形成される、有機エレクトロルミ
ネッセンス表示装置の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an organic electroluminescent display device in which a light emitting layer is formed by an ink jet process.
【０００２】[0002]
【背景技術】近年、有機エレクトロルミネッセンス表示
装置は、将来的に究極の薄型、軽量、小型、低消費電力
などを実現するディスプレイとして、注目されている。
この有機エレクトロルミネッセンス表示装置は、今後広
汎かつ多数用いられるようになると期待されている。特
に、低温多結晶シリコン薄膜トランジスタと組み合わせ
ることにより、さらなる薄型化、軽量化、小型化が実現
できる。低温多結晶シリコン薄膜トランジスタ駆動有機
エレクトロルミネッセンス表示装置は、理想的な表示装
置のひとつと成り得る（T. Shimoda, M. Kimura, et a
l., Proc. AsiaDisplay 98, 217(1998), M. Kimura, et
al., IEEE Trans. Elec. Dev., to bepublished）。2. Description of the Related Art In recent years, an organic electroluminescent display device has been attracting attention as a display realizing the ultimate thin, light, small, and low power consumption in the future.
This organic electroluminescence display device is expected to be widely used in a large number in the future. In particular, further reduction in thickness, weight, and size can be realized by combining with a low-temperature polycrystalline silicon thin film transistor. Low-temperature polycrystalline silicon thin film transistor driven organic electroluminescent displays can be one of the ideal displays (T. Shimoda, M. Kimura, et a.
l., Proc. AsiaDisplay 98, 217 (1998), M. Kimura, et.
al., IEEE Trans. Elec. Dev., to bepublished).
【０００３】有機エレクトロルミネッセンス素子の製造
方法としては、真空プロセスと、液相プロセスがある。
一般に、低分子系の有機エレクトロルミネッセンス素子
には、蒸着法、スパッタ法等の、真空プロセスが用いら
れる。一方、高分子系の有機エレクトロルミネッセンス
素子には、スピンコート法、スキージ塗布法、インクジ
ェットプロセス等の、液相プロセスが用いられる。特に
インクジェットプロセスは、成膜とパターニングを同時
に行うことが可能な、有望なプロセスである。As a method for manufacturing an organic electroluminescence device, there are a vacuum process and a liquid phase process.
In general, a vacuum process such as a vapor deposition method and a sputtering method is used for a low-molecular organic electroluminescence element. On the other hand, a liquid phase process such as a spin coating method, a squeegee coating method, and an ink jet process is used for a polymer-based organic electroluminescence device. In particular, the ink jet process is a promising process that can perform film formation and patterning at the same time.
【０００４】有機エレクトロルミネッセンス素子をイン
クジェットプロセスにより形成する場合は、各画素間
に、素子分離構造を設けておくことが、望ましい。素子
分離構造とは、各画素間に設けられ、各画素の有機エレ
クトロルミネッセンス素子を、分離する構造である。When an organic electroluminescence element is formed by an ink-jet process, it is desirable to provide an element isolation structure between each pixel. The element isolation structure is a structure provided between each pixel to separate the organic electroluminescence element of each pixel.
【０００５】素子分離構造として、第１の絶縁膜および
第２の絶縁膜を備えた構造が、考えられている（T. Shi
moda, M. Kimura, et al., Proc. Asia Display 98, 21
7(1998), M. Kimura, et al., IEEE Trans. Elec. De
v., to be published）。図２に、第１の絶縁膜および
第２の絶縁膜を備えた有機エレクトロルミネッセンス表
示装置の断面図を、示す。ここでは、有機エレクトロル
ミネッセンス表示装置は、ITOで形成された陽極3上に、
SiO2で形成された第１の絶縁膜1と、ポリイミドにより
形成された第２の絶縁膜2を備えている。第１の絶縁膜1
と第２の絶縁膜2が形成された後に、インクジェットプ
ロセスにより、発光層4が成膜される。陰極5が成膜さ
れ、有機エレクトロルミネッセンス表示装置が完成す
る。As an element isolation structure, a structure having a first insulating film and a second insulating film has been considered (T. Shi.
moda, M. Kimura, et al., Proc. Asia Display 98, 21
7 (1998), M. Kimura, et al., IEEE Trans. Elec. De.
v., to be published). FIG. 2 shows a cross-sectional view of an organic electroluminescence display device including a first insulating film and a second insulating film. Here, the organic electroluminescent display device is provided on the anode 3 formed of ITO,
A first insulating film 1 made of SiO 2 and a second insulating film 2 made of polyimide are provided. First insulating film 1
After the second insulating film 2 is formed, the light emitting layer 4 is formed by an inkjet process. The cathode 5 is formed, and the organic electroluminescent display device is completed.
【０００６】第２の絶縁膜2は、適当な表面処理によ
り、撥液性に制御される。これにより、インクジェット
プロセスにより各画素に塗布される、各色に対応して異
なる材料で形成される発光層4の、混色が抑制される。The second insulating film 2 is controlled to have liquid repellency by an appropriate surface treatment. This suppresses color mixture of the light emitting layer 4 formed of a different material corresponding to each color, which is applied to each pixel by the inkjet process.
【０００７】しかしながら、前述のように、第２の絶縁
膜2は撥液性に制御されるため、第２の絶縁膜2の周辺で
は、有機エレクトロルミネッセンス表示素子を均一に成
膜することは、困難である。すなわち、第２の絶縁膜の
エッジの周辺には、発光層がより薄い領域6が、発生し
てしまう。この部分に、陽極3および陰極5が存在する
と、短絡が発生し、リーク電流が著しく増加してしま
う。そこで、第２の絶縁膜2のエッジの周辺では、短絡
が発光しないように、第１の絶縁膜1が設けられてい
る。However, as described above, since the second insulating film 2 is controlled to be lyophobic, it is difficult to uniformly form an organic electroluminescent display element around the second insulating film 2. Have difficulty. That is, a region 6 where the light emitting layer is thinner is generated around the edge of the second insulating film. If the anode 3 and the cathode 5 exist in this portion, a short circuit occurs, and the leakage current increases significantly. Therefore, the first insulating film 1 is provided around the edge of the second insulating film 2 so that a short circuit does not emit light.
【０００８】さらに、第１の絶縁膜および第２の絶縁膜
により、バス配線の寄生容量が、低減されている（T. S
himoda, M. Kimura, et al., Proc. Asia Display 98,
217(1998), M. Kimura, et al., IEEE Trans. Elec. De
v., to be published）。すなわち、バス配線から陰極
を遠ざけることで、バス配線の寄生容量が、低減されて
いる。また、バス配線の寄生容量を低減するために、か
なり厚い薄膜が使用されることが望ましい。Further, the parasitic capacitance of the bus wiring is reduced by the first insulating film and the second insulating film (T.S.
himoda, M. Kimura, et al., Proc. Asia Display 98,
217 (1998), M. Kimura, et al., IEEE Trans. Elec. De.
v., to be published). That is, the parasitic capacitance of the bus line is reduced by moving the cathode away from the bus line. Also, it is desirable to use a rather thick thin film in order to reduce the parasitic capacitance of the bus wiring.
【０００９】[0009]
【発明が解決しようとする課題】バス配線の寄生容量を
低減するために、第１の絶縁膜1および第２の絶縁膜2に
は、かなり厚い薄膜が使用される。例えば、第１の絶縁
膜1は0.5μm、第２の絶縁膜2は2.0μmほどである。図３
は、従来の第１の絶縁膜および第２の絶縁膜の製造方法
を示す図である。ここでは、陽極3はITOで形成され、第
１の絶縁膜1はTEOSのPECVD法によりSiO2で形成され、第
２の絶縁膜2はポリイミドのスピンコート法により形成
されている。In order to reduce the parasitic capacitance of the bus wiring, a considerably thick thin film is used for the first insulating film 1 and the second insulating film 2. For example, the thickness of the first insulating film 1 is about 0.5 μm, and the thickness of the second insulating film 2 is about 2.0 μm. FIG.
FIG. 2 is a diagram showing a conventional method for manufacturing a first insulating film and a second insulating film. Here, the anode 3 is formed of ITO, the first insulating film 1 is formed of SiO 2 by TEOS PECVD, and the second insulating film 2 is formed of polyimide by spin coating.
【００１０】本従来例では、ITOで形成された陽極3上
に、第１の絶縁膜1が成膜され（図３(a)）、そのあと、
陽極3上の発光させたい部分に開口部がくるようにパタ
ーニングされる（図３(b)）。次に、液相プロセスによ
り、第２の絶縁膜2が成膜され（図３(c)）、そのあと、
陽極3上の発光させたい部分に開口部がくるようにパタ
ーニングされる（図３(d)）。In this conventional example, a first insulating film 1 is formed on an anode 3 formed of ITO (FIG. 3A).
Patterning is performed so that an opening comes to a portion on the anode 3 where light emission is desired (FIG. 3B). Next, a second insulating film 2 is formed by a liquid phase process (FIG. 3C).
Patterning is performed so that an opening comes to a portion on the anode 3 where light emission is desired (FIG. 3D).
【００１１】図３を見ればわかるように、第２の絶縁膜
2は、液相プロセスにより形成されるが故に、第１の絶
縁膜1の開口部で、他の部分より厚くなっている。前述
のように第１の絶縁膜1には、かなり厚い薄膜が使用さ
れているので、第２の絶縁膜2の、第１の絶縁膜1の開口
部での厚さは、他の部分より大幅に厚くなっている。第
２の絶縁膜2をエッチングする際に、薄い部分に合わせ
てエッチング時間を設定すれば、厚い部分でエッチング
残さが発生する恐れがある。7は、こうして発生した、
開口部のエッチング残さである。また、厚い部分に合わ
せてエッチング時間を設定すれば、薄い部分で大きなサ
イドエッチが発生する恐れがある。As can be seen from FIG. 3, the second insulating film
Reference numeral 2 denotes an opening of the first insulating film 1 which is thicker than other portions because it is formed by a liquid phase process. As described above, since a considerably thick thin film is used for the first insulating film 1, the thickness of the second insulating film 2 at the opening of the first insulating film 1 is larger than that of the other portions. It is much thicker. If the etching time is set in accordance with the thin portion when etching the second insulating film 2, there is a possibility that an unetched portion may occur in the thick portion. 7 occurred this way,
This is the etching residue of the opening. Also, if the etching time is set in accordance with the thick portion, a large side etch may occur in the thin portion.
【００１２】また、第１の絶縁膜1は、真空プロセスに
より形成されているため、第１の絶縁膜1の表面を平坦
でない。すなわち、陽極3の有無により、表面に起伏が
存在している。そして、この表面の起伏に対応して、第
２の絶縁膜2の膜厚不均一性が存在し、この膜厚不均一
性に起因して、第２の絶縁膜2のエッチング残さが発生
する恐れがある。8は、こうして発生した、表面起伏部
のエッチング残さである。また、この表面起伏部のエッ
チング残さ8を完全に除去しようと思うと、他の場所
で、大きなサイドエッチが発生する恐れがある。Further, since the first insulating film 1 is formed by a vacuum process, the surface of the first insulating film 1 is not flat. That is, depending on the presence or absence of the anode 3, undulations exist on the surface. The unevenness of the surface of the second insulating film 2 corresponds to the unevenness of the surface, and due to the unevenness of the thickness, the etching residue of the second insulating film 2 is generated. There is fear. Numeral 8 is the etching residue of the surface undulations thus generated. In addition, if it is intended to completely remove the etching residue 8 in the surface undulations, a large side etch may occur in other places.
【００１３】そこで、本発明の目的は、インクジェット
プロセスにより発光層が形成される有機エレクトロルミ
ネッセンス表示装置において、第２の絶縁膜2のエッチ
ング残さやサイドエッチの発生を、抑制することを目的
とする。Therefore, an object of the present invention is to suppress the occurrence of etching residue and side etching of the second insulating film 2 in an organic electroluminescence display device in which a light emitting layer is formed by an ink jet process. .
【００１４】[0014]
【課題を解決するための手段】（１）請求項１記載の本
発明は、インクジェットプロセスにより発光層が形成さ
れる表示装置の製造方法であって、陽極上に、第１の絶
縁膜を成膜し、そのあと、液相プロセスにより第２の絶
縁膜を成膜し、そのあと、第２の絶縁膜を陽極上の発光
させたい部分に開口部がくるようにパターニングし、そ
のあと、第１の絶縁膜を陽極上の発光させたい部分に開
口部がくるようにパターニングし、そのあと、インクジ
ェットプロセスにより発光層を形成することを特徴とす
る表示装置の製造方法である。According to a first aspect of the present invention, there is provided a method of manufacturing a display device in which a light emitting layer is formed by an ink-jet process, wherein a first insulating film is formed on an anode. After that, a second insulating film is formed by a liquid phase process, and then the second insulating film is patterned so as to have an opening at a portion on the anode where light emission is desired. A method for manufacturing a display device, comprising: patterning an insulating film of the first electrode so that an opening is formed at a portion where light emission is desired on an anode; and thereafter, forming a light emitting layer by an inkjet process.
【００１５】本構成によれば、第１の絶縁膜1の開口部
における第２の絶縁膜2のエッチング残さや、これを除
去するときに他の場所で発生するサイドエッチを、抑制
することが、可能となる。According to this configuration, it is possible to suppress the etching residue of the second insulating film 2 in the opening of the first insulating film 1 and the side etch that occurs at other places when the second insulating film 2 is removed. , Becomes possible.
【００１６】（２）請求項２記載の本発明は、請求項１
記載の表示装置の製造方法において、第１の絶縁膜も、
液相プロセスにより形成されることを特徴とする表示装
置の製造方法である。(2) The present invention described in claim 2 is the first invention.
In the method for manufacturing a display device according to the aspect, the first insulating film also includes:
A method for manufacturing a display device, which is formed by a liquid phase process.
【００１７】本構成によれば、陽極の膜厚等により発生
する第１の絶縁膜1の表面起伏部における第２の絶縁膜2
のエッチング残さや、これを除去するときに他の場所で
発生するサイドエッチを、抑制することが、可能とな
る。According to this structure, the second insulating film 2 at the uneven portion of the surface of the first insulating film 1 generated by the thickness of the anode and the like.
It is possible to suppress the etching residue and side etching generated at other places when removing the etching residue.
【００１８】[0018]
【発明の実施の形態】以下、本発明の好ましい実施例を
説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described.
【００１９】図１は、本発明の第１の絶縁膜および第２
の絶縁膜の製造方法を示す図である。ここでは、陽極は
ITOで形成され、第１の絶縁膜1はポリシラザンのスピン
コート法によりSiO2で形成され、第２の絶縁膜2はポリ
イミドのスピンコート法により形成されている。FIG. 1 shows a first insulating film and a second insulating film according to the present invention.
FIG. 6 is a view showing a method of manufacturing the insulating film of FIG. Here, the anode is
The first insulating film 1 is formed of SiO 2 by spin coating of polysilazane, and the second insulating film 2 is formed of spin coating of polyimide.
【００２０】本実施形態では、請求項１に記載されてい
るように、陽極3上に、第１の絶縁膜1を成膜し（図１
(a)）、そのあと、液相プロセスであるスピンコート法
により第２の絶縁膜2を成膜し（図１(b)）、そのあと、
第２の絶縁膜2を陽極3上の発光させたい部分に開口部が
くるようにパターニングし（図１(c)）、そのあと、第
１の絶縁膜1を陽極3上の発光させたい部分に開口部がく
るようにパターニングする（図１(d)）。本構成によれ
ば、第２の絶縁膜2の膜厚を均一化できるので、第２の
絶縁膜2をエッチングする際に、第２の絶縁膜2のエッチ
ング残さやサイドエッチの発生を、抑制することが、可
能となる。In this embodiment, the first insulating film 1 is formed on the anode 3 as described in claim 1 (FIG. 1).
(a)) Then, a second insulating film 2 is formed by a spin coating method which is a liquid phase process (FIG. 1 (b)).
The second insulating film 2 is patterned so as to have an opening at a portion on the anode 3 where light emission is desired (FIG. 1 (c)). Then, the first insulating film 1 is patterned on the anode 3 where light emission is desired. Then, patterning is performed so that an opening is formed (FIG. 1D). According to this configuration, the thickness of the second insulating film 2 can be made uniform, so that when etching the second insulating film 2, the occurrence of etching residue and side etching of the second insulating film 2 is suppressed. It becomes possible.
【００２１】また、本実施形態では、請求項２に記載さ
れているように、第１の絶縁膜1も、液相プロセスであ
るスピンコート法により形成されている。このため、第
１の絶縁膜1の表面を平坦化することが可能になる。そ
して、陽極3の膜厚等により発生する第２の絶縁膜2の膜
厚不均一性を低減し、この膜厚不均一性に起因していた
第２の絶縁膜2のエッチング残さやサイドエッチの発生
を、抑制することが、可能となる。In the present embodiment, as described in claim 2, the first insulating film 1 is also formed by a spin coating method which is a liquid phase process. Therefore, the surface of the first insulating film 1 can be flattened. Then, the film thickness non-uniformity of the second insulating film 2 caused by the film thickness of the anode 3 is reduced, and the etching residue and side etching of the second insulating film 2 caused by the film thickness non-uniformity are reduced. Can be suppressed.
【００２２】[0022]
【発明の効果】以上説明したように、本発明によれば、
絶縁膜を液相プロセスであるスピンコート法により成膜
するので、絶縁膜の膜厚を均一にする事ができる。した
がって、絶縁膜をエッチングする際のエッチング残さや
サイドエッチの発生を抑制することができる。As described above, according to the present invention,
Since the insulating film is formed by a spin coating method which is a liquid phase process, the thickness of the insulating film can be made uniform. Therefore, it is possible to suppress the occurrence of etching residue and side etching when etching the insulating film.
【図１】第１の絶縁膜および第２の絶縁膜を備えた有機
エレクトロルミネッセンス表示装置の断面図。FIG. 1 is a cross-sectional view of an organic electroluminescent display device including a first insulating film and a second insulating film.
【図２】従来の第１の絶縁膜および第２の絶縁膜の製造
方法を示す図。FIG. 2 is a diagram showing a conventional method for manufacturing a first insulating film and a second insulating film.
【図３】本発明の第１の絶縁膜および第２の絶縁膜の製
造方法を示す図。FIG. 3 is a diagram showing a method for manufacturing a first insulating film and a second insulating film of the present invention.
１ 第１の絶縁膜 ２ 第２の絶縁膜 ３ 陽極 ４ 発光層 ５ 陰極 ６ 発光層がより薄い領域 ７ 開口部のエッチング残さ ８ 表面起伏部のエッチング残さ DESCRIPTION OF SYMBOLS 1 1st insulating film 2 2nd insulating film 3 Anode 4 Light emitting layer 5 Cathode 6 Area | region where a light emitting layer is thinner 7 Etching residue of opening 8 Etching residue of surface unevenness
Claims (2)
形成される表示装置の製造方法であって、 陽極上に、第１の絶縁膜を成膜し、そのあと、液相プロ
セスにより第２の絶縁膜を成膜し、そのあと、前記第２
の絶縁膜を前記陽極上の発光させたい部分に開口部がく
るようにパターニングし、そのあと、前記第１の絶縁膜
を前記陽極上の発光させたい部分に開口部がくるように
パターニングし、そのあと、インクジェットプロセスに
より発光層を形成することを特徴とする表示装置の製造
方法。1. A method for manufacturing a display device in which a light emitting layer is formed by an inkjet process, comprising: forming a first insulating film on an anode, and then forming a second insulating film by a liquid phase process. And then the second
Patterning the insulating film so that an opening is provided at a portion on the anode where light emission is desired, and then patterning the first insulating film such that an opening is provided at a portion desired to emit light on the anode; Then, a light emitting layer is formed by an ink jet process.
とを特徴とする表示装置の製造方法。2. The display device according to claim 1, wherein the first insulating film is also formed by a liquid phase process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30403299A JP2001126867A (en) | 1999-10-26 | 1999-10-26 | Method of manufacturing display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30403299A JP2001126867A (en) | 1999-10-26 | 1999-10-26 | Method of manufacturing display |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001126867A true JP2001126867A (en) | 2001-05-11 |
Family
ID=17928248
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30403299A Withdrawn JP2001126867A (en) | 1999-10-26 | 1999-10-26 | Method of manufacturing display |
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| JP (1) | JP2001126867A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2004019659A1 (en) * | 2002-08-21 | 2004-03-04 | Fujitsu Limited | Organic el device and production method therefor |
| KR100421720B1 (en) * | 2001-12-13 | 2004-03-11 | 삼성 엔이씨 모바일 디스플레이 주식회사 | Electro luminescence device and method of manufacturing the same |
| WO2004026003A1 (en) * | 2002-09-12 | 2004-03-25 | Toshiba Matsushita Display Technology Co., Ltd. | Organic el display |
| JP2005530319A (en) * | 2002-06-14 | 2005-10-06 | サムスン エレクトロニクス カンパニー リミテッド | Organic electroluminescence device |
| US8016629B2 (en) | 2005-04-25 | 2011-09-13 | Showa Denko K.K. | Method of producing a display device |
| JP5105877B2 (en) * | 2004-10-13 | 2012-12-26 | シャープ株式会社 | Functional board |
| US8653511B2 (en) | 2010-10-22 | 2014-02-18 | Samsung Display Co., Ltd. | Organic light emitting diode display |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998012689A1 (en) * | 1996-09-19 | 1998-03-26 | Seiko Epson Corporation | Matrix type display device and method of production thereof |
| WO1999010862A1 (en) * | 1997-08-21 | 1999-03-04 | Seiko Epson Corporation | Active matrix display |
| JPH1174073A (en) * | 1997-08-29 | 1999-03-16 | Seiko Epson Corp | Active matrix type display device |
| WO1999048339A1 (en) * | 1998-03-17 | 1999-09-23 | Seiko Epson Corporation | Substrate for patterning thin film and surface treatment thereof |
| JPH11271753A (en) * | 1998-03-18 | 1999-10-08 | Seiko Epson Corp | Thin film forming method, display device, and color filter |
-
1999
- 1999-10-26 JP JP30403299A patent/JP2001126867A/en not_active Withdrawn
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998012689A1 (en) * | 1996-09-19 | 1998-03-26 | Seiko Epson Corporation | Matrix type display device and method of production thereof |
| WO1999010862A1 (en) * | 1997-08-21 | 1999-03-04 | Seiko Epson Corporation | Active matrix display |
| JPH1174073A (en) * | 1997-08-29 | 1999-03-16 | Seiko Epson Corp | Active matrix type display device |
| WO1999048339A1 (en) * | 1998-03-17 | 1999-09-23 | Seiko Epson Corporation | Substrate for patterning thin film and surface treatment thereof |
| JPH11271753A (en) * | 1998-03-18 | 1999-10-08 | Seiko Epson Corp | Thin film forming method, display device, and color filter |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100421720B1 (en) * | 2001-12-13 | 2004-03-11 | 삼성 엔이씨 모바일 디스플레이 주식회사 | Electro luminescence device and method of manufacturing the same |
| JP2005530319A (en) * | 2002-06-14 | 2005-10-06 | サムスン エレクトロニクス カンパニー リミテッド | Organic electroluminescence device |
| US7592635B2 (en) | 2002-06-14 | 2009-09-22 | Samsung Electronics Co., Ltd. | Organic electroluminescent device |
| WO2004019659A1 (en) * | 2002-08-21 | 2004-03-04 | Fujitsu Limited | Organic el device and production method therefor |
| JP2004079397A (en) * | 2002-08-21 | 2004-03-11 | Fujitsu Ltd | Organic el device and its manufacturing method |
| US6977464B2 (en) | 2002-08-21 | 2005-12-20 | Fujitsu Limited | Organic EL device and manufacturing method for the same |
| WO2004026003A1 (en) * | 2002-09-12 | 2004-03-25 | Toshiba Matsushita Display Technology Co., Ltd. | Organic el display |
| JP5105877B2 (en) * | 2004-10-13 | 2012-12-26 | シャープ株式会社 | Functional board |
| US8016629B2 (en) | 2005-04-25 | 2011-09-13 | Showa Denko K.K. | Method of producing a display device |
| US8653511B2 (en) | 2010-10-22 | 2014-02-18 | Samsung Display Co., Ltd. | Organic light emitting diode display |
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