KR20090021443A - Organic electroluminescent device and method for fabricating thereof - Google Patents

Abstract

An organic electroluminescent display device and a manufacturing method thereof are provided to stably form a thin film transistor on a substrate by forming the thin film transistor of coplanar top gate structure. A channel layer(104), a source electrode(107a), and a drain electrode(107b) are formed on a substrate(100). A gate insulated film(106) is formed on the substrate. A gate electrode(109) is formed on the channel layer by a mask process. A first protective film(112) is formed on the substrate. The first protective film and the gate insulated film of a pixel region are removed by the mask process. A part of the drain electrode is exposed. A first electrode(115) and a sacrificial layer are formed on the pixel region by a lift off process. A second protective film(117) and a planarization film(120) are successively formed on the substrate. The sacrificial layer of the pixel region is removed by a lithography process and a developing process. The second protective film of the pixel region is removed by an etching process. An undercut structure is formed on an edge of the pixel region. An auxiliary electrode(122) is formed on the first electrode of the pixel region. An electron transport layer(130a), an organic electroluminescent layer(130b), a hole transport layer(130c), and a second electrode(150) are successively formed on the substrate.

Description

Organic electroluminescent display and manufacturing method thereof

The present invention relates to an organic light emitting display device.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such flat panel displays include a liquid crystal display, a field emission display, a plasma display panel, an electroluminescence display, and the like.

Recently, studies are being actively conducted to increase the display quality of such a flat panel display device and to attempt to make a large screen. Among these, the electroluminescent display device is a self-luminous element that emits light by itself. The electroluminescent display displays a video image by exciting a fluorescent material using carriers such as electrons and holes. The electroluminescent display is largely divided into an inorganic electroluminescent display and an organic electroluminescent display according to the material used. The organic electroluminescent display is driven at a lower voltage of about 5 to 20 volts than the inorganic electroluminescent display requiring a high voltage of 100 to 200 volts, thereby allowing direct current low voltage driving.

In addition, the organic electroluminescent display has excellent features such as wide viewing angle, high speed response, high contrast ratio, and the like, such as pixels of graphic displays, television image displays or surface light sources. It is suitable as a next-generation flat panel display because it can be used as a thin, light and good color.

Recently, active matrix type organic light emitting display devices have been researched and developed to compensate for the disadvantage of a passive matrix type which does not include a separate thin film transistor.

However, the conventional active matrix organic light emitting display device has a disadvantage in that the manufacturing process is complicated. In addition, since the manufacturing process is complicated, the manufacturing yield is low, and the thin film transistor is difficult to be stably formed on the substrate.

SUMMARY OF THE INVENTION An object of the present invention is to provide an organic light emitting display device and a method of manufacturing the same, which simplify the manufacturing process by changing the structure of the thin film transistor and improve the performance of the thin film transistor.

In order to achieve the above object, the organic light emitting display device manufacturing method according to the present invention,

Forming a channel layer and a source / drain electrode on the substrate;

Forming a gate insulating film on the substrate on which the source / drain electrodes are formed, and subsequently forming a metal film and performing a mask process to form a gate electrode on the channel layer;

Forming a first passivation layer on the substrate on which the gate electrode is formed, and then removing the first passivation layer and the gate insulating layer in the pixel region by using a mask process and exposing a portion of the drain electrode;

After removing the first passivation layer and the gate insulating layer of the pixel region, the first and second metal layers are continuously formed without removing the photoresist, and then a lift-off process is performed to form the first electrode and the sacrificial layer in the pixel region. Making;

After forming the second passivation layer and the planarization layer on the substrate on which the first electrode and the sacrificial layer are sequentially formed, the exposure and development, the dry process, and the wet process are sequentially performed to remove the sacrificial layer of the pixel region, and then the edge region of the pixel region. Forming an undercut structure in a predetermined gap between the second passivation layer and the first electrode;

Forming an auxiliary electrode on the first electrode of the pixel region by forming a metal film on the substrate on which the undercut structure is formed; And

And sequentially forming an electron transport layer, an organic light emitting layer, a hole transport layer, and a second electrode on the substrate on which the auxiliary electrode is formed.

In addition, the organic light emitting display device according to another embodiment of the present invention,

A substrate in which pixel regions are defined;

A thin film transistor formed on the substrate;

A first electrode electrically connected to the drain electrode of the thin film transistor and formed in the pixel area;

An auxiliary electrode formed on the first electrode;

An electron transport layer, an organic light emitting layer, and a hole transport layer sequentially formed on the first electrode and the auxiliary electrode;

A second electrode formed on the hole transport layer;

An insulating layer disposed on the second electrode; And

A reflective layer formed on the insulating layer,

A sacrificial pattern in which a predetermined gap is formed between the passivation layer and the first electrode is formed around the edge of the pixel region, and a sacrificial pattern electrically contacted with the first electrode is formed inside the undercut structure.

The present invention has the effect of simplifying the manufacturing process by changing the structure of the thin film transistor and improving the performance of the thin film transistor.

In addition, since the structure of the thin film transistor can be formed as a top gate structure of a coplanar, there is an effect that the transistor can be stably formed on a substrate.

The present invention is not limited to the above-described embodiments, and various changes can be made by those skilled in the art without departing from the gist of the present invention as claimed in the following claims.

Hereinafter, exemplary embodiments will be described in detail with reference to the accompanying drawings. First, it should be noted that the same components or parts in the drawings represent the same reference numerals as much as possible. In describing the embodiments, detailed descriptions of related well-known functions or configurations are omitted in order not to obscure the gist of the embodiments.

In addition, in the description of the embodiments, each layer (film), region, pattern or structures may be on or below the "on / above / over / upper" of the substrate, each layer (film), region, pad or patterns. (down / below / under / lower) ", the meaning is that each layer (film), region, pad, pattern or structure is a substrate, each layer (film), region, pad or It may be interpreted as being formed in contact with the patterns, or may be interpreted as another layer (film), another region, another pad, another pattern, or another structure formed in between. Therefore, the meaning should be determined by the technical spirit of the invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a diagram illustrating a pixel structure of an organic light emitting display device according to the present invention.

As shown in FIG. 1, the organic light emitting display device of the present invention has a structure of a bottom emission type organic light emitting display device. On the insulating substrate 100, a thin film transistor having a top gate structure of a coplanar is formed.

In the TFT structure, the buffer layer 101 is formed on the insulating substrate 100, and the channel layer 104 and the ohmic contact layer 105 are formed on the buffer layer 101. The ohmic contact layer 105 has a double layer structure of an amorphous silicon pattern 105a and a doped amorphous silicon pattern 105b. Source / drain electrodes 107a and 107b are formed on the ohmic contact layer 105, and a gate electrode 109 is formed on the channel layer 104 with the gate insulating layer 106 interposed therebetween.

First and second passivation layers 112 and 117 are formed on the gate electrode 109, respectively. In addition, the planarization layer 120 is patterned in the thin film transistor and the non-display area, and the planarization layer 120 and the second passivation layer 117 are removed in the pixel area, and the first electrode 115 is removed in the removed region. , An auxiliary transport 122, an electron transporting layer 130a including an electron injection layer, an organic light emitting layer 130b, and a hole transporting layer 130c including a hole injection layer a hole transporting layer and a second electrode 150 are formed.

In addition, the sacrificial pattern 116a is spaced a predetermined distance from both edge regions of the auxiliary electrode 122, and a predetermined undercut structure is formed between the patterned second passivation layer 117 and the planarization layer 120. In the undercut structure, the sacrificial pattern 116a is patterned inwardly by a predetermined distance from the boundary area between the pixel region, the second passivation layer 117, and the planarization layer 120, so that the first electrode 115 and the second passivation layer ( It is a structure in which a predetermined space (gap) is formed between 117.

The undercut structure as described above functions to form electrodes in each pixel area independently without a mask process when forming the auxiliary electrode 122. 122a, which is shown in the drawings but is not described, is a metal pattern.

After the insulating layer 170 is formed on the second electrode 150, a reflective layer 180 having a high reflectance is formed. The reflective layer 180 is formed to allow the light emitted from the organic light emitting layer 130b to travel in the direction of the insulating substrate 100. If the upper emission method is applied, the insulating layer and the reflective layer forming process may be omitted. In this case, the first electrode 115 may use an opaque metal, and the auxiliary electrode 122 may be removed.

As described above, the present invention has an effect of improving device characteristics by forming an organic light emitting diode suitable for an N-type thin film transistor while simplifying the process. In addition, since the structure of the thin film transistor may be formed as a top gate structure of a coplanar, the transistor may be stably formed on a substrate.

2A to 2D are cross-sectional views illustrating a manufacturing process of an organic light emitting display device according to the present invention.

As shown in FIG. 2A, a buffer layer 101 is formed on the transparent insulating substrate 100, and then a thin film including a channel layer 104, source / drain electrodes 107a and 107b, and a gate electrode 109. A transistor (TFT) was formed.

In a specific manufacturing process, a polysilicon layer, an amorphous silicon layer, and a doped (N + or P +) amorphous silicon layer are sequentially formed on the insulating substrate 100 on which the buffer layer 101 is formed, followed by a mask process. The polysilicon layer, the amorphous silicon layer, and the doped amorphous silicon layer are collectively etched to form the channel layer 104.

The polysilicon layer forms a silicon layer on the buffer layer 101 and then performs an alternating magnetic field crystallization (AMFC) process to form a polysilicon layer. As described above, when the AMFC process is applied, the polysilicon layer may be formed at a low temperature.

However, the method of forming the polysilicon layer is not limited to the AMFC process, and various crystallization methods such as laser crystallization may be applied.

As described above, when the channel layer 104 is formed on the insulating substrate 100, a metal film is formed on the insulating substrate 100, and then source / drain electrodes 107a and 107b are formed using a mask process. . Thereafter, the amorphous silicon layer and the doped amorphous silicon layer on the channel layer 104 formed between the source / drain electrodes 107a and 107b formed to face each other are removed by performing a dry etch process. Thus, the channel layer 104 is exposed between the source / drain electrodes 107a and 107b. An ohmic contact layer 105 including an amorphous silicon pattern 105a and a doped amorphous silicon pattern 105b is formed between the source / drain electrodes 107a and 107b and the channel layer 104.

As described above, when the source / drain electrodes 107a and 107b are formed on the insulating substrate 100, the gate insulating layer 106 is formed, a metal layer is subsequently formed, and then a mask process is performed to form the channel layer 104. The gate electrode 109 is formed on the gate insulating film 106 above.

At this time, the metal film and the gate insulating film 106 formed in the pixel region are sequentially removed. In this case, the wet etching process for forming the gate electrode 109 and the dry etching process for removing the gate insulating layer 106 may be sequentially performed. The gate electrode 109 may use AlNd or a double metal film of AlNd and Mo.

However, during the gate electrode 109 forming process, the gate insulating layer formed in the pixel area may be left without being removed. Thereafter, during the passivation layer etching process, the gate insulating layer 106 in the pixel region may be removed.

Next, as shown in FIG. 2B, after forming the first passivation layer 112 on the insulating substrate 100, a mask process is performed to form the first passivation layer 112 and the first passivation layer 112 formed in the pixel region. ), The gate insulating layer 106 formed below is sequentially removed. In this case, a portion of the drain electrode 107b is etched to be exposed.

In this case, the patterned photoresist pattern for etching the first passivation layer 112 and the gate insulating layer 106 is not removed, but is left as it is.

As described above, the first metal film made of a transparent metal such as ITO, IZTO, and IZO and the second metal film such as Mo are sequentially formed while the photoresist pattern is left on the insulating substrate 100.

Then, a lift-off process is performed to remove the photoresist pattern of the thin film transistor region to form the sacrificial layer 116 formed on the first electrode 115 and the first electrode 115 in the pixel region. do. The first electrode 115 is in electrical contact with the drain electrode 107b.

Thereafter, as shown in FIG. 2C, the second passivation layer 117 is formed on the insulating substrate 100, and then the planarization layer 120 is continuously formed. The planarization layer 120 uses an organic layer, and performs an exposure and development process to remove the planarization layer 120 of the pixel region. Subsequently, the etching process is continued to remove the second passivation layer 117 of the pixel region to expose the first electrode 115 and the sacrificial layer 116. In this case, the planarization layer 120 may use an inorganic layer in some cases.

As described above, when the sacrificial layer 116 is exposed, a wet etching process is performed to remove the exposed sacrificial layer 116 of the pixel area, thereby forming a sacrificial pattern 116a in the edge area of the pixel area. In this case, an undercut structure is formed at the edge of the pixel region due to the wet etching process. The undercut structure is a structure in which a predetermined gap is formed because the sacrificial pattern 116a does not exist between the first electrode 115 and the second passivation layer 117.

Accordingly, the first electrode 115 and the sacrificial pattern 116a are directly contacted on the drain electrode 107b, and only the first electrode 115 is formed in the pixel region. The sacrificial pattern 116a has a thickness of 500 μm, and the length (under cut length) from the pixel region and the second passivation layer 117 boundary region (under cut edge region) to the sacrificial pattern 116a is 0.5 to 1 μm.

In the above, the dry etching process and the wet etching process are performed after the formation of the second passivation layer 117 and the planarization layer 120. However, in some cases, after the formation of the second passivation layer 117, the dry etching process and the wet etching process are performed. The cut structure can be formed. When the undercut structure is formed as described above, the planarization layer 120 is formed on the insulating substrate 100, and the exposure and development processes are performed to expose the pixel region.

As described above, when the undercut structure is formed in the pixel region and the first electrode 115 and the sacrificial pattern 116a are formed, as shown in FIG. 2D, a metal layer having a high conductivity such as Al or an Al alloy is formed. Form thinly. When the metal layer is formed as described above, the metal layer is electrically disconnected in the undercut structure region of the pixel region, and the auxiliary electrode 122 is formed in the pixel region where the first electrode 115 is formed.

In addition, the metal pattern 122a is formed on the planarization film 120 as it is. That is, after forming the metal layer, the auxiliary electrode 122 is separated from the metal pattern 122a without a mask process. The thickness of the auxiliary electrode 122 is formed to be smaller than the thickness of the sacrificial pattern 116a, which is the height of the undercut, but thinly formed to have a transmissive characteristic. Form a thin film from about 500Å or less to 10Å.

When the auxiliary electrode 122 is formed in the pixel region as described above, the organic light emitting layer 130 is formed. Since the thin film transistor of the present invention is an N-type TFT, the first electrode 115 and the auxiliary electrode 122 are formed of an organic field. It is preferable to have the cathode characteristic of a light emitting diode.

Therefore, an electron transporting layer 130a including an electron injection layer is formed on the first electrode 115 and the auxiliary electrode 122 in the pixel region, and on the electron transporting layer 130a, an organic transporting layer 130a is formed. The electroluminescent layer 130b is formed. On the organic light emitting layer 130b, a hole transporting layer 130c including a hole injection layer is formed.

In this case, the organic light emitting layer 130b has a structure in which light emitting materials that implement red, green, and blue colors are sequentially disposed for each subpixel. In addition, the organic light emitting layer 130b may be formed of a high molecular material or a low molecular material, and a vacuum deposition method, an inkjet method, a printing method, a nozzle spray method, a roll coating method, and the like may be used for the formation method.

When the organic light emitting layer 130b and the hole transport layer 130c are formed as described above, the second electrode 150 is formed on the insulating substrate 100 by forming a transparent conductive material such as ITO, IZO, or ITZO. .

When the second electrode 150 is formed on the insulating substrate 100 as described above, as shown in FIG. 2E, the insulating layer 170 is formed on the second electrode 150, and then the reflectance is high. The reflective layer 180 is formed. The reflective layer 180 is formed to allow the light emitted from the organic light emitting layer 130b to travel in the direction of the insulating substrate 100. That is, the organic light emitting display device of the present invention is formed to form a bottom emission type structure. If the upper emission method is applied, the insulating layer and the reflective layer forming process may be omitted.

1 is a diagram illustrating a pixel structure of an organic light emitting display device according to the present invention.

2A through 2E are cross-sectional views illustrating a manufacturing process of the organic light emitting display device according to the present invention.

* Description of the symbols for the main parts of the drawings *

100: insulation substrate 101: buffer layer

104: channel layer 105: ohmic contact layer

109: gate electrode 109 112: first protective film

117: second protective film 120: planarization film

115: first electrode 122: auxiliary electrode

150: second electrode 170: insulating layer

180: reflective layer

Claims (9)

Forming a channel layer and a source / drain electrode on the substrate; Forming a gate insulating film on the substrate on which the source / drain electrodes are formed, and subsequently forming a metal film and performing a mask process to form a gate electrode on the channel layer; Forming a first passivation layer on the substrate on which the gate electrode is formed, and then removing the first passivation layer and the gate insulating layer in the pixel region by using a mask process and exposing a portion of the drain electrode; After removing the first passivation layer and the gate insulating layer of the pixel region, the first and second metal layers are continuously formed without removing the photoresist, and then a lift-off process is performed to form the first electrode and the sacrificial layer in the pixel region. Making; After forming the second passivation layer and the planarization layer on the substrate on which the first electrode and the sacrificial layer are sequentially formed, the exposure and development, the dry process, and the wet process are sequentially performed to remove the sacrificial layer of the pixel region, and then the edge region of the pixel region. Forming an undercut structure in a predetermined gap between the second passivation layer and the first electrode; Forming an auxiliary electrode on the first electrode of the pixel region by forming a metal film on the substrate on which the undercut structure is formed; And And sequentially forming an electron transport layer, an organic light emitting layer, a hole transport layer, and a second electrode on the substrate on which the auxiliary electrode is formed. The method of claim 1, further comprising forming an insulating layer on the second electrode and forming a reflective layer on the insulating layer. The method of claim 1, wherein the auxiliary electrode is made of Al or an alloy thereof. The method of claim 1, wherein the auxiliary electrode has a thickness of about 500 μs or less to 10 μs. The method of claim 1, wherein a predetermined gap between the second passivation layer and the first electrode is 50 to 500 μs, which is equal to the thickness of the sacrificial layer. The method of claim 1, wherein the first electrode is formed of one of ITO, IZO, and ITZO, which is a transparent conductive material. A substrate in which pixel regions are defined; A thin film transistor formed on the substrate; A first electrode electrically connected to the drain electrode of the thin film transistor and formed in the pixel area; An auxiliary electrode formed on the first electrode; An electron transport layer, an organic light emitting layer, and a hole transport layer sequentially formed on the first electrode and the auxiliary electrode; A second electrode formed on the hole transport layer; An insulating layer disposed on the second electrode; And A reflective layer formed on the insulating layer, And an undercut structure in which a predetermined gap is formed between the passivation layer and the first electrode around the edge of the pixel region, and a sacrificial pattern electrically contacted with the first electrode is formed inside the undercut structure. Light emitting display device. The organic light emitting display device of claim 7, wherein the auxiliary electrode is made of Al or an alloy thereof. The organic light emitting display device as claimed in claim 1, wherein the auxiliary electrode has a thickness of about 500 mW or less to about 10 mW.

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