JP2001067156A - Peripheral equimenht of computer, control method therefor, image pickup device, and storage medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To freely manage the communication connection to a host device. SOLUTION: When a VBUS line (the output of a buffer 70) of a USB cable 30 is changed or key entry is executed, a port control circuit 62 checks whether the VBUS line is a high(H) level or not. When the VBUS line is turned to H, a CPU 50 allows a clock oscillation/control circuit 66 to increase clock frequency, turns a sleep mode to an operation mode and starts clock supply to an SIE circuit 46 and an EPC circuit 48 to prepare USB communication. The circuit 62 impresses prescribed voltage to a pull-up resistor 78 to pull up D+ line. Therefore a host PC10 recognizes that peripheral equipment 40 is connected to a USB bus. The equipment 40 suitably communicates with the host PC10 in accordance with a request from the PC10. When there is no access for fixed time, the equipment 40 informs the host PC10 of communication end. Therefore the circuit 62 turns voltage to be impressed to the resistor 78 to a low(L) level or HiZ. Then the mode is turned to the sleep mode of low clock frequency.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer peripheral device, a control method therefor, an image pickup apparatus, and a storage medium, and more specifically, a computer which consumes low power and can freely manage a communication connection with a host. The present invention relates to a peripheral device, a control method thereof, an imaging device, and a storage medium.

[0002]

2. Description of the Related Art In recent years, as a method of connecting a peripheral device to a PC, a USB (Universal Serial) has been used.
Bus) has been commercialized. The USB connects a personal computer and a plurality of peripheral devices by serial communication, and includes a plug-and-play (a function for automatically recognizing a connection relationship when a new peripheral device is newly connected or disconnected), a hot-plug system, and a hot-plug system. Insertion (with power on,
Connection / disconnection function) or a live-line insertion / extraction function, and a power supply function, so that the user is not bothered to set an address and an ID number at the time of connection. In the USB, a total of four wirings of a 5V power supply line called VBUS, a GND line, and two signal lines D + and D- are attached and detached by a dedicated connector. There is a limit to the current value that can be supplied by the power line, and the USB
Is limited to 100 mA to 500 mA.

Further, the USB defines that a peripheral device must be in a suspend state by a command from a host, and in this suspend state, the current consumption from the VBUS must be reduced to 500 μA. There is a resume command for returning from the suspend state.

An imaging system having such a USB connection terminal is described in Japanese Patent Application Laid-Open No. Hei 10-232924.

[0005]

The conventional USB peripheral device has the following problems. That is, when power is supplied not only from the USB but also from the host,
The supply current is limited. Therefore, the peripheral device cannot be provided with a high-speed circuit or mechanism for flowing a large current exceeding the supply current limit value. In a digital still camera, a large current is temporarily required for charging a strobe and for accumulating a shutter spring. However, due to the limitations described above, digital still cameras can be used with USB peripherals,
The USB peripheral device supplied with power from the host could not be used.

[0006] When a suspend command is issued from the host, the USB peripheral device must promptly reduce the power supply current. For example, if the power is turned off while data is being written to the memory card, there is a problem that, in the worst case, the data in the memory card is destroyed. Therefore, it is difficult to use a USB peripheral device as a device for writing some data, particularly a large amount of data, on a memory card, such as an electronic still camera.

[0007] When the peripheral device itself has a power source, a device such as a camera which is assumed to be portable has a built-in battery. However, especially in the case of USB, the communication circuit on the peripheral device side must always be operating during connection. This means that the host always emits a packet signal, determines whether this is a packet for itself, and if it is a command for itself, it must react within a predetermined time Because. Therefore, battery-powered devices can be
When connected to the USB as a peripheral device, the battery is consumed in a short time without being able to shift to the power saving mode.

An object of the present invention is to provide a computer peripheral device, a control method thereof, an imaging device, and a storage medium which solve such a problem.

[0009]

A computer peripheral device according to the present invention comprises a connection signal receiving means for receiving a host connection signal indicating connection with a host from a host, and a signal indicating connection / disconnection with the host. Monitors the continuation of communication between the connection signal transmitting means to be transmitted to the host and the host, and transmits a signal indicating disconnection to the host by the connection signal transmitting means when the communication does not continue for a predetermined time. And a control means for shifting to a low current consumption mode.

According to the control method of the present invention, a connection signal receiving means for receiving from a host a host connection signal indicating connection with a host, and a connection signal for transmitting a signal indicating connection / disconnection with the host to the host. A method of controlling an electronic device having a transmitting unit, wherein the step of monitoring continuation of communication with the host and the step of transmitting the connection signal to the host when the communication does not continue for a predetermined time. And a control step of transmitting a signal indicating connection and shifting to a low current consumption mode.

An image pickup apparatus according to the present invention comprises: an image pickup means; a connection signal receiving means for receiving a host connection signal indicating connection with the host from the host; and a signal indicating connection / disconnection with the host to the host. Connection signal transmitting means for transmitting;
Monitoring the continuation of communication with the host, and when the communication does not continue for a predetermined time, controls the connection signal transmitting means to transmit a signal indicating disconnection to the host and shifts to a low current consumption mode. Means.

A storage medium according to the present invention stores program software for executing the above-described computer peripheral device control method.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the drawings, an embodiment of the present invention will be described in detail. FIG. 1 is a schematic block diagram of an embodiment of the present invention. The USB host PC 10 connects to the peripheral device 40 via the USB cable 30. In this embodiment, the peripheral device is an electronic still camera.

The host PC 10 includes a power supply circuit 12 for supplying power to the VBUS line and a U.S.C.
SB host control circuit 14, USB data buffer 16,
18, a pull-down resistor 20 for the D + line and a pull-down resistor 22 for the D- line. USB cable 30 is VB
It comprises a signal cable 32 having a US line, a GND line D + line and a D- line, and connectors 34 and 36 on both sides thereof. The connector 34 connects to the host PC 10 and the connector 36 connects to the peripheral device 40. USB host PC10
And the operation of the USB cable 30 are the same as those of the conventional U cable.
These are the same as the SB host PC 210 and the USB cable 230, respectively.

The peripheral device 40 has the following elements.
That is, 42 and 44 are USB data buffers, and 46 is U
SIE circuit for converting an SB serial signal into a parallel signal and vice versa; 48, an EPC circuit for controlling data transmission / reception in accordance with the USB protocol;
Is a RAM serving as a work memory of the CPU 50. 54, an image sensor for converting an optical image into an electric signal; 56, an image processing circuit for performing camera signal processing on an output image signal of the image sensor 54; 58, an image processing circuit 5
Reference numeral 60 denotes a FIFO memory that temporarily holds the output, and reference numeral 60 denotes a removable memory card that finally stores a captured image.
62 is a port control circuit, 64 is a programmable interrupt control circuit, and 66 is a clock oscillation / control circuit.

EPC circuit 48, CPU 50, RAM 5
2. The FIFO 58, the memory card 60, the port control circuit 62, the programmable interrupt control circuit 64, and the clock oscillation / control circuit 66 are connected to the system bus 68.

Reference numeral 70 denotes a latch-up prevention buffer connected to the VBUS line of the signal cable 32, and its output is applied to the port control circuit 62. Reference numeral 72 denotes an operation key of the peripheral device 40, reference numeral 74 denotes a battery serving as a power source of the peripheral device 40, reference numeral 76: a predetermined power supply voltage is generated from an output voltage of the power supply 74, and supplied to portions surrounded by broken lines (blocks 42 to 66). The voltage regulator 78 is connected to the port control circuit 62 and the U
This is a pull-up resistor connected between the SB cable 32 and the D + line. The resistance value of the resistor 78 is 1.5 kΩ.

The operation of the peripheral device 40 will be described. The peripheral device 40 operates with the voltage generated by the battery 74 and the voltage regulator 76. The operations of the USB buffers 42 and 44 and the EPC circuit 48 are the same as in the conventional example. SIE
The circuit 46 includes, in addition to the function of the conventional SIE circuit 246, a signal indicating the state of the USB signal (specifically, a signal indicating that the D + line and the D- line are in the suspended state and returning from the suspend state). (A signal indicating that a resume state has occurred).
It has the function of supplying to

The clock oscillation / control circuit 66 includes a CPU 5
A clock with the frequency indicated by 0 can be output. For example, high-speed signal transfer by USB and control of a photographic lens system and image processing control before and after photographing require a high processing capability of the CPU 50. Therefore, the CPU 50 transmits a high-frequency operation clock to the clock oscillation / control circuit 66. Output. Conversely, when the device is not connected to the USB or when no image is taken, the frequency of the clock output from the clock oscillation / control circuit 66 is kept low to reduce the power consumption of the entire device. When the image is not captured only by the USB communication, the clock supply itself to the image sensor 54, the image processing circuit 56, and the FIFO 58 may be stopped. In this way, controlling the frequency of the clock,
In some cases, by stopping the supply, the power consumption is sequentially reduced, and the consumption of the battery 74 is prevented.

The buffer 72 has an H level or an L level depending on whether or not a predetermined voltage or more is applied to the VBUS signal line.
Is output. When the output of the buffer 72 changes from L to H or from H to L, the programmable interrupt control circuit 64 detects this as an interrupt signal. That is, the battery 7
In the state in which the operating power is supplied by the host PC 10, the host PC 10
To see if it is physically connected to The change of the output of the buffer 70 from L to H indicates that the disconnected connector 34 or 36 has been connected by the user. Therefore, for example, if the CPU 50 has been in the power saving mode until then, the CPU 50 can be shifted to the high-speed mode according to the transition of the output level of the buffer 70. Further, the fact that the output of the buffer 70 is L means that the peripheral device 40
No. 109 is not connected. In this case, even if the CPU 50 is operating in the high-speed mode for photographing, the supply of the clock to the SIE circuit 46 and the EPC circuit 48 may be stopped, thereby reducing unnecessary power consumption.

The port control circuit 62 reads the output of the buffer 72 and the key operation of the operation key 72, and controls the voltage application to the pull-up resistor 78 according to the read result or the instruction from the CPU 50. By setting the voltage applied to the pull-up resistor 78 to 3.3 V, the voltage rises up to the D + line, and by setting the applied voltage to 0 V or HiZ,
It can be pulled down or opened for the + line. Thus, by pulling up the pull-up resistor 78 when the peripheral device 40 is ready for communication, the U peripheral device 40
It can be recognized that they are connected by the B cable 30. Conversely, if communication is not ready, pull-up resistor 78 is pulled down or opened,
The host PC 10 can recognize that the peripheral device 40 is not connected, and the host PC 10
Do not start communication such as address setting for. When the peripheral device 40 is ready for communication, the pull-up resistor 7
8 is pulled up, the host PC 10
0 is recognized as connected.

FIG. 2 shows an operation flowchart of this embodiment. The operation of this embodiment will be described in detail with reference to FIG. The peripheral device 40 is in the sleep mode and the host PC
It is assumed that no USB connection is made to the device 10. The port control circuit 62 monitors a change in the VBUS line (output of the buffer 70) and the presence or absence of a key input (S1). VBUS
When the line (output of the buffer 70) changes or there is a key input (S1), it is checked whether the VBUS line is at the H level (S2). The port control circuit 62 may periodically check the ports to which these signals are input, or may detect a change by an interrupt.

When the VBUS line changes to H (S2), C
The PU 50 causes the clock oscillation / control circuit 66 to increase the clock frequency, and shifts from the sleep mode to the operation mode (S3). Then, the clock supply to the USB-related SIE circuit 46 and the EPC circuit 48 is started.

If the OS (operating system) has been unloaded, the OS is started and the US
The driver for communication B and the application for transfer are started (S4). Preparations necessary for USB communication, such as setting to the SIE circuit 46 and the EPC circuit 48 and securing a memory area, are performed (S5).

The port control circuit 62 includes a pull-up resistor 7
8, a predetermined voltage is applied to pull up the D + line (S
6). Thereby, the host PC 10 recognizes that the peripheral device 40 is connected on the USB bus. Host P
C10 configures peripheral device 40,
A process for enabling communication via the USB bus such as address setting is executed (S7).

Thereafter, the peripheral device 40 is connected to the host PC 10
Communication with the host PC 10 in response to the request (S
8). This communication includes a case where the driver of the host PC 10 communicates as necessary, and a case where the driver starts according to a user's operation such as a camera shooting instruction, transfer of an image being shot with the finder, and file transfer with the memory card 60. There is. If there is no access for a predetermined time such as 10 minutes, it is determined that a timeout has occurred (S9). When a time-out occurs, the communication is interrupted, but the user may still have a schedule for communication, such as file transfer. Therefore, a confirmation message is displayed on the screen (S10), and the user's approval is waited for (S11). When the user approves (S1
1) As the communication end processing, the host PC 10 is notified of the fact and the communication end is set in the apparatus (S1).
2).

The port control circuit 62 includes a pull-up resistor 7
8 is shifted to L level or HiZ (S1).
3). As a result, the host PC 10 recognizes that the peripheral device 40 has been disconnected from the USB bus.

The driver and communication application software used for USB communication are unloaded, and the secured memory is released (S14). And the clock oscillation
The frequency of the clock output from the control circuit 66 is set low, and the mode shifts to the sleep mode again (S15). In the sleep mode, not only the frequency of the clock supplied to the CPU 50 may be lowered, but also the supply of the clock to the USB interface may be stopped. If the power supply to the USB interface can be selectively stopped, the power supply may be stopped.

When the user wants to release the sleep mode and start communication again, the user can use the USB connector 32 or 34.
May be temporarily removed and re-inserted, or some key operation may be performed once (S1, S2).

Since the peripheral device 40 includes a battery of a power supply, an actuator, a strobe charging circuit, and the like that exceed the USB supply current can be provided. In addition, since the power is not cut off solely due to the host PC 10, the power does not drop during the writing to the memory card and the data recorded on the memory card is not destroyed.

When there is no access to the peripheral device 40 for a predetermined time, the consumption of the battery 74 can be automatically suppressed, and the life of the battery 74 can be greatly extended.

When shifting to the sleep mode, the host PC 10 is notified of the end of communication in advance, so there is no danger of abnormal termination. When restarting, follow the same steps of reconnecting devices once disconnected from the bus,
An error does not occur because the peripheral device is not ready for communication. To reconnect, simply touch any key switch on the peripheral device side, or simply disconnect and reconnect the USB connector, so that the operation burden is small.

Although the case of the USB bus has been described as an example, the present invention can be applied to a case where another communication medium is used.

FIG. 3 is a schematic block diagram of an embodiment in which a computer and its peripheral devices are connected via an RS232C cable.

The host PC 110 is connected to the peripheral device 140 via the RS232C cable 120. RS23
The 2C cable 120 has connectors 122 and 124 at both ends.
, And signal lines 126, 128, 130, 132 and a ground line 134. In the RS232C, bidirectional communication can be normally performed only with the signal lines 126 and 128, but in the present embodiment, the signal lines 130 and 132 are also used.

The host PC 110 is connected to each of the signal lines 126-1.
RS232C driver 112 and UART to connect to
The circuit 114 has a pull-down resistor 116 connected to the signal line 132.

The peripheral device 140 includes the following elements.
That is, 142 is an RS232C driver, 144 is a UART circuit, and 150 is a CP that controls the peripheral device 140.
U and 152 are RAMs serving as work memories of the CPU 150
It is. An image sensor 154 converts an optical image into an electric signal, an image processing circuit 156 performs camera signal processing on an output image signal of the image sensor 154, and an image processing circuit 158.
FIFO memory for temporarily holding the output of 56, 160
It is a removable memory card that finally stores a captured image. 162 is a port control circuit, 164 is a programmable interrupt control circuit, and 166 is a clock oscillation / control circuit.

UART circuit 144, CPU 150, RA
M152, FIFO 158, memory card 160, port control circuit 162, programmable interrupt control circuit 16
4 and the clock oscillation / control circuit 166 are connected to the system bus 168.

Reference numeral 170 denotes a pull-down resistor connected to the signal line 130; 172, operation keys of the peripheral device 140;
Is a battery serving as a power supply for the peripheral device 140, and 176 is a power supply 17
4 is a voltage regulator that generates a predetermined power supply voltage from the output voltage of No. 4 and supplies the power supply voltage to portions (blocks 144 to 166) surrounded by a broken line.

A signal sent from the host PC 110 via the signal line 130 is input to the port control circuit 162 and the programmable interrupt control circuit 164 via the driver 142. A signal sent from the host PC 110 via the signal line 126 is input not only to the UART circuit 144 but also to the programmable interrupt control circuit 164. The port control circuit 162 also supplies a signal for the host PC 110 to the signal line 132.

The operation of this embodiment will be described. Host PC1
It is assumed that the signal output from 10 to the signal line 130 is at the H level. In the peripheral device 140, since the pull-down resistor 170 is connected to the signal line 130, the connector 12
2 or 124 is off, the signal line 130 is at L level, and when the connectors 122 and 124 are connected together, it is at H level. As a result, the port control circuit 162 and the programmable control circuit 164 determine whether the peripheral device 140
10 can be recognized.

The port control circuit 162 outputs a signal of a predetermined level on the signal line 132, and the host P
Since the pull-down resistor 116 is connected in the C 110, the host PC 110 can similarly recognize whether or not the connectors 122 and 124 are connected together based on the level of the signal line 132. The port control circuit 162 sets the signal to the signal line 132 to L level,
Can be recognized that the RS232C cable has been disconnected. When the host PC 110 wants to recognize that the peripheral device 140 is connected, the port control circuit 162
Changes the signal to the signal line 132 to the H level. This signal replaces the pull-up resistor 66 of the embodiment shown in FIG.

Therefore, the embodiment shown in FIG. 3 operates similarly to the embodiment shown in FIG. In steps S1 and S2 of the flowchart shown in FIG. 2, the signal level of the signal line 130 may be monitored. In step S6, the signal on the signal line 132 is set to H level instead of turning on the pull-up resistor, and in step S13, the signal on the signal line 132 is set to L level instead of turning off the pull-up resistor.

The present invention may be applied to a system constituted by a plurality of devices or to an apparatus constituted by a single device.

Further, in order to operate various devices so as to realize the functions of the above-described embodiments, a computer in an apparatus or a system connected to the various devices has software for realizing the functions of the above-described embodiments. The present invention also includes a case in which a program (code) is supplied and a computer (CPU or MPU) of the apparatus or system is operated by operating the various devices according to stored programs.

In this case, the program code itself of the software realizes the function of the above-described embodiment, and the program code itself and means for supplying the program code to the computer, for example,
A storage medium storing such a program code constitutes the present invention. As a storage medium for storing such a program code, for example, a floppy (registered trademark) disk, hard disk, optical disk, magneto-optical disk, C
A D-ROM, a magnetic tape, a nonvolatile memory card, a ROM, and the like can be used.

When the computer executes the supplied program code, not only the functions of the above-described embodiment are realized, but also the OS (operating system) or other operating system running on the computer. Even when the functions of the above-described embodiments are realized in cooperation with application software and the like, it goes without saying that such program codes are included in the embodiments of the invention according to the present application.

Further, the supplied program code is:
After being stored in the memory provided in the function expansion board of the computer or the function expansion unit connected to the computer, the CPU or the like provided in the function expansion board or the function expansion unit performs one of the actual processing based on the instruction of the program code. It is needless to say that a case where the functions of the above-described embodiments are realized by performing all or part of the processes and executing the processing is also included in the invention according to the present application.

[0049]

As can be easily understood from the above description, according to the present invention, when there is no communication for a predetermined time,
By causing the host computer to recognize that the peripheral device has been removed from the bus and shifting the peripheral device to the low current consumption mode, the power consumption of the peripheral device can be reduced and the life of the power supply battery can be extended. The communication connector can be once disconnected and then reconnected, or can be returned to the original state by a simple operation such as operating a predetermined key switch.

The setting software for starting communication can be operated at a high speed, communication is started quickly, and communication from the host is started after the setting is completed.
No communication error or the like occurs.

After the host receives the communication release notification,
Since the setting process for canceling the communication is actually executed, a communication error or the like hardly occurs. Further, since the communication release processing is executed before the transition to the low current consumption mode, the communication release is performed promptly.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram of a first embodiment of the present invention.

FIG. 2 is an operation flowchart of the first embodiment.

FIG. 3 is a schematic configuration block diagram of a second embodiment of the present invention.

[Explanation of symbols]

 10: USB host PC 12: Power supply circuit 14: USB host control circuit 16, 18: USB data buffer 16, 18, 20, 22: Pull-down resistor 30: USB cable 32: Signal cable 34, 36: Connector 40: Peripheral device 42, 44: USB data buffer 46: SIE circuit 48: EPC circuit 50: CPU 52: RAM 54: Image sensor 56: Image processing circuit 58: FIFO memory 60: Memory card 62: Port control circuit 64: Programmable interrupt control circuit 66: Clock Oscillation / control circuit 68: System bus 70: Latch-up prevention buffer 72: Operation key 74: Battery 76: Voltage regulator 78: Pull-up resistor 110: Host PC 112: RS232C driver 114: UART circuit 116: Pull-down resistor 1 20: RS232C cable 122, 124: Connector 126, 128, 130, 132: Signal line 134: Ground line 140: Peripheral device 142: RS232C driver 144: UART circuit 150: CPU 152: RAM 154: Image sensor 156: Image processing circuit 158: FIFO memory 160: Memory card 162: Port control circuit 164: Programmable interrupt control circuit 166: Clock oscillation / control circuit 168: System bus 170: Pull-down resistor 172: Operation key 174: Battery 176: Voltage regulator

Continued on the front page (72) Inventor Yuji Koide 3-30-2 Shimomaruko, Ota-ku, Tokyo F-term (reference) in Canon Inc. 5B011 DA06 EB06 HH02 KK02 KK14 LL14 5B077 NN02 5K034 AA15 CC02 KK21 TT04

Claims (22)

[Claims] A connection signal receiving unit that receives a host connection signal indicating connection with the host from the host; a connection signal transmission unit that transmits a signal indicating connection / disconnection with the host to the host; And a control unit for monitoring the continuation of communication with the control unit and transmitting a signal indicating disconnection to the host by the connection signal transmission unit when the communication does not continue for a predetermined time, and shifting to a low current consumption mode. A computer peripheral device comprising: 2. The computer peripheral device according to claim 1, wherein the control unit returns from the low power consumption mode in response to the connection signal receiving unit receiving the connection signal from the host. 3. An operation key switch means, further comprising:
2. The computer peripheral device according to claim 1, wherein the control unit returns from the low power consumption mode in response to an operation of the operation key switch unit. 4. A setting software group for starting communication is provided. When starting a communication connection, after returning from the low current consumption mode, the setting software group for starting communication is executed. 2. The computer peripheral device according to claim 1, wherein said control means controls said control means so as to detect the presence of a communication partner. 5. A communication system further comprising setting software for canceling communication, and controlling the control means so as not to detect the presence of a communication partner when canceling the communication connection. 2. The computer peripheral device according to claim 1, wherein a group of setting software is executed, and thereafter, the mode shifts to a low current consumption mode. 6. The computer peripheral device according to claim 1, further comprising a power supply battery. 7. An electronic apparatus comprising: connection signal receiving means for receiving a host connection signal indicating connection with a host from a host; and connection signal transmission means for transmitting a signal indicating connection / disconnection to the host to the host. A method of controlling a device, comprising: a step of monitoring continuation of communication with the host; and a step of transmitting a signal indicating disconnection to the host by the connection signal transmitting step when communication does not continue for a predetermined time. And a control step of shifting to a low current consumption mode. 8. The control step, according to receiving a connection signal from the host by the connection signal receiving means,
The control method according to claim 7, wherein the control method returns from the low power consumption mode. 9. The control method according to claim 7, wherein said control step returns from a low power consumption mode in response to an operation of an operation key switch means. 10. When starting communication connection, after returning from the low current consumption mode, a group of setting software for starting communication is executed, and then the presence of a communication partner is detected. The control method according to claim 7, further comprising a step of controlling the control step. 11. When releasing the communication connection, after controlling the control step so as not to detect the presence of the communication partner, a group of setting software for releasing the communication is executed. The control method according to claim 7, wherein the mode shifts to a mode. 12. An image pickup means, a connection signal receiving means for receiving a host connection signal indicating connection with the host from the host, and a connection signal transmitting means for transmitting a signal indicating connection / disconnection with the host to the host. Monitoring the continuation of communication with the host, and when the communication does not continue for a predetermined time, causes the connection signal transmitting means to transmit a signal indicating disconnection to the host, and shifts to the low current consumption mode. An imaging apparatus, comprising: 13. The imaging apparatus according to claim 12, wherein the control unit returns from the low power consumption mode in response to the connection signal receiving unit receiving the connection signal from the host. 14. The apparatus according to claim 12, further comprising operation key switch means, wherein said control means returns from the low power consumption mode in response to operation of said operation key switch means.
An imaging device according to claim 1. 15. A setting software group for starting communication is provided, and when starting communication connection, after returning from the low current consumption mode, the setting software group for starting communication is executed. 13. The imaging apparatus according to claim 12, wherein the control unit controls the control unit to detect the presence of a communication partner. 16. The system further comprises a group of setting software for canceling communication, and controlling the control means so as not to detect the presence of a communication partner when canceling the communication connection.
13. The imaging apparatus according to claim 12, wherein a group of setting software for canceling communication is executed, and thereafter, the mode shifts to a low current consumption mode. 17. The apparatus according to claim 12, further comprising a power supply battery.
An imaging device according to claim 1. 18. An electronic device comprising: connection signal receiving means for receiving a host connection signal indicating connection with a host from a host; and connection signal transmitting means for transmitting a signal indicating connection / disconnection to the host to the host. A method of controlling a device, comprising: a step of monitoring continuation of communication with the host; and a step of transmitting a signal indicating disconnection to the host by the connection signal transmitting step when communication does not continue for a predetermined time. And a control step for shifting to a low-current-consumption mode. The storage medium stores program software for executing a control method. 19. The storage medium according to claim 18, wherein said control step returns from a low power consumption mode in response to reception of a connection signal from said host by said connection signal receiving means. 20. The storage medium according to claim 18, wherein said control step returns from a low power consumption mode in response to an operation of an operation key switch means. 21. The control method further comprises, when starting a communication connection, after returning from the low current consumption mode, executing a group of setting software for starting communication, and then determining whether a communication partner exists. 19. The storage medium according to claim 18, further comprising a step of controlling the control step so as to cause detection. 22. The control method further comprises: controlling the control step so as not to detect the presence of a communication partner when releasing the communication connection, and then executing a group of setting software for releasing the communication. 19. The storage medium according to claim 18, wherein the mode shifts to a low current consumption mode.