JP2001053413A - Substrate incorporating electronic parts, multilayered substrate incorporating electronic parts, and their manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To greatly reduce the thickness of a substrate incorporating electronic parts by coating one electronic parts with a resin so that the junction of the parts may be exposed and forming a metallic pattern on the surface of the resin. SOLUTION: A substrate 7 incorporating electronic parts is manufactured in such a way that, on a transfer substrate 1, an integrated circuit 2 and chip parts 3 are fixed at desired positions by applying an adhesive to the substrate 1 or using a double coated tape, etc. Then the circuit 2 and parts 3 are sealed with a sealing material 4 and the surface of the material 4 is polished to ensure planarization. In addition, the sealing material 4 for sealing the circuit 2 and parts 3 is stripped off the transfer substrate 1 and a copper pattern 6 which becomes wiring is formed by plating on the stripped-off surface of the material 4. Therefore, the thickness of the substrate 7 can be reduced significantly.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate with a built-in electronic component, a substrate with a built-in multilayer electronic component, and a method for manufacturing the same. TECHNICAL FIELD The present invention relates to a multilayer electronic component built-in substrate that can be manufactured and improved in mounting density, and an electronic component built-in substrate that can be manufactured with a simple process and a method of manufacturing a multilayer electronic component built-in substrate. .

[0002]

2. Description of the Related Art In recent years, due to the demand for miniaturization, the mounting density, which is the ratio of the area of a mounted component to the area of a board, is approaching 100% for a home digital video camera.
It is saturated. Therefore, in order to realize a mounting density exceeding 100%, a substrate with a built-in electronic component has been proposed. For example, JP-A-57-7147, JP-A-1-17
5296, JP-A-1-175297, JP-A-1-194500, JP-A-2-301183, JP-A-4-96358, JP-A-4-442
96, JP-A-6-45763, JP-A-7-457
297499, JP-A-8-37378, JP-A-8-88471, JP-A-8-139456, JP-A-9-321408, JP-A-9-32
Japanese Patent Application Laid-Open No. 1438, Japanese Patent Application Laid-Open No. 9-32439, and the like have proposed a multilayer electronic component built-in substrate having a mounting density exceeding 100%. Japanese Patent Application Laid-Open No. 3-69191 discloses an electronic component mounted on a body wiring formed on a substrate,
There is disclosed a multilayer electronic component built-in substrate in which an electronic component embedding layer is formed by coating the entire surface with a resin from above, and the electronic component embedding layer thus obtained is laminated via an adhesive.

[0003]

However, in any of the electronic component built-in boards disclosed in Japanese Patent Application Laid-Open No. 57-7147, a recess or an opening is formed in a printed circuit board, and a recess or an opening is formed in the recess or the opening. Since the electronic component is built in, there is a problem that the manufacturing process becomes complicated. On the other hand, the substrate with a built-in electronic component disclosed in Japanese Patent Application Laid-Open No. 3-69191 can be manufactured by simple steps, but it is difficult to reduce the thickness, and the mounting density cannot be sufficiently improved. Had a problem.

Accordingly, the present invention provides an electronic component built-in substrate having a significantly reduced thickness, a multilayer electronic component built-in substrate capable of being significantly reduced in thickness and capable of improving the mounting density, and a simple process. It is an object of the present invention to provide a method for manufacturing an electronic component built-in substrate and a multilayer electronic component built-in substrate capable of manufacturing the same.

[0005]

SUMMARY OF THE INVENTION The object of the present invention is as follows.
At least one electronic component is coated with a resin such that a joint of the at least one electronic component is exposed, and a metal pattern is formed on a surface of the resin where the joint of the at least one electronic component is exposed. This is achieved by a built-in electronic component substrate. According to the present invention, the electronic component built-in board has a structure in which at least one electronic component is covered with a resin such that a joint thereof is exposed, and a metal surface is provided on the resin surface where the joint of the at least one electronic component is exposed. Since the pattern is formed and configured, and the substrate is not provided, the thickness can be significantly reduced.

In a preferred embodiment of the present invention, the surface of the resin at which the joint of the at least one electronic component is exposed is formed flat. According to a preferred embodiment of the present invention, since the surface where the bonding portion of at least one electronic component of the resin is exposed is formed flat, the electronic component built-in substrates are stacked to build a multilayer electronic component having a high mounting density. A substrate can be manufactured.

[0007] In a further preferred aspect of the present invention, the surface of the resin opposite to the surface where the joint of the at least one electronic component is exposed is formed flat. According to a further preferred embodiment of the present invention, at least one
The surface of the resin opposite to the surface where the joint of the two electronic components is exposed is formed flat, so it is possible to laminate electronic component built-in boards and manufacture multilayer electronic component built-in boards with high mounting density Becomes

[0008] In a further preferred aspect of the present invention, the electronic component includes an integrated circuit and a chip component. In a further preferred embodiment of the present invention,
The metal is made of a metal selected from the group consisting of copper, aluminum, silver, gold, platinum and palladium. In a further preferred embodiment of the present invention,
The metal is made of copper.

In a further preferred embodiment of the present invention, the resin is made of a resin selected from the group consisting of an acid anhydride type epoxy resin, a bisphenol type epoxy resin, an alicyclic epoxy resin and a cyanate ester resin. . In a further preferred embodiment of the present invention, the resin contains a filler. According to a further preferred embodiment of the present invention, by adding a filler to the resin, mechanical properties, thermal conductivity, coefficient of thermal expansion,
The resin material can be selected in consideration of cost and the like.

[0010] In a further preferred aspect of the present invention, at least one via is formed in the resin. According to a further preferred embodiment of the present invention, a buried via can be formed at a desired position in the multilayer electronic component built-in substrate by forming a via at a desired position of the electronic component covering, The degree of freedom in designing the electronic component built-in substrate can be improved, and the size of the multilayer electronic component built-in substrate can be reduced.

The above object of the present invention is also achieved by a multilayer electronic component embedded substrate in which two or more electronic component embedded substrates are laminated and bonded. According to the present invention, since the electronic component built-in substrate having no substrate is laminated and bonded to form the multilayer electronic component built-in substrate, the thickness can be significantly reduced. In addition, in the case of a multilayer electronic component built-in substrate having the same thickness, the mounting density can be greatly improved.

In a preferred embodiment of the present invention, the two or more laminated electronic component built-in substrates are made of a material selected from the group consisting of an anisotropic conductive paste, an anisotropic conductive film, and a conductive adhesive. Are bonded to each other. According to the preferred embodiment of the present invention, by forming at least one via at a desired position of the electronic component covering, a buried via can be formed at a desired position in the multilayer electronic component embedded substrate. In addition, it is possible to improve the degree of freedom in designing the multilayer electronic component built-in substrate, and to reduce the size of the multilayer electronic component built-in substrate.

[0013] In a further preferred aspect of the present invention, the two or more electronic component embedded substrates include electronic component embedded substrates having different areas. According to a further preferred embodiment of the present invention, since the electronic component built-in substrates having different areas are stacked, the electronic components can be arranged as desired at any position in the thickness direction, and the design can be improved. The mounting density can be greatly improved while the degree of freedom is improved.

[0014] The object of the present invention is also a multilayer electronic component embedded substrate in which two or more electronic component embedded substrates are laminated and bonded, wherein at least one of the two or more electronic component embedded substrates is the electronic component embedded substrate. This is achieved by a multilayer electronic component built-in board constituted by the component built-in board. According to the present invention, since the multilayer electronic component-embedded substrate includes the electronic component-embedded substrate that does not have at least one substrate, the thickness can be reduced and the same thickness can be achieved. With this multilayer electronic component built-in substrate, the mounting density can be improved.

In a preferred embodiment of the present invention, the two or more laminated electronic component built-in substrates are made of a material selected from the group consisting of an anisotropic conductive paste, an anisotropic conductive film, and a conductive adhesive. Are bonded to each other. According to the preferred embodiment of the present invention, by forming at least one via at a desired position of the electronic component covering, a buried via can be formed at a desired position in the multilayer electronic component embedded substrate. In addition, it is possible to improve the degree of freedom in designing the multilayer electronic component built-in substrate, and to reduce the size of the multilayer electronic component built-in substrate.

In a further preferred aspect of the present invention, the two or more electronic component embedded substrates include electronic component embedded substrates having different areas. According to a further preferred embodiment of the present invention, since the electronic component built-in substrates having different areas are stacked, the electronic components can be arranged as desired at any position in the thickness direction, and the design can be improved. The mounting density can be greatly improved while the degree of freedom is improved.

[0017] The object of the present invention is also to provide a method for manufacturing a semiconductor device comprising:
Positioning at least one electronic component, coating the at least one electronic component with a resin to form an electronic component coating, peeling the electronic component coating from the transfer substrate, and removing the electronic component coating; This is achieved by forming a metal pattern on the peeled surface of the substrate. According to the present invention, since a metal pattern is formed on the peeled surface of the electronic component covering body to manufacture the electronic component built-in substrate,
Just by laminating the electronic component built-in boards thus obtained,
A multilayer electronic component-embedded substrate with a high mounting density can be manufactured, and therefore, a multilayer electronic component-embedded substrate with a high mounting density can be manufactured by a simple process.

In a preferred embodiment of the present invention, the at least one electronic component is positioned and fixed on the transfer substrate by bonding. According to a preferred embodiment of the present invention, the electronic component can be held at a desired position on the transfer substrate until the electronic component is covered with the resin.

[0019] In a further preferred aspect of the present invention, the at least one electronic component is pressed by pressure.
It is positioned and fixed on the transfer substrate. According to a further preferred embodiment of the present invention, the electronic component can be held at a desired position on the transfer substrate until the electronic component is covered with the resin.

In a further preferred aspect of the present invention, the at least one electronic component is pressed and fixed on the transfer substrate by a press-fitting jig. In a further preferred aspect of the present invention, the surface of the press-fitting jig is configured to be poorly wet with the resin. According to a further preferred embodiment of the present invention, the press-fitting jig can be easily pulled out of the resin.

In a further preferred aspect of the present invention, the at least one electronic component is positioned and fixed on the transfer substrate by solder. According to a further preferred embodiment of the present invention,
Until the electronic component is covered, the electronic component can be held at a desired position on the transfer substrate.

In a further preferred aspect of the present invention, the surface of the electronic component coating is polished prior to peeling the electronic component coating from the transfer substrate. According to a further preferred embodiment of the present invention,
The flatness of the surface of the electronic component built-in substrate can be ensured, and the thickness of the electronic component built-in substrate can be reduced.

In a further preferred aspect of the present invention, the electronic component includes an integrated circuit and a chip component. In a further preferred embodiment of the present invention,
The metal is made of a metal selected from the group consisting of copper, aluminum, silver, gold, platinum and palladium. In a further preferred embodiment of the present invention,
The metal is made of copper.

In a further preferred aspect of the present invention, the metal pattern is formed on the peeled surface of the electronic component cover by plating. In a further preferred embodiment of the present invention, the metal pattern is
It is formed on the peeled surface of the electronic component coating by a vapor deposition method. In a further preferred embodiment of the present invention, the vapor deposition method includes sputtering and vapor deposition.

In a further preferred embodiment of the present invention, the resin is made of a resin selected from the group consisting of an acid anhydride type epoxy resin, a bisphenol type epoxy resin, an alicyclic epoxy resin and a cyanate ester resin. . In a further preferred embodiment of the present invention, the resin contains a filler. According to a further preferred embodiment of the present invention, by adding a filler to the resin, mechanical properties, thermal conductivity, coefficient of thermal expansion,
The resin material can be selected in consideration of cost and the like.

[0026] In a further preferred aspect of the present invention, at least one via is formed in the electronic component cover after being separated from the transfer substrate. According to a further preferred embodiment of the present invention, a buried via can be formed at a desired position in the multilayer electronic component built-in substrate by forming a via at a desired position of the electronic component covering, The degree of freedom in designing the electronic component built-in substrate can be improved, and the size of the multilayer electronic component built-in substrate can be reduced.

In a further preferred aspect of the present invention, the electronic component coating is peeled off from the transfer substrate by etching the transfer substrate. According to a further preferred embodiment of the present invention, from the transfer substrate:
Even when it is difficult to peel off the electronic component coating, the transfer substrate can be etched to expose the joint of the electronic component.

The object of the present invention is also achieved by a method of manufacturing a multilayer electronic component built-in substrate in which two or more electronic component built-in substrates manufactured by the method of manufacturing an electronic component built-in substrate are laminated and bonded. According to the present invention, the electronic component built-in substrates having no substrate are laminated and bonded to form the multilayer electronic component built-in substrate, so that the thickness can be significantly reduced. In addition, in the case of a multilayer electronic component built-in substrate having the same thickness, the mounting density can be greatly improved.

In a preferred embodiment of the present invention, the electronic component built-in substrates are bonded to each other by a material selected from the group consisting of an anisotropic conductive paste, an anisotropic conductive film and a conductive adhesive. It is configured.
According to the preferred embodiment of the present invention, by forming at least one via at a desired position of the electronic component covering, a buried via can be formed at a desired position in the multilayer electronic component embedded substrate. In addition, it is possible to improve the degree of freedom in designing the multilayer electronic component built-in substrate, and to reduce the size of the multilayer electronic component built-in substrate.

In a further preferred aspect of the present invention, the two or more electronic component built-in substrates include electronic component built-in substrates having different areas. According to a further preferred embodiment of the present invention, since the electronic component built-in substrates having different areas are stacked, the electronic components can be arranged as desired at any position in the thickness direction, and the design can be improved. The mounting density can be greatly improved while the degree of freedom is improved.

The object of the present invention is also a method of manufacturing a multilayer electronic component built-in substrate for manufacturing a multilayer electronic component built-in substrate by laminating and bonding two or more electronic component built-in substrates. At least one of the electronic component-embedded substrates is constituted by an electronic component-embedded substrate manufactured by the method for manufacturing an electronic component-embedded substrate. According to the present invention, the multilayer electronic component built-in substrate is configured such that at least one of the electronic component built-in substrates constituting the multilayer electronic component built-in substrate is constituted by the electronic component built-in substrate having no substrate. The thickness can be reduced, and the mounting density of the multilayer electronic component built-in substrate having the same thickness can be improved.

In a preferred embodiment of the present invention, the electronic component built-in substrates are bonded to each other by a material selected from the group consisting of an anisotropic conductive paste, an anisotropic conductive film and a conductive adhesive. It is configured.
According to the preferred embodiment of the present invention, by forming at least one via at a desired position of the electronic component covering, a buried via can be formed at a desired position in the multilayer electronic component embedded substrate. In addition, it is possible to improve the degree of freedom in designing the multilayer electronic component built-in substrate, and to reduce the size of the multilayer electronic component built-in substrate.

[0033] In a further preferred aspect of the present invention, the two or more electronic component embedded substrates include electronic component embedded substrates having different areas. According to a further preferred embodiment of the present invention, since the electronic component built-in substrates having different areas are laminated, the electronic components can be arranged as desired at any position in the thickness direction, and the design can be improved. It is possible to greatly improve the mounting density while improving the degree of freedom.

[0034]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. FIGS. 1 to 6 are process diagrams showing a manufacturing process of an electronic component embedded substrate and a multilayer electronic component embedded substrate according to a preferred embodiment of the present invention.

As shown in FIG. 1, first, an integrated circuit 2 and a chip component 3 as electronic components are positioned on a transfer substrate 1 made of stainless steel and having a flat surface. Here, since the electronic component is not bonded to the transfer substrate 1, it is not necessary to use a bonding material such as solder, and in order to prevent the displacement of the integrated circuit 2 and the chip component 3 in the subsequent steps. The integrated circuit 2 is coated on the transfer substrate 1 with an adhesive or by using a double-sided tape or the like.
It is sufficient to fix the chip component 3 at a desired position on the transfer substrate 1. Then, as shown in FIG.
The integrated circuit 2 and the chip component 3 are sealed with the sealing material 4 in the same manner as the resin sealing of the uad flat package (QFP). In the present embodiment, an acid anhydride-based epoxy resin is used as the sealing material 4, and the acid anhydride-based epoxy resin has mechanical properties, thermal conductivity, thermal expansion coefficient, cost, etc. Fillers are added. Further, as shown in FIG. 3, the surface of the sealing material 4 is polished, whereby the flatness is ensured and the thickness of the electronic component built-in substrate is reduced.

Next, as shown in FIG. 4, the sealing material 4 for sealing the integrated circuit 2 and the chip component 3 is peeled off from the transfer substrate 1. If necessary, the peeled surface of the sealing material 4 containing the electronic component is cleaned by a chemical solution or glow discharge, and the joint between the integrated circuit 2 and the chip component 3 is exposed. At this time, a via 5 is formed by a drill (not shown) in a part of the sealing material 4 containing the electronic component.

Further, as shown in FIG. 5, a copper pattern 6 serving as a wiring is formed by plating on the peeled surface of the sealing material 4 containing the electronic component. Thereby, the electronic component built-in substrate 7 is obtained. When the copper pattern 6 is formed by plating, the joint between the integrated circuit 2 and the chip component 3 is activated, so that the joint between the integrated circuit 2 and the chip component 3 is directly formed without using a bonding material such as solder. ,
A copper pattern 6 can be formed. Next, as shown in FIG. 6, in order to increase the mounting density, the electronic component built-in substrate 7 manufactured using the same process is laminated on the electronic component built-in substrate 7 thus obtained, The electronic component-embedded substrate 7 bonded and laminated using the conductive paste is electrically connected by a known method, and the multilayer electronic component-embedded substrate 8 is obtained.

According to this embodiment, the electronic component built-in substrate 7
Is a sealing material 4 containing the integrated circuit 2 and the chip component 3
And a body pattern formed on the peeled surface of the encapsulant 4 from which the transfer substrate 1 has been peeled off. Since there is no substrate, a copper pattern is formed on the substrate, and a copper pattern is formed on the substrate. An electronic component is mounted thereon, and the thickness can be significantly reduced as compared with a conventional electronic component built-in substrate covered with a sealing resin. Further, according to the present embodiment, the multilayer electronic component built-in substrate 8 includes the sealing material 4 containing the integrated circuit 2 and the chip component 3 and the transfer substrate 1 of the sealing material 4.
Is formed by laminating the electronic component built-in substrate 7 having no substrate, which is formed by the body pattern formed on the peeled surface from which the substrate has been peeled off. In the case of the multilayer electronic component built-in substrate 8 having the same thickness, the mounting density can be greatly improved.

Further, according to the present embodiment, the copper pattern 6 is directly formed on the peeled surface of the electronic component built-in substrate 7 by plating to manufacture the electronic component built-in substrate 7, and the thus obtained electronic component built-in substrate 7 is manufactured. The multilayer electronic component built-in board 8 having a high mounting density can be manufactured only by laminating the substrates 7. Therefore, the multilayer electronic component built-in board 8 having a high mounting density can be manufactured by a simple process. Further, according to this embodiment, when the copper pattern 6 is formed by plating, the joint between the integrated circuit 2 and the chip component 3 is activated, so that the multilayer electronic component built-in substrate 8 can be formed without using solder. It can be manufactured and can meet the demands of environmental protection.

Further, according to this embodiment, after the electronic component built-in substrate 7 is peeled off from the transfer substrate 1, the via 5 is formed at a desired position.
Can be formed at desired positions in the multilayer electronic component-embedded substrate 8, and the degree of freedom in designing the multilayer electronic component-embedded substrate 8 can be improved. It is possible to reduce the size. Also,
According to the present embodiment, when the electronic component built-in substrate 7 is peeled off from the transfer substrate 1, the joint between the integrated circuit 2 and the chip component 3, which are the electronic components, is in an exposed state, so that the electronic components are inspected. Thus, the multilayer electronic component embedded substrate 8 can be manufactured by laminating only the electronic component embedded substrates 7 that have passed the inspection, so that the yield of the multilayer electronic component embedded substrate 8 can be greatly improved.

FIG. 7 is a schematic longitudinal sectional view showing a method of inspecting the integrated circuit 2 and the chip component 3 which are electronic components mounted on the electronic component built-in substrate 7. As shown in FIG. 7, an inspection probe 10 used in an in-circuit tester or a function tester is normally applied from the copper pattern 6 side of the electronic component built-in substrate 7 to perform a continuity test or a function test. Conventionally, BallGrid A
ray (BGA) or Chip Size Packa
ge (CSP), etc., the integrated circuit itself has a JTA specified in IEEE1149.1.
It is necessary to provide a test function such as G and perform an inspection together with the inspection by the inspection probe 10. However, in the electronic component built-in board 7 according to the present embodiment, the electronic Since the inspection probe 10 can be applied to the joint between the integrated circuit 2 and the chip component 3, which are components, the component cost can be reduced. Furthermore, since the inspection probe 10 only needs to be applied to the copper pattern 6, there is no need to provide a test pad in the wiring portion.
The electronic component built-in substrate 7 can be reduced in size.

FIGS. 8 to 12 are process diagrams showing a process of a method of manufacturing a substrate with a built-in electronic component according to a preferred embodiment of the present invention. As shown in FIG. 8, first, a transfer substrate 1 made of stainless steel and having a flat surface is
The integrated circuit 2 and the chip component 3, which are electronic components, are positioned. At this time, it is not necessary to use a means for fixing the electronic component such as an adhesive or a double-sided tape.

Next, as shown in FIG. 9, the integrated circuit 2 and the chip component 3 are pressed and fixed on the transfer substrate 1 by the press-fitting jig 15. The press-fitting jig 15 is desirably subjected to a surface treatment that makes the sealing member 4 less wet. Further, as shown in FIG. 10, the integrated circuit 2 and the chip component 3 are sealed with a sealing material 4. In the present embodiment, an acid anhydride-based epoxy resin is used as the sealing material 4, and the acid anhydride-based epoxy resin has mechanical properties, thermal conductivity, thermal expansion coefficient, cost, etc. Fillers are added.

Next, as shown in FIG. 11, the press-fitting jig 15 is extracted. Further, as shown in FIG. 12, the sealing material 4 is sealed in the hole formed as a result of the removal of the press-fitting jig 15. Next, in the same manner as shown in FIG. 3, the surface of the sealing material 4 is polished, and as shown in FIG. 4, the sealing material 4 that seals the integrated circuit 2 and the chip component 3 is The electronic component-embedded substrate 7 is obtained by being separated from the transfer substrate 1. At this time, a via 5 is formed in a part of the electronic component built-in substrate 7 by a drill (not shown).

Further, as shown in FIG. 5, a copper pattern 6 is formed on the peeled surface of the electronic component built-in substrate 7 by plating. At this time, since the joint between the integrated circuit 2 and the chip component 3 is activated, the copper pattern 6 is formed directly on the joint between the integrated circuit 2 and the chip component 3 without using a joining material such as solder. Can be. As shown in FIG. 6, the electronic component built-in substrate 7 manufactured using the same process is laminated on the electronic component built-in substrate 7 thus obtained, and is bonded using an anisotropic conductive paste. Then, electrical connection is established between the laminated electronic component-embedded substrates 7 by a known method, and a multilayer electronic component-embedded substrate 8 is obtained.

According to this embodiment, the electronic component built-in substrate 7
Is a sealing material 4 containing the integrated circuit 2 and the chip component 3
And a body pattern formed on the peeled surface of the encapsulant 4 from which the transfer substrate 1 has been peeled off. Since there is no substrate, a copper pattern is formed on the substrate, and a copper pattern is formed on the substrate. An electronic component is mounted thereon, and the thickness can be significantly reduced as compared with a conventional electronic component built-in substrate covered with a sealing resin. Further, according to the present embodiment, the multilayer electronic component built-in substrate 8 includes the sealing material 4 containing the integrated circuit 2 and the chip component 3 and the transfer substrate 1 of the sealing material 4.
Is formed by laminating the electronic component built-in substrate 7 having no substrate, which is formed by the body pattern formed on the peeled surface from which the substrate has been peeled off. In the case of the multilayer electronic component built-in substrate 8 having the same thickness, the mounting density can be greatly improved.

Further, according to this embodiment, the integrated circuit 2
Further, since the chip component 3 is fixed on the transfer substrate 1 by the press-fitting jig 15 without using an adhesive or a double-sided tape, the transfer substrate 1 and the sealing material 4 are easily peeled off, The component-embedded substrate 7 can be obtained. According to the present embodiment, the copper pattern 6 is directly formed on the peeled surface of the electronic component built-in substrate 7 by plating to manufacture the electronic component built-in substrate 7. The multilayer electronic component built-in substrate 8 having a high mounting density can be manufactured only by laminating, so that the multilayer electronic component built-in substrate 8 having a high mounting density can be manufactured by a simple process.

Further, according to the present embodiment, when the copper pattern 6 is formed by plating, the joint between the integrated circuit 2 and the chip component 3 is activated, so that the multilayer electronic component is incorporated without using solder. The substrate 8 can be manufactured, and it is possible to meet the demand for environmental protection. Further, according to this embodiment, after the electronic component embedded substrate 7 is peeled off from the transfer substrate 1, the via 5 is formed at a desired position, so that the embedded via 5 is formed in the multilayer electronic component embedded substrate 8. Since it can be formed at a desired position, the degree of freedom in designing the multilayer electronic component embedded substrate 8 can be improved, and the multilayer electronic component embedded substrate 8 can be reduced in size.

Further, according to this embodiment, when the electronic component built-in substrate 7 is peeled off from the transfer substrate 1, the joint between the integrated circuit 2 and the chip component 3, which are electronic components, is in an exposed state. The components can be inspected, and only the electronic component embedded substrate 7 that has passed the inspection can be laminated to manufacture the multilayer electronic component embedded substrate 8, so that the yield of the multilayer electronic component embedded substrate 8 is greatly improved. Can be done.

FIG. 13 is a schematic vertical sectional view of a multilayer electronic component built-in substrate 8 according to another embodiment of the present invention. As shown in FIG. 13, the multilayer electronic component built-in board 8 according to the present embodiment is configured by stacking four electronic component built-in boards 7 having different areas. According to this embodiment, since the electronic component built-in substrates 7 having different areas are further laminated, the electronic components can be arranged as desired at any position in the thickness direction, and the design is free. While improving the degree
The mounting density can be greatly improved.

The present invention is not limited to the embodiments described above, and various modifications can be made within the scope of the invention described in the claims, which are also included in the scope of the present invention. It goes without saying that it is a thing. For example, in the above embodiment, the electronic components such as the integrated circuit 2 and the chip component 3 are fixed to the transfer substrate 1 using an adhesive or a double-sided tape, or are fixed using the press-fitting jig 15. However, for the purpose of adhesion to the transfer substrate 1, increase in the area of the joint between the electronic component and the transfer substrate 1, and improvement of the joint with the copper pattern 6, the integrated circuit 2 is formed using a bonding material such as solder. Alternatively, electronic components such as the chip component 3 can be fixed to the transfer substrate 1.

In the above embodiment, the integrated circuit 2 and the chip component 3 are mounted as electronic components, but the electronic component mounted on the electronic component built-in substrate 7 is mounted on the integrated circuit 2 and the chip component 3. Not limited
Other electronic components can be mounted in place of the integrated circuit 2 and the chip component 3 or together with the integrated circuit 2 and the chip component 3. Further, in the above embodiment, stainless steel is used as the transfer substrate 1. However, the transfer substrate 1 may be made of a material that can secure flatness and can withstand mounting, and is limited to stainless steel. is not.

In the above embodiment, the sealing material 4
As the acid anhydride epoxy resin is used, but it is not limited to the acid anhydride epoxy resin, bisphenol type epoxy resin, epoxy resin such as alicyclic epoxy resin, furthermore, cyanate ester resin and the like ,
It can also be used as the sealing material 4. Furthermore, in the above embodiment, the filler is added to the sealing material 4, but it is not always necessary to add the filler to the sealing material 4.

In the above embodiment, the sealing material 4
Is polished, but when sealing electronic components such as the integrated circuit 2 and the chip component 3, if the thickness of the sealing material 4 can be sufficiently reduced and flatness can be ensured, It is not always necessary to polish the sealing material 4. Furthermore, in the above-described embodiment, the sealing material 4 is peeled off from the transfer substrate 1 without using any special means. However, when peeling is difficult, the material of the transfer substrate 1 is selected and transferred. The substrate 1 may be etched to expose the joint between the integrated circuit 2 and the chip component 3.

In the above embodiment, the copper pattern 6 is formed directly on the electronic component built-in substrate 7 by plating. However, the pattern to be formed is not limited to the copper pattern 6. In place of the pattern 6, a metal pattern such as aluminum, silver, gold, platinum, and palladium may be formed. The method of forming the metal pattern is not limited to plating, and a vapor-phase film forming method such as sputtering or vapor deposition is used. You may. Further, in the above embodiment, the electronic component built-in substrate 7 is laminated and bonded using an anisotropic conductive paste, but instead of the anisotropic conductive paste, an anisotropic conductive film, a conductive bonding The electronic component built-in substrate 7 may be adhered by an agent or the like.

In the above embodiment, the via 5 is formed in the electronic component built-in substrate 7. However, if only the through via is formed without forming the embedded via in the multilayer electronic component built-in substrate 8, It is not always necessary to form the vias 5 in the electronic component built-in substrate 7, and the laminated electronic component built-in substrate 7 can be bonded with a non-conductive material. Further, in the above embodiment, the via 5 is formed by using a drill, but the via 5 can be formed by a laser.

In the above embodiment, the multilayer electronic component built-in board 8 is manufactured by laminating only the electronic component built-in board 7 manufactured according to the present invention. An electronic component built-in board manufactured by another method may be stacked on the component built-in board 7, and a wiring board such as a glass epoxy board or a flexible board made of polyimide which is usually used can also be stacked. Further, in the embodiment shown in FIGS. 1 to 6, two electronic component built-in substrates 7 are stacked,
In the example shown in FIG. 13, four electronic component embedded substrates 7 are stacked to form a multilayer electronic component embedded substrate 8. However, the number of electronic component embedded substrates 7 to be stacked is arbitrarily determined. be able to.

In the embodiment shown in FIGS. 8 to 12, the press-fitting jig 15 is subjected to a surface treatment that makes the sealing material 4 less wet.
Depending on the material, it is not always necessary to perform a surface treatment that deteriorates the wettability with the sealing material 4.

[0059]

According to the present invention, a substrate with a built-in electronic component which is greatly reduced in thickness, a multilayer substrate with a built-in electronic component which can be significantly reduced in thickness and can be mounted at a higher density, and a simple process. Thus, it is possible to provide a method for manufacturing an electronic component-embedded substrate and a multilayer electronic component-embedded substrate capable of manufacturing them.

[Brief description of the drawings]

FIG. 1 is a process diagram showing a manufacturing process of an electronic component embedded substrate and a multilayer electronic component embedded substrate according to a preferred embodiment of the present invention.

FIG. 2 is a process diagram showing a manufacturing process of an electronic component embedded substrate and a multilayer electronic component embedded substrate according to a preferred embodiment of the present invention.

FIG. 3 is a process chart showing a manufacturing process of an electronic component embedded substrate and a multilayer electronic component embedded substrate according to a preferred embodiment of the present invention.

FIG. 4 is a process diagram showing a manufacturing process of the electronic component embedded substrate and the multilayer electronic component embedded substrate according to the preferred embodiment of the present invention.

FIG. 5 is a process diagram showing a manufacturing process of the electronic component embedded substrate and the multilayer electronic component embedded substrate according to the preferred embodiment of the present invention, and shows a state where the electronic component embedded substrate is generated.

FIG. 6 is a process diagram showing a manufacturing process of the electronic component embedded substrate and the multilayer electronic component embedded substrate according to the preferred embodiment of the present invention, and shows a state in which the multilayer electronic component embedded substrate is generated. .

FIG. 7 is a schematic longitudinal sectional view showing a method of inspecting an electronic component mounted on an electronic component built-in board.

FIG. 8 is a process chart showing a manufacturing process of an electronic component built-in substrate according to another preferred embodiment of the present invention.

FIG. 9 is a process chart showing a manufacturing process of an electronic component built-in substrate according to another preferred embodiment of the present invention.

FIG. 10 is a process chart showing a manufacturing process of an electronic component built-in substrate according to another preferred embodiment of the present invention.

FIG. 11 is a process chart showing a manufacturing process of a substrate with a built-in electronic component according to another preferred embodiment of the present invention.

FIG. 12 is a process chart showing a manufacturing process of a substrate with a built-in electronic component according to another preferred embodiment of the present invention.

FIG. 13 is a schematic longitudinal sectional view of a multilayer electronic component-embedded substrate according to another embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Transfer board 2 Integrated circuit 3 Chip component 4 Encapsulation material 5 Via 6 Copper pattern 7 Electronic component built-in board 8 Multilayer electronic component built-in board 10 Inspection probe 15 Press-in jig

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H05K 3/46 H05K 3/46 LGNT F term (Reference) 4E351 AA01 BB01 BB17 BB18 BB26 BB27 BB49 CC01 CC03 CC06 DD04 DD05 DD06 DD10 DD20 GG11 5E336 AA04 AA14 AA16 BB02 BB03 BB16 BC12 BC15 BC34 CC31 CC52 CC53 CC58 GG30 5E346 AA02 AA05 AA12 AA15 AA16 AA22 AA43 BB01 CC09 CC12 CC42 DD03 DD22 DD33 EE12 EE17 EE12 EE12 EE12 EE12 EE12 EE12 EE12 EE12 EE02 EE02 GG HH25

Claims (38)

[Claims] At least one electronic component is coated with a resin such that a joint of the at least one electronic component is exposed, and a surface of the resin at which the joint of the at least one electronic component is exposed, An electronic component built-in substrate having a metal pattern formed thereon. 2. The electronic component built-in substrate according to claim 1, wherein a surface of the resin at which a joint portion of the at least one electronic component is exposed is formed flat. 3. The electronic component built-in substrate according to claim 1, wherein a surface of the resin opposite to a surface where a joint portion of the at least one electronic component is exposed is formed flat. 4. The electronic component built-in substrate according to claim 1, wherein the electronic component includes an integrated circuit and a chip component. 5. The method according to claim 1, wherein the metal is copper, aluminum, silver,
5. The method according to claim 1, wherein said metal is made of a metal selected from the group consisting of gold, platinum and palladium.
Electronic component built-in substrate according to any one of the above 6. The electronic component built-in substrate according to claim 5, wherein said metal is made of copper. 7. The resin according to claim 1, wherein the resin is an acid anhydride epoxy resin,
The electronic component built-in substrate according to any one of claims 1 to 6, wherein the substrate is made of a resin selected from the group consisting of a bisphenol-type epoxy resin, an alicyclic epoxy resin, and a cyanate ester resin. 8. The electronic component built-in substrate according to claim 1, wherein the resin contains a filler. 9. The electronic component built-in substrate according to claim 1, wherein at least one via is formed in said resin. 10. A multilayer electronic component built-in substrate, wherein two or more electronic component built-in substrates according to claim 1 are laminated and bonded. 11. The two or more laminated electronic component built-in substrates are bonded to each other by a material selected from the group consisting of an anisotropic conductive paste, an anisotropic conductive film, and a conductive adhesive. The multilayer electronic component built-in substrate according to claim 10, wherein: 12. The two or more electronic component built-in substrates,
The multilayer electronic component built-in substrate according to claim 10, comprising electronic component built-in substrates having different areas. 13. A multilayer electronic component built-in substrate in which two or more electronic component built-in substrates are laminated and bonded, wherein
2. The method according to claim 1, wherein at least one of the at least one electronic component built-in substrate is provided.
A multilayer electronic component built-in substrate constituted by the electronic component built-in substrate according to any one of (1) to (9). 14. The two or more laminated electronic component built-in substrates are bonded to each other by a material selected from the group consisting of an anisotropic conductive paste, an anisotropic conductive film, and a conductive adhesive. The multilayer electronic component built-in substrate according to claim 13, wherein: 15. The two or more electronic component built-in substrates,
The multilayer electronic component built-in substrate according to claim 13, further comprising electronic component built-in substrates having different areas. 16. A method for positioning at least one electronic component on a transfer substrate, coating the at least one electronic component with a resin to form an electronic component coating, and forming the electronic component coating from the transfer substrate. A method of manufacturing a substrate with a built-in electronic component, comprising peeling a body and forming a metal pattern on the peeled surface of the electronic component coating. 17. The method according to claim 16, wherein the at least one electronic component is positioned and fixed on the transfer substrate by bonding. 18. The method according to claim 16, wherein the at least one electronic component is positioned and fixed on the transfer substrate by applying pressure. 19. The at least one press-fitting jig,
19. The method of manufacturing an electronic component built-in substrate according to claim 18, wherein the two electronic components are fixed on the transfer substrate by pressing. 20. The method according to claim 19, wherein a surface of the press-fitting jig is configured to have poor wettability with the resin. 21. The method according to claim 16, wherein the at least one electronic component is positioned and fixed on the transfer substrate by soldering. 22. The method according to claim 16, wherein the surface of the electronic component cover is polished prior to peeling the electronic component cover from the transfer substrate. 3. The method for manufacturing an electronic component-embedded substrate according to claim 1. 23. The method of manufacturing an electronic component built-in substrate according to claim 16, wherein said electronic component includes an integrated circuit and a chip component. 24. The method according to claim 14, wherein the metal is copper, aluminum, silver,
24. The method according to claim 16, wherein the substrate is made of a metal selected from the group consisting of gold, platinum and palladium. 25. The method according to claim 24, wherein the metal is made of copper. 26. The production of a substrate with a built-in electronic component according to claim 16, wherein the pattern of the metal is formed on the peeled surface of the coating of the electronic component by plating. Method. 27. The electronic component according to claim 16, wherein the metal pattern is formed on the peeled surface of the electronic component coating by a vapor deposition method. Manufacturing method of embedded substrate. 28. The method according to claim 27, wherein the vapor deposition method includes sputtering and vapor deposition. 29. The resin according to claim 16, wherein the resin is made of a resin selected from the group consisting of an acid anhydride type epoxy resin, a bisphenol type epoxy resin, an alicyclic epoxy resin and a cyanate ester resin.
29. The method of manufacturing an electronic component-embedded substrate according to any one of items 28 to 28. 30. The method of manufacturing an electronic component built-in substrate according to claim 16, wherein the resin contains a filler. 31. The electronic component built-in substrate according to claim 16, wherein at least one via is formed in the electronic component cover after being peeled off from the transfer substrate. Production method. 32. The electronic component built-in substrate according to claim 16, wherein the electronic component coating is peeled off from the transfer substrate by etching the transfer substrate. Production method. 33. An electronic component-embedded substrate manufactured by the method according to claim 16,
A method for manufacturing a multilayer electronic component built-in substrate, comprising laminating and bonding two or more substrates. 34. The electronic device according to claim 33, wherein the electronic component built-in substrates are bonded to each other with a material selected from the group consisting of an anisotropic conductive paste, an anisotropic conductive film, and a conductive adhesive. The manufacturing method of the multilayer electronic component built-in board | substrate of said description. 35. The two or more electronic component built-in substrates,
35. The multilayer electronic component built-in substrate according to claim 33, further comprising electronic component built-in substrates having different areas. 36. A method of manufacturing a multilayer electronic component built-in substrate in which two or more electronic component built-in substrates are laminated and bonded to manufacture a multilayer electronic component built-in substrate. Claims 16 to 3
3. A multilayer electronic component built-in substrate constituted by the electronic component built-in substrate manufactured by the method according to any one of 2. 37. The electronic component built-in substrate is bonded to each other with a material selected from the group consisting of an anisotropic conductive paste, an anisotropic conductive film and a conductive adhesive. The manufacturing method of the multilayer electronic component built-in board | substrate of said description. 38. The two or more electronic component built-in substrates,
38. The multilayer electronic component-embedded substrate according to claim 36, further comprising electronic component-embedded substrates having different areas.