JP2000338935A - Gradation correction device, image display device and gradation correction method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a capacity of a RAM for memorizing conversion image data D' used in gradation correction. SOLUTION: In this image display device, higher-rank image data corresponding to a higher-rank bit of input image data Din are given an increment as much as one by an adder 201. The higher-rank image data Da and output data of the adder 201 are supplied to a RAM 203 through a switch 202 as address data. The RAM 203 memorizes conversion image data D' extracted at intervals of a lower-rank bit from among the conversion image data D' determined beforehand relative to each data value of the input image data Din, corresponding to each data value taken by higher-rank gradation data. An interpolation circuit 205 generates correction image data Dout based on the conversion image data D' read out from the RAM 203 and lower-rank image data Db.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gradation correcting apparatus for correcting gradation data indicating gradation of an image using conversion data predetermined for each data value, and an image display using the same. The present invention relates to an apparatus and a gradation correction method.

[0002]

2. Description of the Related Art In a liquid crystal display device using an active matrix, a gradation correction circuit is used to correct transmittance characteristics (VT characteristics) and gamma characteristics with respect to a voltage applied to a liquid crystal. As a method of gradation correction, a method of amplifying an analog image signal with a log amplifier to have a non-linear characteristic, a method of performing an arithmetic operation on a digital image signal, or a digital image signal using a look-up table including a memory. There is known a device that converts a signal into a signal suitable for liquid crystal display characteristics.

[0003] Among them, those using a look-up table store conversion values in a look-up table corresponding to each gradation value of a digital image signal, and look up using the gradation value of the input digital image signal as an address. The data is supplied to an up table and the converted value is read. If the digital image signal is represented by, for example, 8 bits and performs image display in three primary colors, the memory capacity of the lookup table requires 768 (= 256 × 3) bytes.

Japanese Patent Application Laid-Open No. 5-64110 discloses a technique for correcting uneven brightness and gamma characteristics using a look-up table in a large-screen liquid crystal display device. In this technique, a display area on a liquid crystal panel is divided into a plurality of blocks, and a lookup table is provided for a representative one of the plurality of blocks,
For a block having no corresponding lookup table, an interpolation process is performed based on the correction data stored in a nearby lookup table, and correction data is generated for a desired block. According to this technique, it is not necessary to provide a look-up table for each block, so that the memory capacity can be reduced.

[0005]

However, the above-described technique aims at reducing the number of lookup tables in a large-screen liquid crystal display device that requires correction of luminance unevenness. Was. For this reason, the memory capacity of the look-up table itself cannot be reduced, and the ordinary liquid crystal display device still requires a large-capacity look-up table, and reducing the storage capacity has been a major problem.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a tone correction device suitable for reducing storage capacity and an image display device using the same.

[0007]

In order to achieve the above object, a gradation correcting apparatus according to the present invention converts a part of conversion data determined in advance for each data value of gradation data indicating the gradation of an image. The gradation data is subjected to gradation correction to generate corrected gradation data. The inputted gradation data is divided into upper bits and lower bits to form upper gradation data and lower gradation data. Dividing means for respectively generating gradation data; and storage for storing the conversion data extracted at intervals of the lower bits from all the conversion data in association with each possible data value of the higher gradation data. Means for reading a plurality of the conversion data from the storage means based on the upper gradation data; and interpolating the plurality of conversion data read by the reading means based on the lower gradation data. Performance The subjected, characterized in that it comprises an interpolation means for generating the corrected grayscale data.

According to this configuration, the storage means stores the converted data extracted at the interval of the lower bits from all the converted data. Therefore, if the number of lower bits is X, all the converted data are stored. In comparison, the storage capacity of the storage means can be reduced to 1 / X power.
In addition, since the conversion data is stored in the storage unit every 2 to the power of X, the conversion data corresponding to the storage unit may not be stored depending on the data value of the input gradation data. Since the interpolation means generates corrected gradation data by performing an interpolation operation on the plurality of conversion data read from the storage means, gradation correction can also be performed on such gradation data.

Further, the tone correction apparatus of the present invention uses a part of the conversion data predetermined for each data value of the tone data indicating the tone of an image to perform tone correction on the tone data. And dividing means for dividing the input gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively. A storage unit for storing the converted data extracted from the converted data at the interval of the lower bit in association with each possible data value of the upper grayscale data, and based on the upper grayscale data. Reading means for reading, from the storage means, first converted data corresponding to the data value of the upper gradation data and second converted data corresponding to a data value obtained by incrementing the data value by one; Based on the data, it may be provided with an interpolation means for generating a corrected grayscale data by performing an interpolation operation on the first and second converted data read by the reading unit.

According to this configuration, even if the conversion data (object conversion data) corresponding to a certain gradation data is not stored in the storage means, the conversion data corresponding to the upper bit of the gradation data is stored in the first data. The conversion data is read out, and the conversion data next to the conversion data is read out as the second conversion data. That is, from the conversion data stored in the storage means, data corresponding to the data before and after the target conversion data is read as the first and second conversion data. In addition, the lower gradation data is the first gradation data.
And the interval of the target conversion data from the second conversion data, the target conversion data can be generated as corrected gradation data by the interpolation means.

In the above-mentioned gradation correcting apparatus, the reading means includes step-by-step means for generating step-by-step data by incrementing the data value of the upper gradation data by one.
Preferably, during one sampling period of the gradation data, the first and second conversion data are read out from the storage means in a time-division manner based on the higher-order gradation data and the step data. In this case, since the first and second converted data are read out in a time-sharing manner, there is no need to separately provide a storage unit according to the first and second converted data.

Further, the gradation correcting apparatus of the present invention uses the part of the conversion data predetermined for each data value of the gradation data indicating the gradation of an image to perform gradation correction on the gradation data. And dividing means for dividing the input gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively. Stepping means for generating stepping data in which the data value of the upper gradation data is incremented by 1;
First storage means for storing the conversion data extracted at intervals of the lower bits from all the conversion data in association with each possible data value of the upper gradation data,
A second storage unit having the same storage content as the first storage unit, and reading out the first conversion data corresponding to the data value of the upper gradation data from the first storage unit, Reading means for reading out second conversion data corresponding to the data value of the step data from the storage means, and the first and second conversion means read out by the reading means based on the lower gradation data. It is desirable to include an interpolating means for performing an interpolation operation on the data to generate corrected gradation data.

According to this configuration, since the second storage means having the same storage content as the first storage means is provided, the first storage means is provided.
The second converted data can be read from the second storage means in parallel with the reading of the first converted data from the storage means. Therefore, even if the transfer speed of the gradation data is increased, the access time of the first and second storage units can be given a margin. Conversely, inexpensive ones with slow access times can be used as the first and second storage means.

Further, the gradation correcting apparatus of the present invention uses a part of the conversion data predetermined for each data value of the gradation data indicating the gradation of an image to perform gradation correction on the gradation data. And dividing means for dividing the input gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively. Stepping means for generating stepping data in which the data value of the upper gradation data is incremented by 1;
First storage means for storing the conversion data extracted at intervals of the lower bits from all the conversion data in association with each possible data value of the upper gradation data,
A second storage means for storing the conversion data stored in a storage area corresponding to an address obtained by advancing the address by one in the first storage means in a storage area corresponding to a certain address; And supplying readout data to the first and second storage means as address data to read out the first conversion data from the first storage means and read out the second conversion data from the second storage means. Means, and interpolating means for performing an interpolation operation on the first and second conversion data read by the reading means based on the lower-order gradation data to generate corrected gradation data. .

According to this configuration, since the storage content of the second storage means is different from the storage content of the first storage means in the address value by one, the upper gradation data is stored in the first storage means. And conversion data (target conversion data) corresponding to certain gradation data is stored before and after the target conversion data even if the conversion data (target conversion data) is not stored in the first and second storage means. Is read as the first and second converted data. Therefore, the stepping means for generating the stepping data can be omitted, and the configuration can be simplified.

Further, according to the tone correcting apparatus of the present invention, a tone correction is performed on the tone data by using a part of the conversion data predetermined for each data value of the tone data indicating the tone of the image. And dividing means for dividing the input gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively. First and second storage means for alternately storing a part of the converted data in association with each possible data value of the upper grayscale data at intervals of the lower bit, A first conversion data corresponding to the data value of the upper gradation data and a second conversion data corresponding to a data value obtained by incrementing the data value by 1 from the first storage means and the second storage means. Read the converted data and Reading means, and interpolating means for performing an interpolation operation on the second and second converted data read by the reading means based on the lower-order gradation data to generate corrected gradation data. Features.

According to this configuration, the first storage means and the second storage means
In the storage means, a part of the conversion data is alternately stored at intervals of lower bits in association with each possible data value of the upper gradation data. Therefore, if the number of lower bits is X, the total storage capacity of the first and second storage means is 2 compared to the case of storing all conversion data.
To the X-th power. Furthermore, the first
The second conversion data can be read from the second storage means in parallel with the reading of the first conversion data from the storage means, so that there is a margin in the access time of the first and second storage means. You can have.

In this case, the first storage means stores the converted data corresponding to the gradation data in which the least significant bit value of the upper bit is 0 and each bit value of the lower bit is 0. The second storage means stores the conversion data respectively corresponding to the gradation data in which the least significant bit value of the upper bit is 1 and each bit value of the lower bit is 0. Is preferred.

Further, according to the gradation correcting apparatus of the present invention, a gradation correction is performed on the gradation data by using a part of the conversion data predetermined for each data value of the gradation data indicating the gradation of the image. And dividing means for dividing the input gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively. First storage means for storing a part of the conversion data in association with each possible data value of the upper gradation data at intervals of the lower bit, and conversion data corresponding to a certain higher gradation data. A second storage for storing difference conversion data indicating a difference value from conversion data corresponding to data in which the data value of the upper gradation data differs by 1 in association with each possible data value of the upper gradation data; Means and the upper floor Reading means for reading conversion data and difference conversion data corresponding to the data value of the upper gradation data from the first storage means and the second storage means based on the data; And interpolating means for performing an interpolation operation on the converted data and the difference converted data read by the reading means based on the read data to generate corrected gradation data.

According to this configuration, it is possible to simplify the configuration of the entire gradation correction apparatus without significantly increasing the storage capacity, and to have a margin in the access time of the first and second storage units. It is possible to make it.

Next, an image display device according to the present invention includes the above-described tone correction device, and an image display unit for displaying an image based on the corrected tone data output from the tone correction device. It is characterized by. Here, the image display unit includes:
It is provided with a liquid crystal panel, wherein the conversion data,
The liquid crystal panel is preferably used to correct at least one of a transmittance characteristic and a gamma characteristic with respect to an applied voltage.

Further, the present invention can be understood as a gradation correction method. This gradation correction method performs gradation correction on the gradation data by using a part of conversion data predetermined for each data value of gradation data indicating the gradation of an image, The input grayscale data is divided into upper bits and lower bits to generate upper grayscale data and lower grayscale data, respectively, and is extracted from all the conversion data at intervals of the lower bit. The conversion data is stored in the storage unit in association with each possible data value of the upper gradation data, a plurality of the conversion data are read from the storage unit based on the upper gradation data, and the conversion data is converted into the lower gradation data. An interpolation operation is performed on the plurality of conversion data based on the conversion data to generate the corrected gradation data.

According to this configuration, since the converted data extracted from the converted data at intervals of lower bits is stored in the storage unit, all converted data are stored if the number of bits of the lower bits is X. In comparison with the case, the storage capacity of the storage unit can be reduced to 1 / X 2. Further, even when the conversion data corresponding to the data value of the input gradation data is not stored, the correction gradation data is generated by performing the interpolation operation on the plurality of conversion data read from the storage unit. Can be.

[0024]

Embodiments of the present invention will be described below with reference to the drawings. Note that gradation correction generally means, in a narrow sense, a transmittance characteristic (VT) to a voltage applied to a liquid crystal.
Characteristics) and gamma characteristics, and in a broad sense means gradation-gradation conversion required in image processing. The gradation correction of the present embodiment is used to mean the correction of the VT characteristic and the gamma characteristic. However, the present invention is not limited to this, and can be applied to the gradation-gradation conversion required for image processing. Applicable.

<1. First Embodiment><1-1. Outline of Liquid Crystal Device> FIG. 1 is a block diagram showing an overall configuration of a liquid crystal device according to an embodiment of the present invention.
As shown in FIG. 1, the liquid crystal device 1 serves as an image processing device. The A / D converter 10 converts an input image signal from an analog signal to a digital signal and outputs it as input image data Din. A tone correction unit 20 that performs tone correction to generate corrected image data Dout, a D / A converter 30 that converts the corrected image data Dout from a digital signal to an analog signal, and outputs it as a corrected image signal Vout, and an input image signal And a ROM 60 storing various converted image data D ′ used for gradation correction. A liquid crystal display device 70 is provided as a unit. In this example, the number of bits of the input image data Din and the number of bits of the corrected image data Dout are both represented by 8 bits.

Here, the liquid crystal display device 70 includes a plurality of scanning lines and a plurality of data lines, and includes pixel electrodes and switching elements arranged in a matrix corresponding to intersections of the scanning lines and the data lines. It has a liquid crystal panel, a data line driving circuit, a scanning line driving circuit, and the like for supplying data line signals, scanning signals, and the like to data lines, scanning lines, and the like at predetermined timing.

The gradation correction unit 20 has a RAM as described later, and the converted image data D 'read from the ROM 60 is loaded therein. The data value of the converted image data D ′ is set so as to show the result of correcting the VT characteristic and the gamma characteristic corresponding to the data value of the input image data Din. When the data value of the input image data Din is x, the data value of the converted image data D ′ is determined by a function using x as a variable. Hereinafter, the function is described as f (x).

However, the converted image data D 'is not always prepared for all the data values of the input image data Din, but is a discrete data value (in this example, one out of four data values).
Are prepared in advance. For this reason, the gradation correction unit 20 calculates the converted image data D ′ in the middle between the certain converted image data D ′ and the next converted image data D ′ by interpolation, and outputs it as corrected image data Dout. ing.

<1-2. Next, the configuration of the gradation correction unit 20 will be described. FIG. 2 is a block diagram of the gradation correction unit 20. As shown in this figure, in the gradation correction unit 20, the input image data Din
Is divided into its upper 6 bits (hereinafter referred to as upper image data Da) and its lower 2 bits (hereinafter referred to as lower image data Db).

The gradation correction unit 20 includes an adder 201 for incrementing the data value of the upper image data Da by "1", a switch 202 for selecting the upper image data Da and the output data of the adder 201, The RAM 203 stores the data D ′, inputs the output data of the switch 202 as address data, and outputs the corresponding converted image data D ′.
And an interpolation circuit 205 that performs interpolation on the two converted image data D ′ based on the lower-order image data Db to generate corrected image data Dout.

FIG. 3 shows the contents stored in the RAM 203. As shown in this figure, the RAM 203 stores converted image data f (4n) corresponding to the input image data value 4n in a storage area designated by an address value n (n is an integer from 0 to 64). I have. That is, the RAM 203
Are input image data values x = 0, 4, 8,.
The converted image data D ′ corresponding to n,..., 256 are stored. For this reason, the storage capacity of the RAM 203 is reduced by approximately 1 /
It is possible to reduce to 4.

Since the input image data Din is 8-bit data that can take data values of 0 to 255, the input image data value x = 256 does not actually exist. However, the input image data value x = 253, 25
In order to calculate the converted image data D ′ corresponding to 4,255, the converted image data f (256) corresponding to the input image data value x = 256 is required.
203.

In the above configuration, the input image data Din
Is supplied to the tone correction unit 20, the input image data Din is divided into upper image data Da and lower image data Db. Here, the data value of the upper image data Da is represented by k, and the data value of the lower image data Db is represented by j. In this case, the data value x of the input image data Din is x
= 4k + j.

The upper image data Da is supplied to the adder 201 and the switch 202. Switch 202 is 1
While the upper image data [k] is selected in the first half of the sampling period, the output data of the adder 201 is selected in the second half of the period.
Select [k + 1]. Therefore, the upper image data [k] is supplied to the RAM 203 as address data in the first half of one sampling period. Then, the corresponding converted image data f (4k) is read out, and the latch circuit 204
For one sampling period. On the other hand, in the latter half of one sampling period, the output data [k +
[1] is supplied to the RAM 203, and the corresponding converted image data f (4k + 4) is read. That is, in this example, during one sampling period of the input image data Din, two pieces of converted image data D ′ are read out from the RAM 203 in a time-division manner based on the upper image data Da and the output data of the adder 201. ing.

The interpolation circuit 205 stores lower-order image data
[j] is supplied, and the lower-order image data [j] and f (4
The corrected image data Dout is generated based on k) and f (4k + 4).

Here, the interpolation method of the interpolation circuit 205 will be described with reference to FIG. FIG. 4 shows input image data D
It is a graph which shows the relationship between the data value of in and the data value of conversion image data D '. The black circles indicate RA
This is the actual data stored in M203, and the data indicated by the crosses is the data to be calculated by interpolation.

As shown in this example, the input image data value is 4k +
j, the data value f (4k + j) to be calculated by the interpolation operation is f (4k) and f (4k + 4)
Is given by the following equation (1).

F (4k + j) = {j · f (4k + 4) + (4-j) · f (4k)} / 4 Equation (1) That is, linear interpolation is calculated according to the ratio of the internal components. .

For example, the data value of the input image data Din
If [4k + j] is “0101010001” (81), the data value [k] of the upper image data Da is “0101”.
00 ”(20), and the data value of the lower image data Db
[j] becomes “01” (1). In the first half of the sampling period, upper image data “010100” (k = 2
0) is supplied to the RAM 203 as address data,
The converted image data f (80) corresponding to 4k = 80 is read. In the latter half of the sampling period, “010101” (k + 1 = 21) obtained by incrementing the upper image data “010100” by “1” is supplied to the RAM 203 as an address, and the converted image data f (84) corresponding to 4k + 4 = 84 ) Is read. After that, the interpolation circuit 205 calculates the interpolation data f (81) by executing the following calculation according to the equation (1).

F (80 + 1) = ｛f (84) + 3 · f
(80)｝ / 4 <1-3. Interpolation Circuit> Next, regarding the interpolation circuit 205,
This will be described in more detail. Interpolation circuit 20 executing equation (1)
5 is a functional block diagram of FIG. First, when the lower image data [j] is supplied to the subtractor 211, (4-j) is calculated, and the calculation result (4-j) is obtained in the multiplier 212.
Is multiplied by f (4k) to obtain (4-j) · f (4k). Further, the multiplier 213 outputs the lower image data j and f
(4k + 4) and outputs j · f (4k + 4). Next, multipliers 212 and 21 are added by adder 214.
3 are added, and j · f (4k + 4) + (4
−j) · f (4k) is obtained, and then the bit shifter 215
As a result, a two-bit bit shift is performed, whereby the operation of “$ 4” is executed. In general, a divider has a large circuit size. In this example, however, since division by a factorial of 2 is performed, division can be performed by bit shifting. Here, the divisor “4” is f (4k) and f (4k +
4), that is, when the number of bits of the lower-order image data Db is Y, it is 2 to the power of Y. Therefore, the input image data Din is divided into upper bits and lower bits, and the converted image data D ′ corresponding to the upper bits is stored as actual data, and one converted image data D ′ and the next converted image data D ′ When the intermediate data is calculated by interpolation, the circuit configuration of the interpolation circuit can be simplified.

In the functional block shown in FIG. 5, multiplication is performed using the multipliers 212 and 213, but the multiplier generally has a large circuit scale. Therefore, a circuit configuration that does not use a multiplier is desirable. FIG. 6 is a block diagram of an interpolation circuit that does not use a multiplier. As shown in the figure, the interpolation circuit 205 includes bit shifters 221 and 223 that perform a 1-bit bit shift in the lower bit direction, and a bit shifter 22 that performs a 2 bit bit shift in the lower bit direction.
2, 224, adders 225, 226, 227 and a selection circuit 228.

Here, the outputs of the adders 225, 226 and 227 are given by the following equations (2) to (4).

1) Output of Adder 225 f (4k) / 2 + f (4k) / 4 + f (4k + 4) / 4 = {3 · f (4k) + f (4k + 4)} / 4 Equation (2) ), The output of the adder 225 is f (4k) and f (4k)
Since (4k + 4) is synthesized at a ratio of 3: 1, it corresponds to f (4k + 1) (j = 1).

2) Output of adder 226 f (4k) / 2 + f (4k + 4) / 2 = {2 · f (4k) + 2 · f (4k + 4)} / 4 Addition from equation (3) The output of the unit 226 is f (4k) and f (4k)
Since (4k + 4) and (4k + 4) are synthesized at a ratio of 1: 1, it corresponds to f (4k + 2) (j = 2).

3) The output of the adder 227 is given by the following equation (4).

F (4k) / 4 + f (4k + 4) / 2 + f (4k + 4) / 4 = {f (4k) + 3 · f (4k + 4)} / 4 (4) The output of the adder 227 from equation (4) Are f (4k) and f
Since (4k + 4) is synthesized at a ratio of 1: 3, it corresponds to f (4k + 3) (j = 3).

As described above, the adders 225, 226, 22
7 correspond to j = 1, 2, 3 respectively, and f
Since (4k) corresponds to j = 0, lower image data [j]
By selecting f (4k) and each output of the adders 225, 226, and 227 according to the above, interpolation data can be obtained. The selection circuit 228 is provided for this purpose, and selects each input data based on the lower-order image data [j] and outputs it as corrected image data Dout. Specifically, when j = 0, f (4k) is used, and when j = 1, the adder 22 is used.
5, j = 2, adder 226, j = 3
Then, the output of the adder 227 is selected. This allows
Corrected image data Dout is generated. In this example, since the interpolation circuit 205 is configured without using a multiplier, the circuit scale of the interpolation circuit 205 can be significantly reduced. The circuit configuration can be further simplified by providing the selection circuit after the bit shifters 221 to 224 and adding the outputs of the selection circuits by one adder.

<2. Second Embodiment> In the above-described first embodiment, the upper image data is stored in one RAM 203.
The converted image data f (4k) corresponding to [k] and the converted image data f (4k + 4) corresponding to [k + 1] obtained by incrementing the higher-order image data [k] by 1 are read during one sampling period. Therefore, the input image data D
If the transfer rate of in becomes high, the access time of the RAM 203 may not be able to keep up. Conversely, if a high transfer rate is to be supported, it is necessary to use a RAM with a short access time as the RAM 203, which causes disadvantages such as an increase in product cost and an increase in power consumption.

The second embodiment has been made in view of these points, and provides a liquid crystal device which can operate sufficiently even when the transfer rate of the input image data Din is high by using two RAMs. Is what you do.

The liquid crystal device according to the second embodiment has the same configuration as the liquid crystal device according to the first embodiment shown in FIG. 1 except for the detailed configuration of the gradation correction unit. Hereinafter, the gradation correction unit 21 according to the second embodiment will be described. FIG.
It is a block diagram showing the composition of the gradation correction unit 21 concerning a 2nd embodiment. The gradation correction unit 21 is a RAM 2
The difference from the gradation correction unit 20 of the first embodiment shown in FIG. 2 is that the RAMs 203a and 203b are used instead of the 03 and the switch 202 and the latch circuit 204 are omitted.

Here, the RAM 203a and the RAM 20
The storage content of 3b is the same as that of the RAM 203 of the first embodiment. As shown in FIG. 3, the input image data value 4n is stored in a storage area indicated by an address value n (n is an integer from 0 to 64). The corresponding converted image data f (4n) is stored. That is, the RAM 203 stores the conversion image data D ′ corresponding to the input image data values x = 0, 4, 8,..., 4n,. In this case, the storage capacity of the RAM 203a and the RAM 203b is twice as large as that of the first embodiment, but compared with the case of storing the converted image data D ′ corresponding to all the gradation values,
The storage capacity can be reduced by half.

In the above configuration, upper image data [k]
Is supplied as address data to the RAM 203a, the converted image data f (4k) is read from the RAM 203a. In parallel with this, when the upper image data [k + 1] whose data value is incremented by “1” via the adder 201 is supplied to the RAM 203b, the converted image data f (4k + 4) is read. That is, in this example, instead of using one RAM in a time-division manner as in the first embodiment and reading out two pieces of converted image data D ′ in one sampling period, two RAMs are prepared in advance, The converted image data D 'is read from each RAM.

Thereafter, as in the first embodiment, the interpolation circuit 205 calculates f (4k) and f (4k +
4) and performing an interpolation operation based on the lower-order image data [j] to calculate corrected image data Dout.

As described above, according to the present embodiment, the RAM 2
03a and the RAM 203b, the RAM 203
It is possible to allow a margin for the access time of the input image data Din and the converted image data f (4k) and f (4k + 4) even if the transfer rate of the input image data Din is increased.

The address data supplied to the RAM 203b shown in FIG. 7 is always the address data supplied to the RAM 203a incremented by "1". Therefore, if the converted image data D ′ stored in the RAM 203b is shifted by “1” and stored, the adder 201 can be omitted.

FIG. 8 shows the gradation correction unit 22 constructed from the above viewpoint. As shown in this figure, the adder 201 is omitted in the gradation correction unit 22. Also,
As shown in FIG. 9, the contents of the RAM 203a and the RAM 203c are such that, at the same address, the converted image data D 'of the RAM 203c is advanced by "1" from the converted image data D' of the RAM 203a. In other words, R
The AM 203c stores, in a storage area corresponding to a certain address value, the converted image data D ′ stored in a storage area corresponding to an address value obtained by advancing the address value by 1 in the RAM 203a.

For this reason, if the data value of the upper image data Da is k, for example,
(4k), f (4k + 4) is simultaneously read from the RAM 203c. Thereby, the interpolation circuit 205
Can generate corrected image data Dout based on f (4k), f (4k + 4), and lower-order image data [j].

<3. Third Embodiment> In the liquid crystal device according to the above-described second embodiment, a margin can be given to the access time of the RAM, but the storage capacity is twice as large as that of the first embodiment. Has increased. The third embodiment has been made in view of this point, and aims to reduce the storage capacity of the RAM while giving a margin to the access time of the RAM.

The liquid crystal device according to the third embodiment has the same configuration as the liquid crystal device according to the first embodiment shown in FIG. 1 except for the detailed configuration of the gradation correction unit. Hereinafter, the gradation correction unit 23 according to the third embodiment will be described. FIG.
FIG. 9 is a block diagram illustrating a configuration of a gradation correction unit 23 according to a third embodiment. The gradation correction unit 23
RAM 203d, 20 instead of M203a, 203b
3e and the addition of the selection circuits 206 and 207 are the gradation correction units 21 of the second embodiment shown in FIG.
Is different from

First, the selection circuits 206 and 207 switch the connection state of the input / output terminals based on the least significant bit value (LSB value) of the upper image data Da. Specifically, in the selection circuit 206, when the LSB is “0”, the input terminal a1 is connected to the output terminal b1 and the input terminal a2 is connected to the output terminal b2, while the LSB value is “1”. In this case, the input terminal a1 is connected to the output terminal b2, and the input terminal a2 is connected to the output terminal b1. When the LSB value is “0”, the selection circuit 207 connects the input terminal c1 to the output terminal d1 and connects the input terminal c2 to the output terminal d2 while the LSB value is “0”.
When the value is “1”, the input terminal c1 is connected to the output terminal d2 and the input terminal c2 is connected to the output terminal d1.

Next, the contents stored in the RAM 203d and RAM 203e are shown in FIG. As shown in FIG.
03d has an address value n (n is an integer from 0 to 32)
The converted image data f (8n) is stored in the storage area indicated by the above, and the converted image data f (8n + 4) is stored in the storage area indicated by the address value n (n is an integer from 0 to 31) in the RAM 203e. Is stored. That is,
Input image data value x = 0, 4, 8, 12,..., 8n, 8
Of the n + 4, ..., 252, 256, the converted image data D 'corresponding to the input image data value x = 0, 8, ..., 8n, ..., 256 is stored in the RAM 203d, while the input image data value x = 4, , 8n + 4,..., 252 are stored in the RAM 203e.

Therefore, the RAM 203d and the RAM 20
3e stores the converted image data D 'for every eight. In other words, the contents stored in the RAM 203 of the first embodiment (see FIG. 3) are alternately sorted and stored in the RAM 203d and the RAM 203e. Therefore, RAM2
03d and the RAM 203e have a total storage capacity of RAM
Since the storage capacity matches the storage capacity of 203, the storage capacity can be reduced to ４ as compared with the case where all the converted image data D ′ are stored.

Next, the operation of the gradation correction unit 23 will be described. First, assuming that the LSB value of the upper image data Da of the data value k is “0”, the upper image data Da of the data value k is supplied to the RAM 203d and the RAM 203e as address data. Therefore, RAM2
The converted image data f (8k) is read from the RAM 203e while the converted image data f (8k) is read from the RAM 203e.
Is read. At this time, since the selection circuit 207 connects the input and output terminals linearly, the input terminal 2 of the interpolation circuit 205 is connected.
F (8k) for the input terminal 05A and f (8k) for the input terminal 205B.
+4) will be supplied.

Next, assuming that the LSB value of the upper image data Da of the data value k is "1", the selection circuit 206 connects the input / output terminals with a cross, so that the RAM 203e
Is supplied with the upper image data [k] as address data. "1" is added to the RAM 203d by the adder 201.
The higher-order image data [k + 1] incremented by only the increment is supplied as address data. Therefore, RAM2
03e to the converted image data f (8k + 4)
The converted image data f (8k + 8) is read from 03d. At this time, since the selection circuit 207 connects the input / output terminals in a cross, the input terminal 205A of the interpolation circuit 205 has f (8k + 4) and the input terminal 205B has f (8k + 4).
8) will be supplied.

The interpolation circuit 205 calculates intermediate converted image data D ′ by interpolation operation following a certain converted image data D ′ and the next converted image data D ′. Regardless of the LSB value of the image data Da, the converted image data D ′ at the input terminal 205A of the interpolation circuit 205 is supplied, and the next converted image data D ′ is supplied to the input terminal 205B. Therefore, the interpolation circuit 205 generates the corrected image data Dout by executing the interpolation calculation as in the first embodiment.

As described above, according to the present embodiment, the converted image data D 'for each four is stored in the RAM 203d and the RAM 203e.
And the storage capacity is reduced to 1/4 as compared with the case where all the converted image data D 'are stored.
Can be reduced. Further, the RAM 203d and R
Since the converted image data D ′ used for the interpolation operation is read from the AM 203e, the access time can be given a margin.

<4. Fourth Embodiment> The liquid crystal device according to the third embodiment described above stores the converted image data D ′ for every four in the RAMs 203d and 203e alternately, but generates the address data and stores the converted image data D ′. In order to supply the signal to the interpolation circuit 205 at the subsequent stage, it is necessary to provide the adder 201 and the selection circuits 206 and 207.

The converted image data D 'to be stored in the RAM is discrete because only the number of bits of the upper image data Da is prepared. However, since the converted image data D ′ used for gradation correction has a strong correlation,
Of the converted image data D ′ to be stored in the image data does not change abruptly. Therefore, the difference value between the adjacent converted image data D 'is smaller than the normal converted image data D'.

The fourth embodiment focuses on this point, and the liquid crystal device according to the fourth embodiment can improve the storage capacity of the RAM without significantly increasing the storage capacity thereof by devising the storage contents of the RAM. With a simple configuration, a margin is given to the access time of the RAM.

First, before describing the specific configuration of the fourth embodiment, an interpolation method will be described. In the fourth embodiment, linear interpolation is performed as in the first embodiment. in this case,
The operation expression of the interpolation operation is given by the above-described expression (1). Here, Expression (5) can be obtained by modifying Expression (1) as follows.

F (4k + j) = {j · f (4k + 4) + (4-j) · f (4k)} / 4 = {j · f (4k + 4) −j · f (4k) + 4 · f (4k) ｝ / 4 = [｛f (4k + 4) -f (4k)｝ / 4] · j + f (4k) (5) According to the formula (5), f (4k) and f (4k + 4) -f
Given (4k), the corrected image data f (4k + j) can be calculated based on the lower-order image data [j].

Therefore, in this embodiment, f (4k) and f (4k)
(4k + 4) -f (4k) are stored in the RAM, and read out as needed.

Next, the specific configuration of the liquid crystal device according to the fourth embodiment is the same as the liquid crystal device of the first embodiment shown in FIG. 1 except for the detailed configuration of the gradation correction unit. Less than,
A tone correction unit 24 according to the fourth embodiment will be described. FIG. 12 is a block diagram illustrating a configuration of the gradation correction unit 24 according to the fourth embodiment. The gradation correction unit 24 includes the RAMs 203f and 203g and the interpolation circuit 20.
8, the adder 201 and the selection circuits 206 and 207 are omitted in comparison with the gradation correction unit 23 of the third embodiment shown in FIG.

Here, the RAM 203f and the RAM 203g
13 is shown in FIG. RAM as shown in this figure
Reference numeral 203f denotes the converted image data f corresponding to the address value n.
(4n) is stored, while the difference conversion image data Δf (4n) = f is stored in the RAM 203g corresponding to the address value n.
(4n + 4) -f (4n) is stored. here,
Since the difference converted image data Δf (4n) is a difference between adjacent converted image data D ′, the number of bits is smaller than that of the converted image data D ′. Therefore, RAM2
The storage capacity of 03g is extremely small compared to the storage capacity of the RAM 203f. Therefore, the RAM 203f
And the total storage capacity of the RAM 203g does not increase so much as compared with the total storage capacity of the RAM 203d and the RAM 203e of the third embodiment.

Next, the configuration of the interpolation circuit 208 is shown in FIG. As shown in this figure, the interpolation circuit 208 includes a bit shifter 231 for performing a 2-bit bit shift, a multiplier 23
2 and an adder 233. Here, assuming that the data value of the input image data Din is x = 4k + j, the data value of the upper image data Da is k, and the data value of the lower image data Db is j, the converted image data f (4
k), the difference conversion image data Δf (4
k) are read out.

The bit shifter 231 bit-shifts the difference-converted image data Δf (4k) to obtain Δf
(4k) / 4 is output. Thereafter, the multiplier 232 outputs Δf
(4k) / 4 is multiplied by lower image data [j] to obtain j · Δ
When f (4k) / 4 is generated, the adder 233 adds the converted image data f (4k) and the multiplication result to Δf (4k)
/ 4 + f (4k) is generated as corrected image data Dout.

As described above, according to the present embodiment, the conversion image data f (4n) and the difference conversion image data Δf (4
n) are stored in the RAM 203f and the RAM 203g, respectively, so that the overall configuration of the gradation correction unit 24 can be simplified without significantly increasing the storage capacity, and the RAM 203f and the RAM 203g have a sufficient access time. It is possible to make it.

<5. Application Examples> Next, some examples in which the above-described liquid crystal device is used in specific electronic devices will be described.

<Part 1: Projector> First, a projector using this liquid crystal panel as a light valve will be described. FIG. 15 is a plan view showing a configuration example of the projector.

As shown in FIG.
Inside 100, a lamp unit 1102 composed of a white light source such as a halogen lamp is provided. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and is used as a light valve corresponding to each primary color. Liquid crystal panels 1110R, 1110B and 1110
G is incident.

The liquid crystal panels 1110R, 1110B, and 1110G and the driving circuit for driving the same are obtained by expanding the input to three systems in the liquid crystal display device 70 described above. In this case, in the liquid crystal device 1 described above, three gradation correction units are provided, and corrected image data Dout corresponding to each of the R, G, and B primary color signals is generated and supplied to the liquid crystal display device.

The light modulated by these liquid crystal panels is incident on the dichroic prism 1112 from three directions. This dichroic prism 1112
In, while R and B light are refracted at 90 degrees,
G light goes straight. Therefore, as a result of combining the images of each color, a color image is projected on a screen or the like via the projection lens 1114.

<Part 2: Mobile Computer> Next, an example in which the liquid crystal panel is applied to a mobile personal computer will be described. FIG. 16 is a perspective view showing the configuration of this personal computer. In the figure, a computer 1200 includes a keyboard 120
And a liquid crystal display unit 120 provided with
6 is comprised. This liquid crystal display unit 120
6, the liquid crystal device 1 described above can be applied.

<Part 3: Mobile Phone> An example in which the liquid crystal device 1 is applied to a mobile phone will be described. FIG.
FIG. 7 is a perspective view showing the configuration of the mobile phone. In the figure, a mobile phone 1300 has a plurality of operation buttons 1302
In addition, a reflective liquid crystal panel 1005 is provided.

Note that, in addition to the electronic devices described with reference to FIGS. 15 to 17, a liquid crystal television, a viewfinder type, a monitor direct-view type video tape recorder, a car navigation device, a pager, an electronic notebook, a calculator, Word processor, workstation, videophone, POS terminal,
A device including a touch panel is exemplified. It goes without saying that the present invention can be applied to these various electronic devices.

<6. Modifications> The present invention is not limited to the above-described embodiment, and for example, various modifications described below are possible.

(1) In the above-described embodiment, the corrected image data Dout is converted into an analog image signal by the D / A converter 30 and then supplied to the liquid crystal display device 70. Of course, the correction image data Dout may be directly supplied to the liquid crystal display device 70 as long as it corresponds to the signal input.

(2) In the above embodiment, the ROM
Various kinds of converted image data D ′ corresponding to the characteristics of the input image may be stored in 60, and the converted image data D ′ to be loaded into the gradation correction unit may be switched according to the input image. For example, the converted image data D ′ may be selected when displaying graphic data generated by a personal computer and when displaying a video signal. Alternatively, the converted image data D ′ may be generated and loaded by an external device without using the ROM 60. Further, when applied to a personal computer, the converted image data D 'may be stored in a hard disk or the like, and the converted image data D' may be loaded from the hard disk at the time of initialization.

(3) In the above-described embodiment, division is performed by the bit shifter in the interpolation circuit 205 and the like. However, if the lower bits of the division result have little effect on the quality of the display image, this is ignored. Thus, the configuration of the subsequent adder may be simplified.

(4) In the above-described embodiment, the 8-bit input image data Din is divided into upper 6 bits and lower 2 bits, but the present invention is not limited to this. The number of bits, the number of upper bits, and the number of lower bits can be arbitrarily determined. For example, if the number of bits of the input image data Din is L = M + N, the number of upper bits is M, and the number of lower bits is N, the RAM 203 of the first embodiment and the RAMs 203a to 203a of the second embodiment
203c, in the RAM 203f of the fourth embodiment, the converted image data D 'extracted from the converted image data D' corresponding to each data value of the input image data Din at an interval of lower bits (an interval of 2N). 'May be stored in association with each possible data value of the M-bit upper image data Da. Further, the RAM 203d and the RAM 20 of the third embodiment
In 3e, a part of the converted image data D 'may be alternately allocated and stored at intervals of lower bits (intervals of 2N).

(5) In the above-described embodiment, the corrected image data Dout is generated by performing the interpolation operation on the two converted image data D ′ based on the lower-order image data Db. The method is not limited to linear interpolation, but may be interpolation by the least squares method. In addition, 2
Although the interpolation is performed from one piece of the converted image data D ′, it is needless to say that the interpolation may be performed from three or more pieces of the converted image data D ′.

[0092]

As described above, according to the present invention, a part of the conversion data for performing the gradation correction is stored, and the intermediate conversion data is calculated by the interpolation operation. The storage capacity of storage means for storing data can be significantly reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an overall configuration of a liquid crystal device according to an embodiment of the present invention.

FIG. 2 is a block diagram of a gradation correction unit 20 according to the first embodiment.

FIG. 3 is a diagram showing storage contents of a RAM 203 used in the embodiment.

FIG. 4 is a graph showing a relationship between a data value of input image data Din and a data value of converted image data D ′ in the embodiment.

FIG. 5 is a functional block diagram of an interpolation circuit 205 used in the embodiment.

FIG. 6 is a block diagram of an interpolation circuit 205 that does not use a multiplier.

FIG. 7 is a block diagram illustrating a configuration of a gradation correction unit 21 according to a second embodiment.

FIG. 8 is a block diagram showing a configuration of a gradation correction unit 22 according to the embodiment.

FIG. 9 shows a RAM 203a and R used in the embodiment.
It is a figure showing the storage contents of AM203c.

FIG. 10 shows a gradation correction unit 23 according to a third embodiment.
FIG. 3 is a block diagram showing the configuration of FIG.

FIG. 11 is a diagram showing storage contents of a RAM 203d and a RAM 203e used in the embodiment.

FIG. 12 is a gradation correction unit 24 according to a fourth embodiment.
FIG. 3 is a block diagram showing the configuration of FIG.

FIG. 13 is a diagram showing storage contents of a RAM 203f and a RAM 203g used in the embodiment.

FIG. 14 is a block diagram showing a configuration of an interpolation circuit 208 according to the same embodiment.

FIG. 15 is a cross-sectional view illustrating a configuration of a projector as an example of an electronic apparatus to which the liquid crystal device is applied.

FIG. 16 is a perspective view illustrating a configuration of a personal computer as an example of an electronic apparatus to which the liquid crystal device is applied.

FIG. 17 is a perspective view illustrating a configuration of a mobile phone as an example of an electronic apparatus to which the liquid crystal device is applied.

[Explanation of symbols]

20 to 24 gradation correction unit (gradation correction device) 70 liquid crystal display device (image display unit) 203, 203a to 203f RAM (storage unit, storage unit) 201 ... adder (reading unit) 202... Switches (reading means) 205, 208... Interpolation circuits (interpolating means) 206, 207... Selection circuits (reading means) Da... Upper image data (upper gradation data) Db. Din: Input image data (gradation data) D ': Conversion image data (conversion data) Dout: Correction image data (correction gradation data)

Continued from the front page F-term (reference) 2H093 NA16 NC13 NC21 NC24 NC65 ND06 ND39 ND49 ND54 ND58 NG02 5C006 AA01 AA02 AA16 AF13 AF46 AF71 AF81 AF83 BB11 BC13 BC16 BF02 BF04 BF08 BF15 BF24 BF28 PA10 XA5PA6A5A BB05 DD04 DD22 EE29 FF09 JJ02 JJ05 JJ06

Claims (11)

[Claims] 1. A method for performing a tone correction on a tone data by using a part of conversion data predetermined for each data value of tone data indicating a tone of an image to generate corrected tone data. Dividing means for dividing the inputted gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively; Storage means for storing the converted data extracted at intervals of the lower bits from the data in association with each possible data value of the upper gradation data, and a plurality of storage means from the storage means based on the higher gradation data. A reading unit that reads the conversion data; and an interpolation unit that performs an interpolation operation on the plurality of conversion data read by the reading unit based on the lower-order gradation data to generate the corrected gradation data. Gradation correcting apparatus according to claim Rukoto. 2. A method for generating corrected gradation data by performing gradation correction on the gradation data by using a part of conversion data predetermined for each data value of gradation data indicating a gradation of an image. Dividing means for dividing the inputted gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively; Storage means for storing the converted data extracted at intervals of the lower-order bits in association with each possible data value of the upper-level gradation data; and Reading means for reading out first conversion data corresponding to the data value of the upper gradation data and second conversion data corresponding to a data value obtained by incrementing the data value by 1, based on the lower gradation data, Gradation correction apparatus characterized by serial subjected to interpolation operation on the first and second converted data read by the reading means and an interpolation means for generating a correction gradation data. 3. The read-out means includes step-by-step means for generating step-by-step data in which the data value of the high-order gradation data is incremented by one. 3. The gradation correcting apparatus according to claim 2, wherein the first and second converted data are read out from the storage means in a time-division manner based on the data and the step data. 4. A method for performing gradation correction on said gradation data by using a part of conversion data predetermined for each data value of gradation data indicating a gradation of an image to generate corrected gradation data. Dividing means for dividing the inputted gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively; Stepping means for generating stepped data obtained by incrementing the data value of the data by 1; A first storage unit for storing in association with the first storage unit; a second storage unit having the same storage content as the first storage unit; and a data value of the upper gradation data from the first storage unit. First conversion data Reading one, the second
Reading means for reading out second conversion data corresponding to the data value of the step data from the storage means, and the first and second conversions read out by the reading means based on the lower gradation data. A tone correction device comprising: an interpolation unit that performs an interpolation operation on data to generate corrected tone data. 5. A method of performing gradation correction on said gradation data by using a part of conversion data predetermined for each data value of gradation data indicating a gradation of an image to generate corrected gradation data. Dividing means for dividing the inputted gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively; Stepping means for generating stepped data obtained by incrementing the data value of the data by one, and converting the data extracted from the converted data at intervals of the lower bits into data values which can be taken by the upper gradation data. A first storage means for storing the data in a storage area corresponding to a certain address, and a conversion area stored in a storage area corresponding to an address obtained by advancing the address by one in the first storage means. A second storage unit that stores data, and supplies the upper gradation data to the first and second storage units as address data, and reads out first conversion data from the first storage unit. Reading means for reading out the second conversion data from the second storage means; and performing an interpolation operation on the first and second conversion data read out by the reading means based on the lower gradation data. A gradation correction device comprising: an interpolation unit that generates corrected gradation data. 6. Generating corrected gradation data by performing gradation correction on the gradation data by using a part of the conversion data predetermined for each data value of the gradation data indicating the gradation of the image. Dividing means for dividing the inputted gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively; First and second storage means for alternately storing a portion in association with each possible data value of the upper gradation data at intervals of the lower bit, and the first and second storage means based on the higher gradation data. From the second storage means and the first conversion data corresponding to the data value of the upper gradation data and the data value
Reading means for reading out the second converted data corresponding to the data value incremented by only; and performing an interpolation operation on the second and second converted data read out by the reading means based on the lower gradation data. And a interpolation means for generating corrected gradation data. 7. The first storage means stores the converted data respectively corresponding to the grayscale data in which the least significant bit value of the upper bit is 0 and each bit value of the lower bit is 0. The second storage means stores the least significant bit value of the upper bit as 1 and each bit value of the lower bit as 0
7. The gradation correction apparatus according to claim 6, wherein the conversion data corresponding to the gradation data is stored. 8. A method of performing gradation correction on a part of conversion data predetermined for each data value of gradation data indicating a gradation of an image to generate corrected gradation data. Dividing means for dividing the inputted gradation data into upper bits and lower bits to generate upper gradation data and lower gradation data, respectively; A first storage means for storing a portion in association with each possible data value of the upper gradation data at the interval of the lower bits; conversion data corresponding to a certain upper gradation data; Second storage means for storing difference conversion data indicating a difference value between the conversion data corresponding to the data whose data value differs by 1 in association with each possible data value of the upper gradation data; Based on the key data, Reading means for reading conversion data and difference conversion data corresponding to the data value of the upper gradation data from the first storage means and the second storage means; and reading the conversion data based on the lower gradation data. Interpolating means for performing an interpolation operation on the conversion data and the difference conversion data read by the means to generate corrected gradation data. 9. A gradation correction device according to claim 1, further comprising: an image display unit for displaying an image based on correction gradation data output from the gradation correction device. An image display device comprising: 10. The image display unit includes a liquid crystal panel, wherein the conversion data is used for correcting at least one of a transmittance characteristic and a gamma characteristic with respect to an applied voltage of the liquid crystal panel. The image display device according to claim 9, wherein: 11. A gradation correction method for performing gradation correction on said gradation data by using a part of conversion data predetermined for each data value of gradation data indicating a gradation of an image, The input grayscale data is divided into upper bits and lower bits to generate upper grayscale data and lower grayscale data, respectively, and extracted at intervals of the lower bit from all the converted data. The conversion data is stored in a storage unit in association with each possible data value of the upper gradation data, and a plurality of the conversion data are read from the storage unit based on the upper gradation data; And performing an interpolation operation on the plurality of pieces of conversion data to generate the corrected gradation data.