JP2000323940A - Whole differential amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To control a system so that stable driving can be executed when the input signal of a differential amplifier does not exist in a dynamic range in an initial state. SOLUTION: A start circuit 17 giving auxiliary current to stable driving when the input signal of a differential amplifier 11 does not exist in a dynamic range in an initial state is installed. The start circuit 17 compares the reference voltage 1j of the input signal by which the differential amplifier 11 becomes an interruption state, a first input signal 1a and a second input signal 1b and supplies start auxiliary current to the output stage of the differential amplifier 11 corresponding to the input signal exceeding reference voltage 1j by a current supply means. A form for supplying the signal to the output stages of inverted output amplifiers 12 and 13 installed in the output stage of the differential amplifier 11 exists. When a common feedback circuit 16 controls the feedback of negative feedback, then input signal can be stabilized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technology which is effective when applied to an amplifier for analog signals, and more particularly to a technology which is effective when used for audio equipment and sensor equipment such as a PCM signal transmission device and a preamplifier. Things.

[0002]

2. Description of the Related Art A conventional fully differential amplifier will be described below.

[0003] Low voltage and low power consumption of analog equipment,
With the advance of signal processing technology, the importance of fully differential amplifiers is increasing year by year.

FIG. 9 is a block diagram of a conventional fully differential amplifier, and FIG. 10 is a specific circuit configuration example of the block diagram of FIG.

Reference numeral 91 denotes a differential amplifier, 92 denotes a first output amplifier, 93 denotes a second output amplifier, 94 denotes a first resistor, and 95 denotes a second resistor having the same size as the first resistor. Is a common mode feedback circuit. 100a is a first power supply potential, 100b is a second power supply potential, 9a is a first input terminal, 9b is a second input terminal, 9b
c is a first output terminal, 9d is a second output terminal, 9e is a third output terminal, 9f is a fourth output terminal, 9g is a third input terminal, 9h is first and second resistors. 9i is an output of the common mode feedback circuit.

The operation of the conventional fully differential amplifier configured as described above will be described below.

The differential amplifier 91 operates as a differential amplifier, amplifies input signals applied to a first input terminal 9a and a second input terminal 9b, and amplifies an input signal applied to a first output terminal 9c and a second output terminal. Output from the terminal 9d.

The first output amplifier 92 has an output terminal 9c.
Is further amplified and output from the third output terminal 9e.
Similarly, the second output amplifier 93 further amplifies the signal at the output terminal 9d and outputs the amplified signal from the fourth output terminal 9f.

Since the size of the first resistor 94 is equal to that of the second resistor 95, an intermediate potential between the third output terminal and the fourth output terminal appears at the connection point 9h of the resistor.

The common mode feedback circuit 96 performs feedback control on the differential amplifier so that the potential at the connection point 9h of the resistor becomes equal to the potential at the third input terminal 9g. By this feedback control, the potentials of the third output terminal and the fourth output terminal are always symmetric with respect to the potential of the third input terminal 9g.

FIG. 11 shows an example of an amplifier circuit using such a differential amplifier. Reference numeral 11a denotes a first input terminal of the differential amplifier, a portion corresponding to the first input terminal 9a of FIGS. 9 and 10, and 11b denotes a second input terminal of the differential amplifier, the second input terminal of FIGS. A portion corresponding to the input terminal 9b, 11e is a third output terminal of the differential amplifier, a portion corresponding to the third output terminal 9e in FIGS. 9 and 10, and 11f is a fourth output terminal of the differential amplifier.
And 11g is a third input terminal of the differential amplifier and is a portion corresponding to the third input terminal 9g in FIGS. 9 and 10. .

Further, 111 is a first input terminal of the amplifier circuit, 112 is a second input terminal of the amplifier circuit, and 113 is a first input terminal of the amplifier circuit.
, 114 is a second capacitor, 115 and 116 are first and second resistors of equal size, and 117 and 118 are third and fourth resistors of equal size. In the configuration of FIG. 11, negative feedback is applied to the third and fourth output terminals of the differential amplifier, and a differential inverting amplifier is configured as a whole.

FIG. 12 shows an example of the output waveform of the amplifier circuit of FIG.
Shown in The third output terminal and the fourth output terminal are controlled by controlling the first resistor, the second resistor, and the common mode feedback circuit.
The output waveform appearing at the output terminal is always vertically symmetrical with respect to the voltage applied to the third input terminal, and a differential output signal can be easily obtained.

Such a fully differential amplifier can obtain a double output signal by having two outputs having the same signal amplitude as that of a normal single signal. Therefore, even if the power supply voltage is low, a dynamic range twice as large as that of a normal single signal can be obtained, which is suitable for lowering the voltage of the circuit. In addition, when noise of the same magnitude is applied to the entire circuit, the potential difference of the noise is canceled as a differential signal, so that it is also suitable for increasing the precision of the amplifier.

[0015]

However, in the above configuration, the initial voltages of the first and second input terminals are out of the range of the input dynamic range due to, for example, a voltage drop due to a capacitance or a leak from an element. In this case, the current of the current source 101c is
And the potential of the first output terminal and the potential of the second output terminal become the second power supply potential 100b.
The potentials of the third output terminal and the fourth output terminal become higher than the input dynamic range.

FIG. 13 shows this state. State A in FIG.
Indicates a case where the initial voltages of the first and second input terminals are within the range of the input dynamic range, and state B indicates a case where the initial voltages of the first and second input terminals are outside the range of the input dynamic range. In the state A, the circuit starts to operate, and operates stably even after the time elapses to the state A ′, but in the state B, the circuit of the third output terminal and the fourth output terminal Since the potential becomes higher than the input dynamic range, the first and second input terminals are kept out of the input dynamic range through negative feedback, and the state B ′ remains in the state even after a lapse of time. The circuit does not start operating outside the input dynamic range.

The present invention solves the above-mentioned problem, and provides a fully differential amplifier capable of reliably starting an amplifying operation even when the initial voltages of the first and second input terminals are out of the range of the input dynamic range. It is an object to provide an amplifier.

[0018]

In order to achieve the above object, a fully differential amplifier according to the present invention has first and second input signals, and a first output signal and a first output signal corresponding to the first input signal. A differential amplifier that outputs a second output signal with respect to the second input signal; a reference voltage that is a voltage value of the first and second input signals that causes the differential amplifier to be in a cutoff state; And the second input signal is input and compared with the reference voltage, and a start assist is provided to an output stage of the differential amplifier corresponding to an input signal exceeding the reference voltage among the first and second input signals. A start circuit including current supply means for supplying a current, wherein the start auxiliary current is supplied to an output stage of the differential amplifier when the differential amplifier is in a cutoff state.

With the above configuration, in the initial state, even when the input signal exceeds the reference voltage and the differential amplifier is cut off, the start auxiliary current is applied to the output stage of the differential amplifier to perform stable driving. be able to.

Next, in the fully differential amplifier according to the present invention, the first output signal of the differential amplifier is input to the output stage of the differential amplifier circuit to output a third output signal that is inverted amplification. A first output amplifier, and a second output amplifier that receives a second output signal of the differential amplifier as an input and outputs a fourth output signal that is inverted amplification, Preferably, an auxiliary current is connected to an input stage of said first and second output amplifiers.

According to the above configuration, an output amplifier is further provided at the output stage of the differential amplifier circuit, and the output adjusted by the current supply means of the start circuit can be amplified and adjusted.

Next, in the fully differential amplifier according to the present invention, the first output signal of the differential amplifier is input to the output stage of the differential amplifier circuit to output a third output signal that is inverted amplification. A first output amplifier; and a second output amplifier that receives a second output signal of the differential amplifier as an input and outputs a fourth output signal that is an inverted amplification, and a current supply unit of the start circuit outputs the fourth output signal. Preferably, an inverting amplifier is provided in the stage, and a start auxiliary current of the current supply means of the start circuit is connected to the output stages of the first and second output amplifiers via the inverting amplifier.

With the above configuration, the fully differential amplifier according to the present invention includes an output amplifier at an output stage of the differential amplifier, and in an initial state, the input signal exceeds the reference voltage, and the differential amplifier is turned off. Even in such a case, it is possible to apply the start auxiliary current to the output stage of the output amplifier and perform stable driving.

Next, the fully differential amplifier according to the present invention has the third
And a feedback reference voltage, which is a target steady-state voltage of the fourth output signal, and an intermediate potential between the third and fourth output signals, and compare with the feedback reference voltage,
A common feedback circuit that supplies a negative feedback signal to an input stage of the differential amplifier so that the intermediate potential becomes equal to the feedback reference voltage, wherein a first and a second input signal of the differential amplifier are connected to the feedback reference voltage; It is preferable to stabilize asymptotically.

With the above configuration, in the initial state, the fully differential amplifier of the present invention outputs the output of the circuit output stage to the target steady-state voltage even when the input signal exceeds the reference voltage and the differential amplifier is cut off. Is stabilized asymptotically to the feedback reference voltage, and stable driving can be performed.

Next, the differential amplifier includes a first transistor having a first polarity, a gate connected to the first input signal, a gate connected to the second input signal, and a source connected to the first input signal. A second transistor having a first polarity connected to the source of the first transistor; a first current source connected between the sources of the first and second transistors and a first power supply potential; A drain of the first transistor connected to the drain, a third transistor of a second polarity having a source to which a second power supply potential is applied, a drain connected to the drain of the second transistor, and a source connected to the drain. It is preferable that the semiconductor device includes a fourth transistor having a second polarity to which the second power supply potential is applied.

With the above configuration, the fully differential amplifier of the present invention can constitute a differential amplifier in a circuit with a small number of elements.

Next, the start circuit includes a first power supply potential, a current source connected to the first power supply potential, and a fifth to an eighth source connected in common to the current source. A transistor, a second power supply potential, a gate of the fifth transistor connected to the first input signal, a drain connected to the second power supply potential, and a gate of the sixth transistor connected to the second power supply potential. The second input signal, the drain is connected to the second power supply potential, the gate of the seventh transistor is connected to the reference voltage, the output of the drain is the first start auxiliary current, It is preferable that a gate of the transistor is connected to the reference voltage and an output of the drain is used as the second start auxiliary current.

With the above configuration, the fully differential amplifier of the present invention can form a start circuit in a circuit with a small number of elements.

Next, the start circuit includes a first power supply potential, a current source connected to the first power supply potential, and a fifth to seventh power supply sources connected in common and connected to the current source. A transistor, an eighth transistor having a different polarity from the fifth to seventh transistors, and a second power supply potential. The fifth transistor has a gate connected to the first input signal, and a drain connected to the first input signal. 2 power supply potential,
The sixth transistor has a gate connected to the second input signal, a drain connected to the second power supply potential, a gate of the seventh transistor connected to the reference voltage, and a drain connected to the eighth transistor. It is preferable that the gate of the eighth transistor is used as the start auxiliary current and the source is connected to the second power supply potential.

With the above configuration, the fully differential amplifier of the present invention can constitute a start circuit in a circuit with a small number of elements.

Further, the common mode feedback circuit includes a ninth transistor having the same polarity as the fifth to seventh transistors of the start circuit, and a tenth transistor having the same polarity as the eighth transistor. Connecting the gate of the ninth transistor to the intermediate potential, connecting the source to the current source, connecting the drain to the gate and drain of the tenth transistor, and connecting the source of the tenth transistor to the And a drain connected to the ninth drain, a gate connected to the ninth drain, and an output at a connection point of the gate as a negative feedback signal to the operational amplifier.

With the above configuration, the fully differential amplifier of the present invention can form a common feedback circuit in the circuit with a small number of elements, and can be formed integrally with a start circuit. Negative feedback control linked with the operation of the circuit can be performed.

[0034]

(Embodiment 1) Hereinafter, Embodiment 1 of the present invention will be described with reference to FIGS. Embodiment 1 shows an embodiment of a fully differential amplifier according to claims 1, 2, 4, 5, and 6 of the present invention.

FIG. 1 is a block diagram schematically showing the circuit of the first embodiment, and FIG. 2 is a detailed circuit diagram showing an example of the element configuration.

1 and 2, reference numeral 11 denotes a differential amplifier, which comprises two P-channel MOSs and two N-channel MOSs as shown in FIG.

Reference numerals 12 and 13 denote output amplifiers provided at the output stage of the differential amplifier 11, which are a first output amplifier and a second output amplifier, respectively. The output of the first output amplifier 12 corresponds to a third output signal, and the output of the second output amplifier 13 corresponds to a fourth output signal. 14 is a first resistor, 15 is a second resistor having the same size as the first resistor, and the third and fourth resistors are connected at the connection point between the first resistor 14 and the second resistor 15. The intermediate potential of the output signal is obtained. 16 is a common mode feedback circuit, 17
Is a start circuit. In FIG. 2, reference numeral 20a denotes a first power supply potential, 20b denotes a second power supply potential, and 1a denotes a first power supply potential.
1b is an input terminal of a second input signal, 1c is an output terminal of a first output signal, 1d is an output terminal of a second output signal, and 1e is an output terminal of a third output signal. ,
1f is an output terminal of a fourth output signal, 1g is an input terminal of a feedback reference voltage, 1h is a connection point of a first resistor and a second resistor and is an output terminal of the intermediate potential, and 1i is a common mode feedback circuit. Is a reference voltage (referred to as Vref) input terminal of the start circuit. The reference voltage Vref of the start circuit is a voltage that is used as a reference for determining whether or not the start circuit 27 performs a start operation, as will be described later. The first input terminal 2a and the second input terminal 2
If the input voltage to b is higher than the reference voltage Vref, the start operation is executed, and if the input voltage to b is lower than the reference voltage Vref, the start operation is not executed.

The start circuit 17, as shown in FIG.
Four P-channel MOS transistor elements 17b-1
7e constitutes a current supply means, receives a first input signal and a second input signal, and outputs a first start auxiliary current and a second start auxiliary current.

The operation of the start circuit 17 according to the first embodiment will be described below.

In FIG. 2, both the first and second input voltages supplied from the first input terminal 1a and the second input terminal 1b are equal to the reference voltage Vref of the reference voltage input terminal 1j.
Lower than transistors 17b and 17c
All the current of the current source 17a through the second power supply potential 10
The start circuit 17 does not output the start auxiliary current.

The first input terminal 1a and the second input terminal 1
When at least one of the first and second input voltages supplied from b is higher than the reference voltage Vref of the reference voltage input terminal 1j of the start circuit 17, the transistors 17d and 17e corresponding to the input signal are turned on. Through this, the current of the current source 17a flows into the first output terminal 1c and the second output terminal 1d as a start auxiliary current. This start auxiliary current raises the voltage of the first output signal and the second output signal corresponding to the input signal higher than the reference voltage Vref, and increases the voltage of the first and second output amplifiers of the corresponding output stage. And the potential of the fourth output signal are lowered.

The above is the outline of the operation of the start circuit.

FIG. 3 shows the transition of the operating state of the fully differential amplifier. State A is when the initial voltage of the first and second input signals is equal to or lower than the reference voltage Vref of the start circuit 17, and state B is when the initial voltage of the first and second input signals is equal to or higher than the reference voltage Vref of the start circuit 17. Shows the case. In the state A, the start circuit 17 does not operate, and the differential amplifier 11 also starts operating stably. In the case of the state B, the start circuit 17 operates, and the voltages of the third and fourth output signals are reduced to the state B 'until the voltage becomes equal to or lower than the reference voltage Vref, and the state autonomously transitions into the input dynamic range. The differential amplifier starts operating stably.

With this circuit configuration, only when the first input signal and the second input signal are higher than the reference voltage Vref referred to by the start circuit, the third output signal of the output stage and the third output signal are output. 4 can reduce the voltage of the output signal. Further, if the negative feedback is used in this state, the potentials of the third output terminal and the fourth output terminal are lowered, so that the potentials of the first input terminal and the second input terminal are also within the range of the input dynamic range. Therefore, if the feedback reference voltage is set to be equal to or less than the input dynamic range, the operation can be reliably started.

The start circuit of the first embodiment has a simple configuration and a small number of circuit elements, and can be said to be suitable for downsizing the circuit. In the first embodiment, the case where the first to fourth input terminals are P-channel transistors has been described, but the same can be realized when the input terminals are N-channel transistors.

(Embodiment 2) Hereinafter, a second embodiment of the present invention will be described with reference to FIGS. Embodiment 2 shows an embodiment of a fully differential amplifier according to claims 1, 3, 4, 5, and 7 of the present invention.

FIG. 4 is a block diagram showing an outline of a circuit according to the second embodiment, and FIG. 5 is a detailed circuit diagram showing an example of an element configuration.

4 and 5, the differential amplifier 11,
The first output amplifier 12, the second output amplifier 13, the first resistor 14, the second resistor 15, and the common mode feedback circuit 16 have the same numbers in FIGS. 1 and 2 of the first embodiment, respectively. This is the same element as the element described above, and the description here will be appropriately omitted. Also, the same reference numerals are given to the same terminals as those described in the first embodiment,
The description here is omitted as appropriate. 47 is a start circuit. 4j is an input terminal to which the reference voltage of the start circuit is input. Reference numerals 42f and 42g denote transistors provided at output stages of the output amplifiers 12 and 13 for supplying a start auxiliary current, invert and amplify the start auxiliary current, and supply signals to the third output signal and the fourth output signal. I do.

Hereinafter, the operation of the start circuit 47 will be mainly described.

In FIG. 5, the start circuit 47 comprises three P-channel MOS transistors 47b to 47d and one N-channel MOS transistor 47e as current supply means, and includes a first input signal and a second input signal. And outputs a first start auxiliary current and a second start auxiliary current. 4j is a reference voltage (Vref) input terminal of the start circuit. The reference voltage Vref of the start circuit is a voltage serving as a reference as to whether or not the start circuit 27 performs a start operation, as in the first embodiment.
If the input voltage to the input terminal 2a and the second input terminal 2b is higher than the reference voltage Vref, the start operation is executed, and if the input voltage is lower than the reference voltage Vref, the start operation is not executed.

When the input voltage of the first input terminal 1a and the input voltage of the second input terminal 1b are lower than the reference voltage Vref of the reference voltage input terminal 4j, all the currents of the current source 47a pass through the transistors 47b and 47c. Flows to the second power supply potential 40b via the
e, the gate potentials of the transistor 47f and the transistor 47g are equal to the second power supply potential 40b. In this state, since the impedance between the drain and the source of the transistor 47f and the transistor 47g becomes high impedance, the start circuit does not output the start auxiliary current.

The first input terminal 1a and the second input terminal 1
b, when at least one of the first and second input voltages supplied from b is higher than the reference voltage Vref of the reference voltage input terminal 4j of the start circuit 47,
a is used as a start auxiliary current in the transistor 47e.
Flow into This start auxiliary current is supplied to the output amplifier 12
And the transistor 47 provided in the output stage of 13
Since f and the gate potential of the transistor 47g are raised, the impedance between the drain and source of the transistor 47f and the transistor 47g is reduced, and the potentials of the third output signal and the fourth output signal are reduced.

An example of the transition of the operating state of the fully differential amplifier using the start circuit 47 of the second embodiment is the same as that of FIG. 3 shown in the first embodiment.

As described above, even in the case of this circuit configuration, the input voltages of the first input signal and the second input signal are equal to the reference voltage Vre.
Only when f is higher, the voltages of the third output signal and the fourth output signal can be reduced. If a negative feedback is used in this state, the potentials of the third output signal and the fourth output signal decrease, so that the potentials of the first input signal and the second input signal are also within the range of the input dynamic range. Since the feedback reference voltage is set lower than the input dynamic range, the operation can be reliably started.

Since the start circuit according to the second embodiment does not have a connection point to the inside of the circuit, the parasitic capacitance inside the circuit can be suppressed low. In particular, when handling high-frequency signals, it is necessary to suppress the parasitic capacitance to a low level. Therefore, Embodiment 2 can be said to be suitable for a fully differential amplifier that handles high-frequency signals. The fully differential amplifier according to the second embodiment is the same as the first embodiment.
Similarly to the above, the present invention can also be realized when the first to fourth input terminals are N-channel transistors.

(Embodiment 3) Hereinafter, Embodiment 3 of the present invention will be described.
Will be described with reference to FIGS. Embodiment 3
Shows an embodiment of a fully differential amplifier according to claim 8 of the present invention.

FIG. 6 is a block diagram schematically showing the circuit of the third embodiment, and FIG. 7 is a detailed circuit diagram showing an example of the element configuration.

In FIG. 6 and FIG.
1, the first output amplifier 12, the second output amplifier 13, the first resistor 14, and the second resistor 15 are described with the same reference numerals in FIGS. 1 and 2 of the first embodiment, respectively. Elements are the same as the elements, and the description thereof will be omitted as appropriate.
Also, the same terminals as those described in the first embodiment are denoted by the same reference numerals, and description thereof will not be repeated.

Reference numeral 60 denotes an integrated module in which a start circuit and a common mode feedback circuit are integrated.
As is clear from comparison with FIG. 5, the fifth transistor 67b, the sixth transistor 67c, the seventh transistor 67d, and the eighth transistor 67e function as a start circuit, and each of the fifth transistor 67b to the eighth transistor 67e in FIG. Of the transistors 47b to 47e. Ninth transistor 6
6b and the tenth transistor 66d function as a feedback circuit in conjunction with other elements of the integrated module 60. 6g is an input terminal of an integrated module reference voltage, where the integrated module reference voltage is also a reference voltage as a start circuit and a feedback reference voltage as a common feedback circuit. Further, as described in the second embodiment, the transistors 42f and 42g are provided at the output stages of the output amplifiers 12 and 13 to supply the start auxiliary current, and invert and amplify the start auxiliary current to perform the third output. Providing a signal to the signal and a fourth output signal.

Hereinafter, the operation of the integrated module 60 will be described.

In the integrated module 60, the first input signal 1a, the second input signal 1b, and the third output signal 1
e, the respective voltages supplied to the integrated module 60 from the fourth output signal 1f are all the third input terminals 6
g, the voltage input to the gates of the transistors 47b, 47c, 66b is higher than the integrated module reference voltage, and the current flowing from the current source 47a to the transistors 47b, 47c, 66b is As a result, the drain potential of 66d is lowered, and the potential of the common mode feedback signal 1i fed back to the differential amplifier 11 is lowered.

When the potential of the common mode feedback signal 1i is lowered, the potentials of the first output signal 1c and the second output signal 1d are raised. When the potentials of the first output signal 1c and the second output signal 1d are raised, the potentials of the third output signal 1e and the fourth output signal 1f are lowered via the transistors 12b and 13b. Thus, feedback control by negative feedback is performed.

The current interrupted by the transistors 47b, 47c and 66b is applied to the transistors 47d and 47d.
The drain voltage of the transistor 47e is increased by flowing into the transistor 47e as a start auxiliary current.
transistor 42, which is an inverting amplifier connected to e
Since the gate voltages of f and 42g are also increased,
The third output signal 1e is output by the transistors 42f and 42g.
And the potential of the fourth output signal 1f is reduced.

Next, when the input voltages of the first input signal 1a, the second input signal 1b, the third output signal 1e, and the fourth output signal 1f are lower than the reference voltage of the integrated module,
The current flowing from the current source 47a to the transistors 47d, 47e is cut off, and the transistors 47b, 47c, 66
A current flows through b, and as a result, the drain potential of 66d rises, and the potential of the common mode feedback signal 1i fed back to the differential amplifier circuit 11 is raised. The potential of the first output signal 1c and the potential of the second output signal 1d are reduced by the rise in the potential of the common mode feedback signal 1i. First output signal 1c and second output signal 1
When the potential of d is lowered, the transistors 12b, 1
3b, the third output signal 1e and the fourth output signal 1f
Is raised. Thus, feedback control by negative feedback is performed.

Since the current flowing through the transistors 47d and 47e is cut off, the drain voltage of the transistor 47e is reduced and the gate voltages of the connected transistors 42f and 42g are also reduced. 3 output signal 1e
And the voltage of the fourth output signal 1f is raised.

As described above, if negative feedback is used in this state, the fully differential amplifier operates so that the potentials of the first input signal and the second input signal become equal to the integrated module reference voltage. I do.

FIG. 8 shows a state transition example of the fully differential amplifier according to the third embodiment. State A shows a case where the initial potentials of the first input terminal 1a and the second input terminal 1b are lower than the voltage of the integrated module reference voltage input terminal 6g, and state B shows that the first input terminal 1a and the second input terminal 1b have the same initial potential. 2 shows a case where the initial potential of the input terminal 1b is higher than the reference voltage of the integrated module reference voltage input terminal 6g. The potential control of the third output terminal 1e and the fourth output terminal 1f is performed by controlling the first input terminal 1a.
And until the potential of the second input terminal 1b matches the reference voltage of the integrated module reference voltage input terminal 6g, so that the state A and the state B shift to the state A ′ and the state B ′ over time, It is asymptotically equal to the reference voltage of the integrated module reference voltage input terminal 6g. Therefore, if the reference voltage of the integrated module reference voltage input terminal 6g is set within the range of the input dynamic range, the fully differential amplifier can reliably start operating.

In the third embodiment, the output of the common mode feedback circuit is connected to the differential amplifier 11, the third output terminal 1e, and the fourth output terminal 1f.
A configuration for connecting to the differential amplifier 11, the first output terminal 1c, and the second output terminal 1d can be easily realized. Further, similarly to the first and second embodiments, the fully differential amplifier according to the third embodiment can be easily realized even when the first to third input terminals are N-channel transistors.

[0069]

According to the fully differential amplifier of the present invention, the first input terminal voltage and the second input terminal voltage can be reduced by providing the start circuit. Only when the voltage is higher than the reference voltage of the start circuit, the potential of the first output terminal and the potential of the second output terminal are raised, and the potential of the third output terminal and the potential of the fourth output terminal are lowered.

According to the fully differential amplifier of the present invention, the first input terminal voltage and the second input terminal voltage start by providing the start circuit. Adjustment is performed to lower the potentials of the third output terminal and the fourth output terminal only when the voltage is higher than the reference voltage of the circuit.

Since the input terminal voltage can always be changed to be equal to or lower than the reference voltage through the negative feedback connection, by setting this reference voltage within the range of the input dynamic range, the input voltage can be shifted to the initial state of the input voltage. A fully differential amplifier that reliably starts operation can be realized.

According to the fully actuated amplifier of the present invention as set forth in claims 4 and 8, if a common feedback circuit is provided and negative feedback is used, the fully differential amplifier becomes the first input terminal and the second input terminal. Operates such that the potential of the input terminal of the input terminal is always equal to the reference voltage. By setting this reference voltage within the range of the input dynamic range, it is possible to realize a fully differential amplifier that reliably starts operation regardless of the initial state of the input voltage.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a fully differential amplifier according to a first embodiment of the present invention.

FIG. 2 is a circuit wiring diagram showing a fully differential amplifier according to Embodiment 1 of the present invention.

FIG. 3 is a diagram illustrating an example of a change in potential of the fully differential amplifier according to the first embodiment of the present invention.

FIG. 4 is a block diagram illustrating a fully differential amplifier according to a second embodiment of the present invention.

FIG. 5 is a circuit wiring diagram illustrating a fully differential amplifier according to a second embodiment of the present invention.

FIG. 6 is a block diagram showing a fully differential amplifier according to a third embodiment of the present invention.

FIG. 7 is a circuit wiring diagram illustrating a fully differential amplifier according to a third embodiment of the present invention.

FIG. 8 is a diagram illustrating an example of a change in potential of the fully differential amplifier according to the third embodiment of the present invention.

FIG. 9 is a block diagram showing a conventional fully differential amplifier.

FIG. 10 is a circuit wiring diagram showing a conventional fully differential amplifier.

FIG. 11 is a circuit wiring diagram showing an amplifier circuit using a conventional fully differential amplifier.

FIG. 12 is a diagram illustrating an example of an output waveform of an amplifier circuit using a conventional fully differential amplifier.

FIG. 13 is a diagram showing an example of a change in potential of a conventional fully differential amplifier.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 11 Differential amplifier 12 1st output amplifier 13 2nd output amplifier 14 1st resistor 15 2nd resistor 16 Common mode feedback circuit 17, 47 Start circuit 1a 1st input terminal 1b 2nd Input terminal 1c First output terminal 1d Second output terminal 1e Third output terminal 1f Fourth output terminal 1g Input terminal of feedback reference voltage 1h Connection point between first resistor and second resistor 1i Common Mode feedback signal 1j Reference voltage input terminal 10a First power supply potential 10b Second power supply potential 11c, 12a, 13a, 16a, 17a, 47a Current source

Claims (8)

[Claims] A first output signal corresponding to the first input signal and a second output signal corresponding to the first input signal;
A differential amplifier that outputs a second output signal with respect to the input signal; a reference voltage that is a voltage value of the first and second input signals that causes the differential amplifier to be in a cutoff state; And supplies the start auxiliary current to an output stage of the differential amplifier corresponding to an input signal exceeding the reference voltage among the first and second input signals. A start circuit having a current supply means for supplying the start auxiliary current to an output stage of the differential amplifier when the differential amplifier is in a cutoff state. 2. A first output amplifier, which receives a first output signal of the differential amplifier as an input and outputs a third output signal that is an inverted amplification, to an output stage of the differential amplifier circuit, A second output amplifier that receives a second output signal of the amplifier as an input and outputs a fourth output signal that is an inverting amplification, wherein the start auxiliary current of the current supply unit of the start circuit is equal to the first and second start signals. 2. The fully differential amplifier according to claim 1, wherein the amplifier is connected to an input stage of the output amplifier. 3. A first output amplifier which outputs a third output signal which is an inverted amplification to a first output signal of the differential amplifier at an output stage of the differential amplifier circuit, A second output amplifier that receives a second output signal of the amplifier as an input and outputs a fourth output signal that is an inverting amplification, wherein the current supply means of the start circuit includes an inverting amplifier in an output stage; 2. The fully differential amplifier according to claim 1, wherein a start auxiliary current of said current supply means is connected to output stages of said first and second output amplifiers via said inverting amplifier. 4. A feedback reference voltage, which is a target steady-state voltage of the third and fourth output signals, and an intermediate potential between the third and fourth output signals are inputted and compared with the feedback reference voltage. A common feedback circuit that supplies a negative feedback signal to an input stage of the differential amplifier so that an intermediate potential is equal to the feedback reference voltage; and a first and a second input signal of the differential amplifier are connected to the feedback reference voltage. 4. The fully differential amplifier according to claim 2, wherein the fully differential amplifier is asymptotically stabilized. 5. A differential amplifier comprising: a first transistor having a first polarity having a gate connected to the first input signal; a gate connected to the second input signal; and a source connected to the first input signal. A second transistor having a first polarity connected to the source of the first transistor, a first current source connected between the sources of the first and second transistors and a first power supply potential, A drain of the first transistor connected to a drain, a third transistor of a second polarity to which a second power supply potential is applied to a source, and a drain of the second transistor connected to a drain;
5. The transistor according to claim 1, further comprising a fourth transistor having a second polarity to which a source is applied with the second power supply potential.
Item 7. The fully differential amplifier according to the item. 6. The start circuit includes a first power supply potential, a current source connected to the first power supply potential, and a fifth to an eighth transistor having a source connected in common and connected to the current source. And a second power supply potential, wherein the gate of the fifth transistor is connected to the first input signal, the drain is connected to the second power supply potential, and the gate of the sixth transistor is the second power supply potential. The seventh transistor is connected to the reference voltage, the output of the drain is used as the first start auxiliary current, and the eighth transistor is connected to the second power supply potential. 4. The fully differential amplifier according to claim 1, wherein a gate of the differential amplifier is connected to the reference voltage, and an output of the drain is used as the second start auxiliary current. 7. The start circuit includes a first power supply potential, a current source connected to the first power supply potential, and a fifth to a seventh transistor having a source connected in common and connected to the current source. An eighth transistor having a different polarity from the fifth to seventh transistors, and a second power supply potential. The fifth transistor has a gate connected to the first input signal, and a drain connected to the second input signal. The sixth transistor is connected to the second input signal, the drain is connected to the second power supply potential, and the gate of the seventh transistor is connected to the reference voltage. 2. A drain connected to a gate and a drain of the eighth transistor, wherein a gate of the eighth transistor is used as the start auxiliary current and a source is connected to the second power supply potential.
4. The fully differential amplifier according to any one of items 3 to 3. 8. The transistor according to claim 1, wherein the start circuit includes a first power supply potential, a current source connected to the first power supply potential, and fifth to seventh transistors having a common source and connected to the current source. An eighth transistor having a different polarity from the fifth to seventh transistors, and a second power supply potential. The fifth transistor has a gate connected to the first input signal, and a drain connected to the second input signal. The sixth transistor is connected to the second input signal, the drain is connected to the second power supply potential, and the gate of the seventh transistor is connected to the reference voltage. A drain connected to a gate and a drain of the eighth transistor, a gate of the eighth transistor used as the start auxiliary current, and a source connected to the second power supply potential; Fed back circuit comprises first having the same polarity as the fifth to seventh transistors of the start circuit 9
And a tenth transistor having the same polarity as the eighth transistor. The ninth transistor has a gate connected to the intermediate potential, a source connected to the current source, and a drain connected to the first transistor.
A source of the tenth transistor is connected to the second power supply potential, a drain is connected to the ninth drain,
8. The all-operating amplifier according to claim 7, wherein a gate is connected to the ninth drain, and an output at a connection point of the gate is provided to the operational amplifier as a negative feedback signal.