JP2000304883A - Time synchronization method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a time synchronization method capable of accurately synchronizing time of plural time reception devices as slave stations with time of a time transmission device as a master station, accurately synchronizing the time among the time reception devices, and immediately synchronizing time of an added time reception device. SOLUTION: In this synchronization method, a transmission prohibition/ permission selection part 303 for time data and a sampling clock is provided in a time transmission device and controlled such that the transmission prohibition/permission selection part 303 has a transmission prohibition state in the case that a data propagation delay time is not yet measured, and that the transmission prohibition/permission selection part 303 has a permission state only when the measurement of the data propagation delay time is completed and transmission of the sampling clock and the time data corrected by a delay time adjustment part 304 is possible. Thereby, the previously corrected time data can be transmitted to an added time reception device, and not only time synchronization among plural existing time reception devices but also time synchronization between the added time reception device and the existing time reception devices can be immediately executed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time synchronizing system, and more particularly to a time synchronizing system which can accurately synchronize the times of a plurality of time receiving devices as slave stations with a time transmitting device as a master station. The present invention relates to a time synchronization method for an information processing device that can accurately synchronize the time between the information processing device and the information processing device.

[0002]

2. Description of the Related Art FIG. 12 shows a time synchronization system disclosed in Japanese Patent Application Laid-Open No. 10-285140 as an example of this type of time synchronization system.

The master station (time transmitting device) 1 includes a high-precision oscillator 11 for generating a reference clock signal S1, a clock 12 for outputting a reference time signal S2 based on the reference clock signal S1 from the high-precision oscillator 11, The reference time signal S2 output from the clock 12 is transmitted to the master station 1 and the slave station 2 as described later.
And a time signal correction circuit 13 that corrects the correction based on the data propagation delay time T and outputs the corrected time signal S3.

The master station 1 further includes a trigger signal generator 14 for outputting a trigger signal S4 as a reference signal for measuring a data propagation delay time T from the master station 1 to the slave station 2,
The direct spread transmitter 15 that directly spreads and modulates the reference clock signal S1, the corrected time signal S3, and the trigger signal S4 and transmits the spread signal from the transmitting antenna 16a, and the trigger signal S4 returned from the slave station 2 is received by the receiving antenna 16b. It includes a direct spread receiver 17 for performing direct spread demodulation and a delay time calculator 18 for calculating a data propagation delay time T between the master station 1 and the slave station 2.

On the other hand, the slave station (time receiving device) 2 is
From the reference clock signal S1, the correction time signal S3, and the trigger signal S4 received by the receiving antenna 21b for direct spread demodulation, and the received correction time signal S3 and reference clock signal S1. Clock 23, and a direct spread transmitter 24 that directly spread modulates the received trigger signal S4 and returns it from the transmitting antenna 21a to the main station 1.

Next, the operation of the time synchronization method will be described.

First, on the master station 1 side, a high-precision oscillator 11 generates a reference clock signal S1 which is used as a reference when counting the time to synchronize, and a clock 12 is controlled based on the reference clock signal S1. The time is counted, the reference time signal S2 is generated, and the time signal correction circuit 13
Output to

The time signal correction circuit 13 corrects the reference time signal S2 sent from the clock 12 by advancing the time by the data propagation delay time T calculated by the delay time calculator 18 as described later. , Correction time signal S3
And outputs it to the spreading transmitter 15 directly.

The trigger signal generator 14 outputs a trigger signal S4 generated based on the reference clock signal S1 directly to the spread transmitter 15, and outputs the reference clock signal S1, the correction time signal S3, Trigger signal S
4 is transmitted from the transmitting antenna 16a to the slave station 2 side.

In the slave station 2, the reference clock signal S1, the corrected time signal S3, and the trigger signal S4 from the master station 1 are received by the direct spread receiver 22 via the receiving antenna 21b, and the trigger signal S4 is directly spread. A reply is sent from the transmitter 24 to the master station 1 via the transmission antenna 21a.

[0011] In the master station 1, the trigger signal S 4 sent back from the slave station 2 is directly received by the spreading receiver 17 via the receiving antenna 16 b and input to the delay time calculator 18. The delay time calculator 18 calculates a data propagation delay time T according to the distance between the master station 1 and the slave station 2 based on the trigger signal S4, and a time signal correction circuit to advance the time by the data propagation delay time T in advance. Instruct 13.

The time signal correction circuit 13 converts the reference time signal S2 input from the clock 12 into the data propagation delay time T
Then, a correction time signal S3 is transmitted to the slave station 2 side. Therefore, even if the distance between the master station 1 and the slave station 2 changes, the time synchronization between the master station 1 and the slave station 2 can always be quickly and accurately performed.

[0013]

However, the conventional method has the following problems.

First, in the case of the conventional method, after the power of the master station 1 is turned on after being turned on, the time is corrected to the slave station 2 for a time corresponding to the installation distance between the master station 1 and the slave station 2. There is a period during which time data is not transmitted and synchronization is not achieved.

That is, the time transmitting units 12 and 1 of the main station 1
Since there is neither hardware nor a program for disabling the transmission disable state by disabling the reference clock signal S1, the reference clock signal S1, and the reference clock signal S1, immediately after the main station 1 is powered on and started up, , Master station 1 has a trigger signal S4 for measuring data propagation delay time T with slave station 2.
Is transmitted to the slave station 2 at the same timing as the transmission of the slave station.

On the other hand, the trigger signal S4 returning from the master station 1 to the master station 1 again via the slave station 2 takes a longer time to return as the installation distance between the master station 1 and the slave station 2 increases. Therefore, the data propagation delay time T is measured based on the trigger signal, and the corrected time signal S3 after correcting the time and synchronizing the time by that time is transmitted to the slave station 2 before being corrected again. The time data may be transmitted to the slave station 2 at least several times, or several tens of times when the installation distance is long, and during this time, the time synchronization between the master station 1 and the slave station 2 may not be synchronized. Can not.

Even when there are a plurality of slave stations 2, the same problem as described above occurs until the time correction time is determined by measuring each data propagation delay time T.
During this time, not only the master station and the slave stations but also time synchronization between the slave stations cannot be obtained.

Further, even when the slave station 2 is added, the additional slave station is already connected to the master station 1 until the data propagation delay time T of the added slave station 2 is measured and the time data correction time is determined. Therefore, time synchronization with the existing slave station 2 which is performing time synchronization cannot be performed.

Second, in the case of the conventional system, the main station 1
Must constantly send the trigger signal S4 by the trigger signal generator 14 regardless of whether the slave station 2 is connected or not.

That is, since the master station 1 has no means for detecting that the slave station 2 is connected, the trigger signal S4
Is not transmitted, it is not possible to measure the data propagation delay time T and find the timing for correcting the time data.

Therefore, the present invention has been made in view of the above problems, and can accurately synchronize the times of a plurality of time receiving apparatuses as slave stations with a time transmitting apparatus as a master station. It is an object of the present invention to provide a time synchronization method in which the time between time receiving apparatuses can be accurately synchronized, and the time of an added time receiving apparatus can be immediately synchronized.

[0022]

In order to achieve the above object, according to the first aspect of the present invention, there is provided a time transmitting device as a master station for constantly transmitting time data, and the time transmitting device is connected to the time transmitting device through a communication line. A time synchronization system for synchronizing the clock of the own station with the time transmission device by taking in time data transmitted from the time transmission device, comprising one or more time reception devices as slave stations; Means for reporting a power-on notification to the time transmitting device when power is supplied to the time receiving device, and looping back a signal for measuring a data propagation delay time between the time transmitting device and the time receiving device returned from the time transmitting device. Means for starting the measurement of the data propagation delay time between the time sending device and the time receiving device in association with each time receiving device. Means for measuring the delay time, means for storing the measurement result, and a loop-back means for the time receiving device again using the power-on notification signal sent from the time receiving device as a data propagation delay time measuring signal. Means for measuring the data propagation delay time between the time transmitting apparatus and the time receiving apparatus using the data propagation delay time measurement signal looped back from the time receiving apparatus, and the data propagation delay of each time receiving apparatus. A time receiving device that compares the time measurement results and has the largest data propagation delay time, and a delay time adjusting unit that corrects the data propagation delay time of the other time receiving devices so as to match the data propagation delay time. Things.

According to a second aspect of the present invention, in the time synchronization system according to the first aspect, when the measurement of the data propagation delay time between the time transmitting device and the time receiving device has not been performed, Means is provided in which transmission of time data and a sampling clock for capturing the time data is prohibited, and transmission is permitted after the completion of measurement of the data propagation delay time.

According to the first aspect of the invention, the time data and the sampling clock sent from the time sending device to each time receiving device are measured for the data propagation delay time before being sent, and The time is corrected by the time required to reach the time receiving device. For this reason, the time data and the sampling clock transmitted to the additional time receiving devices as well as the plurality of existing time receiving devices can be synchronized with the existing time receiving devices from the first time. Therefore, it is possible to immediately synchronize the time of the added time receiving device as well as the other time receiving devices operating in the time synchronized state, as well as between the existing plurality of time receiving devices.

According to the second aspect of the present invention, the start and stop of the delay time measuring circuit required to reach the time receiving device are controlled in conjunction with the turning on of the time receiving device. Therefore, the time sending device can measure the data propagation delay time between the time sending device and the time receiving device without being conscious of whether or not the time receiving device is connected.

[0026]

Next, a specific example of an embodiment of a time synchronization system according to the present invention will be described with reference to the drawings.

First, with reference to FIG. 1, a description will be given of a connection state between a time transmitting device and each time receiving device in one embodiment of the time synchronization method according to the present invention.

The time transmitting apparatus 101 as the master station is connected to _n time receiving apparatuses 102 _{1 to} 102 n as slave stations by a wired or wireless communication line. Time data 105 and a sampling clock 106 used when each time receiving device captures the time are transmitted from the time transmitting device 101 to each of the time receiving devices 102 _{1 to} 102 _n . _{From 1 to} 102 _n, a data propagation delay time measurement signal 107 for measuring the time required to transmit the time data is transmitted to the time transmission device 101.

FIG. 2 shows an example of a circuit configuration for measuring the delay time installed in the time transmitting device 101 and the time receiving devices 102 _{1 to} 102 _n .

As shown in the figure, the time sending device 101 is provided with a frequency oscillator 201 used for counting increment for measuring a data propagation delay time T, and each of the time receiving devices 102 _{1 to} 102 _n. , Delay time measuring circuits 103 _{1 to} 103 _n are provided.

Each of the delay time measuring circuits 103 _{1 to} 103 _n
Is a data delay time measurement start / stop unit 202 for starting and stopping the measurement of the data propagation delay time T, and a CPU (central processing unit) for performing a process of delaying data transmission based on the measurement result of the data propagation delay time. 203, a data delay time measurement unit 204 for measuring a data propagation delay time T between the time reception devices 102 _{1 to} 102 _n corresponding to the time transmission device 101, and a measurement value storage unit 205 for storing the measurement results And a transmitting unit 2 for transmitting a signal from the time transmitting device 101 to the corresponding time receiving devices 102 ₁ to 102 _n .
07, and receiving units 206 and 208 for receiving signals from the corresponding time receiving devices 102 _{1 to} 102 _n .

Further, each of the time receiving devices 102 ₁ to 102 ₁ to 10
2 _n includes transmitting units 209 and 211 for transmitting signals to the time transmitting device 101, a receiving unit 210 for receiving a signal from the time transmitting device 101, and the time transmitting device 101 when the power of the own station is turned on. A power-on notification unit 212 for reporting power-on.

Now, the power of the time transmission device 101 is turned on.
Then, each delay time measuring circuit 103 ₁~ 103_ndata from
The delay time measurement unit 204 and the measured value storage unit 205 are initialized
And both outputs become invalid.

The data delay time measuring section 204 does not measure the data propagation delay time T because the counting operation is first stopped by the stop instruction from the data delay time measuring start / stop section 202. Then, for example, when the power of the time receiving device 102 ₁ is turned on, the time receiving device 102 ₁
2 ₁ Powering notifies the time the delivery device 101 from power notification unit 212, transmission unit 211 and the receiver 208
The power-on notification signal is sent to the data delay time measurement start / stop unit 202.

Data delay time measurement start / stop unit 202
Issues a measurement start instruction to the data delay time measurement unit 204 in response to the transmitted power-on notification signal. Upon receiving the measurement start instruction, the data delay time measurement unit 204 starts measuring the data propagation delay time T. The power-on notification signal transmitted from the time receiving device 102 ₁ is transmitted from the transmitting unit 207 of the delay time measuring circuit 103 _{1 to} the delay time measuring device 210 and the transmitting unit 209 of the time receiving device again. It is looped back to the data receiving unit 206 of the circuit 103 _1, data delay time measurement start / stop 2
Reach 02.

Data delay time measurement start / stop unit 202
Receives the looped-back signal, issues an instruction to stop measurement to the data delay time measuring unit 204, and reports the instruction to the CPU 203. Upon receiving the measurement stop instruction, the data delay time measuring unit 204 stops measuring the data propagation delay time T, and
Is stored in the measured value storage unit 205.

Then, the CPU 203 that has received the report can know the data propagation delay time T between the time sending device 101 and the time receiving device 102 ₁ by reading the contents stored and stored in the measured value storage unit 205. . Also, as illustrated, by correspondingly providing the delay time measuring circuit 103 ₁ 10 @ 2 to 10 @ 3 _n each time the receiving apparatus 102 ₁ to 102 _n, each time the receiving device and time delivery device 101 102 ₁ -
102 _n can be individually measured.

FIG. 3 shows an example of a circuit configuration for generating a delay time installed in the time transmitting device 101 and the time receiving devices 102 _{1 to} 102 _n .

As shown in the figure, the time transmitting apparatus 101 is provided with a time generating section 301 for generating and outputting time data and a sampling clock, and also corresponds to each of the time receiving apparatuses 102 _{1 to} 102 _n. , And delay time generation circuits 104 _{1 to} 104 _n are provided.

Each of the delay time generation circuits 104 _{1 to} 104 _n
Is a delay time adjusting unit 302 that adjusts so as to delay the time required for the time data and the sampling clock to reach the corresponding time receiving devices 102 _{1 to} 102 _n.
a and 302b, a transmission prohibition / permission selecting section 303 for prohibiting or permitting transmission of the time data and the sampling clock to the corresponding time receiving devices 102 ₁ to 102 _n , A transmitting unit 304a for transmitting the sampling clock to the time receiving device;
304b.

Each of the time receiving devices 102 ₁ to 102 ₁ to 10
2 _n has corresponding delay time generation circuits 104 _{1 to} 104 _n
And receiving units 305a and 305b for receiving the time data and the sampling clock transmitted from the.

Now, when the power of the time transmitting device 101 is turned on, the transmission prohibition / permission selection unit 303 of each of the delay time generation circuits 104 _{1 to} 104 _n is initialized and becomes a transmission prohibition state. From 304, the time data and the sampling clock are not sent to the time receiving devices 102 ₁ to 102 _n .

However, as described in FIG. 2, the data propagation delay time T is measured, and the delay time adjusting units 302a and 302b delay the time data and the sampling clock by the time required to reach the corresponding time receiving device. When the adjustment is completed as described above, the transmission prohibition / permission selection unit 303 changes the mode from transmission prohibition to the permission state, and transmits the time data to the corresponding time receiving devices 102 _{1 to} 102 _n via the transmission units 305a and 305b. Start sending the sampling clock.

Each of the time receiving apparatuses 102 _{1 to} 102 _n receiving the time data and the sampling clock corresponding to the own station by the receiving units 305 a and 305 b adjusts the time of the own station to the time data. In this way, the time of each time receiving device 102 _{1 to} 102 _n can be accurately synchronized with the time of the time transmitting device 101, and at the same time, the time synchronization between each time receiving device 102 _{1 to} 102 _n can be obtained. it can.

Next, a specific method of measuring the delay time in the above embodiment will be described with reference to a specific circuit example of the delay time measuring circuit in FIG. 4 and a timing chart of the measurement of the delay time in FIG. .

In the following description, the operation of the _first time receiving device 102 ₁ will be described on behalf of the plurality of time receiving devices 102 _{1 to} 102 _n , but other time receiving devices 102 ₂ will be described. -102 _n operate similarly. Further, the time sending device 101 and the time receiving device 102 ₁
To 102 for the order of _n power-on, at time delivery apparatus 101 in which sends time data earlier, the time reception apparatus 102 ₁ to 102 _n-side capturing time data becomes later.

First, when the power source of the time transmitting apparatus 101 is turned on, the power-on reset circuit 402 keeps the signal S1 at the low potential L for a certain period of time and then changes to the high potential H (FIG. 6). Reference number 701). Therefore, the delay time measurement counter 404 and the measured value storage input register 40
6 is reset and initialized (reference numeral 702 in FIG. 6).

The receiver 410 has a high potential H internally.
, The signal S2 inverted at the output terminal has the low potential L, and the receiver 408 has the same configuration. Therefore, the signal S4 via the NOT gate 407 has the high potential H.
And an instruction to start / stop delay time measurement
The output signal S5 of the gate 405 becomes low potential L (FIG. 6).
703).

Therefore, the counter 404 for measuring the delay time is used.
Is in a state where counting is stopped. In this state,
When the power of the time receiving apparatus 102 ₁ is turned on, the power-on reset circuit 415 changes the signal S14 to the high potential H after maintaining the low potential L for a certain period of time (reference numeral 7 in FIG. 6).
04).

Then, the driver 413 and the receiver 410
, The signal S2 is changed from the low potential L to the high potential H (reference numeral 705 in FIG. 6), and the output signal S5 of the AND gate 405 for instructing start / stop of the delay time measurement is changed to the signal S3. Therefore, the delay time measurement counter 404 starts counting at the falling edge of the signal S3.
(Reference numeral 706 in FIG. 6).

The signal S2, which has changed from the low potential L to the high potential H, is notified from the driver 409 to the receiver 412 of the time receiving device 102 ₁ , and loops back to the receiver 408 of the time transmitting device 101 via the driver 411. Will be back. Then, the signal S4 is inverted by the NOT gate 407 and becomes the low potential L, and the measurement of the delay time is started /
The signal is input to the AND gate 405 for instructing stop (FIG. 6
707).

Accordingly, since the signal S4 of the AND gate 405 for instructing start / stop of the measurement of the delay time is at the low potential L, the signal S5 is also in the L state, and the counter 404 for measuring the delay time stops counting ( Reference numeral 70 in FIG.
8) The count value is stored in the input register 406.

Further, the signal S4 is supplied to the CPU 203 (FIG. 3).
The CPU 203 that has received the interrupt reads the count value stored in the input register 406, and performs a delay time generation process described later to generate a signal between the time sending device 101 and the time receiving device 102 _1. Can be obtained.

Next, with respect to a specific method of delay time adjustment in the above embodiment, a specific circuit example of the delay time generation circuit of FIG. 5, a timing chart of FIGS. 7A and 7B and a data format will be shown. A description will be given with reference to FIG. 8, a timing chart of the delay time generation processing in FIG. 8, and a flowchart of the data propagation delay time calculation processing in FIG.

First, a method of sampling time data will be described.

The time data from the time sending device 101 is 1
It is sent out every second. The timing at which the time data is sampled by the time receiving device 102 ₁ is determined by detecting the synchronization pattern of the sampling clock.
Time data is sampled every 6 μsec (FIGS. 7A and 7B).

Now, when the power of the time sending device 101 is turned on, the time generating section 501 and the delay time selecting section are selected by the power-on reset signal S15 sent from the power-on reset circuit 402 (see FIG. 4). The decoder 503 is initialized (reference numeral 801 in FIG. 8).

After initialization, the time generator 501 converts the time data and the sampling clock to the delay generator 502.
a, 502b and a delay generator 502
A and 502b send the delayed data from the respective output terminals to the transmission inhibition / permission AND gates 505a and 505b (signals S22 to S29 in FIG. 8).

However, the delay time selection decoder 50
3 has a high potential H due to the initialization, and is inverted by the NOT gate 504 (signals S18 to S21 and S38 in FIG. 8). Therefore, the output of the transmission inhibit / permit AND date 505 becomes low potential L, and the time data and the sampling clock are not transmitted to the time receiving device 102 ₁ .

In calculating the data propagation delay time T, the CPU 203 (FIG. 3) is interrupted by the data propagation delay time measurement signal S4 of FIG. 4 (step ST1 of FIG. 9) as described above. 4, the counter value of the input register 406 is read (step ST2 in FIG. 9). Since this value is a value that has reciprocated between the time sending device 101 and the time receiving device 102 ₁ , the value obtained by halving the value is received by the time receiving device. The data propagation delay time T of the device 102 ₁ is assumed.

Then, a comparison is made with the other time receiving apparatuses 102 _{2 to} 102 _n for which the measurement of the data propagation delay time has been completed (step ST3 in FIG. 9), and the time receiving apparatus having the largest data propagation delay time T is obtained. 9 is adjusted by the delay time selection decoder 503 so as to be delayed according to
Step ST4~ST9), and sends the time data and the sampling clock from the driver 507 to the scheduled reception apparatus 102 _1.

The above processing is performed by a plurality of time receiving apparatuses 102 ₁
Perform for ~ 102 _n . As a result, the time data and the sampling clock transmitted to each of the time receiving apparatuses 102 _{1 to} 102 _n are adjusted to match the time receiving apparatus furthest from the time transmitting apparatus 101.

Therefore, all the time receiving apparatuses 102 ₁ to 102 ₁
102 _n is synchronized with the time of the time sending device 101, and at the same time, the time between all the time receiving devices 102 _{1 to} 102 _n is also accurately synchronized.

Next, while the time synchronization operation is being performed between the plurality of time receiving devices as described above, one time receiving device is further added (hereinafter, this is referred to as the time receiving device 102α). The method of time synchronization between these time receiving devices in the case will be described using specific numerical values.

As an example, the current time sending device 1
The data propagation delay time T from 01 to the farthest time receiving device (hereinafter referred to as the time receiving device 102β) is 48
0 nsec, and the oscillation cycle of the oscillator 401 (FIG. 4) is 160
nsec, the data propagation delay time per meter of the transmission cable is 4 nsec / m, and the line length of the interface cable between the time transmitting device 101 and the time receiving device 102α is 60.
m, and delay generators 502a and 502b (FIG. 5)
Is delayed from the signal S22 to the signal S25 and from the signal S26 to the signal S29 in steps of 80 nsec.

When the power of the added time receiving device 102α is turned on, the signal S2 in FIG. 4 becomes high potential H, and the counter 404 in FIG. 4 starts the counting operation. Further, the signal S2 is looped back to the time transmitting device 101 via the time receiving device 102α again, and stops the counting operation of the counter 404 in FIG.

Thereafter, an interrupt is notified to the CPU 203 (FIG. 2), and the count value of the input register 406 of FIG. 4 is read. When the count value of the input register 406 was read under the above conditions, the count value was "3". Also, the count value of the time receiving device 102β =
It was "6". Therefore, the added time receiving device 102
The difference between the count value of α and the count value of the farthest time receiving apparatus 102β is 6−3 = 3, and 80 nsec × 3 = 240 nsec.
This means that a delay time difference of c has occurred.

Therefore, the time synchronization between the time receiving devices can be realized by delaying the time data and the sampling clock to be transmitted to the added time receiving device α by 240 nsec in accordance with the farthest time receiving device 102β. . In this case, the output signal S20 of the decoder 503 in FIG.
By setting only the low potential L, the delay generator 502
The output signals S24 and S28 of the signals a and 502b become valid, and can be transmitted to the time receiving device α in which the time data delayed by 240 nsec and the sampling clock are added (the signals S32, S34, and S35 in FIG. 8).

On the other hand, if the added time receiving device 102α is the furthest time receiving device,
The time data and the sampling clock to be sent to 2α can be obtained by setting only the output signal S38 of the decoder 503 to the low potential L, thereby enabling the sending / prohibiting AND gate 505a,
The time synchronization between the time receiving devices can be realized by delaying the time data and the sampling clock to be transmitted to the other time receiving devices without delaying the signals S37 and S40 of the 505b to be valid.

[0070] using three times the receiving apparatus 102 ₁ to 102 _3, each time the receiving device and time delivery device 101 102 ₁ to 1
02 Interface Cable length between _3, between times receiving apparatus 102 ₁ and the time delivery device → 30
m Between the time receiving device 102 ₂ and the time transmitting device → 60
m Between the time receiving device 102 ₃ and the time sending device → 10
In the case of 0 m, comparative experiments were performed for the case where the time synchronization method of the present invention was not used and the case where the time synchronization method was used. The results are shown in FIGS.

[0071] When not used the time synchronization method of the present invention, as shown in FIG. 10, each time the receiving apparatus 102 ₁
Data propagation delay occurs for different to 102 every _3, but can not achieve time synchronization between the time the receiving apparatus 102 ₁ to 102 _3, when using the time synchronization method of the present invention, shown in FIG. 11 Thus, the farthest time receiving device 102 ₃
In this case, the time data and the sampling clock of each of the time receiving devices 102 ₁ and 102 ₂ can be delayed and made coincident with each other, and time synchronization between the time receiving devices can be realized.

[0072]

According to the time synchronization method according to the first aspect of the present invention, the time data and the sampling clock transmitted from the time transmitting device to each time receiving device are measured for the data propagation delay time before being transmitted. Is corrected by the time required to reach the farthest time receiving device,
The time synchronization with the other time receivers operating in the time synchronization state from the first transmission of the time data and the sampling clock is performed not only between the existing plurality of time receivers but also for the added time receiver. It is possible to do.

According to the second aspect of the present invention, the start and stop of the delay time measurement circuit required to reach the time receiving device are controlled in synchronization with the power-on of the time receiving device. The device can measure the data propagation delay time between the time sending device and the time receiving device without being conscious of whether or not the time receiving device is connected.

[Brief description of the drawings]

FIG. 1 is a connection state diagram between a time sending device and a time receiving device in a time synchronization method according to the present invention.

FIG. 2 is a block diagram of a delay time measuring circuit in the time synchronization method according to the present invention.

FIG. 3 is a block diagram of a delay time generation circuit in the time synchronization method according to the present invention.

FIG. 4 is a diagram showing a specific circuit example of a delay time measuring circuit in the time synchronization method according to the present invention.

FIG. 5 is a diagram showing a specific circuit example of a delay time generation circuit in the time synchronization method according to the present invention.

FIG. 6 is a timing chart of a delay time measurement process in the time synchronization method according to the present invention.

7A is a timing chart of time data and sampling in the present invention, and FIG. 7B is a diagram showing a data format of time data to be transmitted.

FIG. 8 is a timing chart of delay time generation in the present invention.

FIG. 9 is a flowchart of a delay time calculation process according to the present invention.

FIG. 10 is a reception timing chart of each time receiving apparatus when the time synchronization method according to the present invention is not applied.

FIG. 11 is a reception timing chart of each time reception device when the time synchronization method according to the present invention is used.

FIG. 12 is a block diagram illustrating an example of a conventional time synchronization method.

[Explanation of symbols]

Reference Signs List 101 time transmission device 102 _{1 to} 102 _n time reception device 103 _{1 to} 103 _n delay time measurement circuit 104 _{1 to} 104 _n delay time generation circuit 201 frequency oscillator 202 data delay time measurement start / stop unit 203 CPU 204 data delay time measurement unit 205 Measured value storage unit 212 Power-on notification unit 301 Time generation unit 302a, 302b Delay time adjustment unit 303 Time data and sampling clock transmission prohibition / permission selection unit 304a, 304b Transmission unit 305a, 305b Receiving unit 404 Delay time measurement counter 405 AND gate for instructing start / stop of delay time measurement 406 Input register for storing measured value 407, 504 NOT gate 501 Time data generator 502 Delay generator 503 Decoder for delay time selection 505 Time data and sampling Lock of sending enable / disable for the AND gate

Claims (2)

[Claims] 1. A time transmitting device as a master station for constantly transmitting time data, and a plurality of time receiving devices as slave stations connected to the time transmitting device, wherein a time transmitted from the time transmitting device is provided. A time synchronization method for synchronizing a clock of the own station with a time sending device by taking in data, wherein a means for reporting a power-on notification to the time sending device when power is turned on to each of the time receiving devices; Means for looping back the signal for measuring the data propagation delay time returned between the time sending device and the time receiving device, and the time sending device is provided with a time corresponding to each time receiving device. Means for starting measurement of the data propagation delay time between the sending device and the time receiving device; means for measuring the data propagation delay time; means for storing the measurement result; Means for transmitting the power-on notification signal sent from the clock receiving device as a data propagation delay time measuring signal to the loop-back means of the time receiving device again, and a signal for measuring the data propagation delay time looped back from the time receiving device Means for measuring the data propagation delay time between the time sending device and the time receiving device, and comparing the measurement result of the data propagation delay time of each time receiving device with the time receiving device having the largest data propagation delay time And a delay time adjusting means for correcting the data propagation delay times of the other time receiving apparatuses so as to match each other. 2. When the data transmission delay time between the time transmitting device and the time receiving device has not been measured, the time transmitting device transmits time data and a sampling clock for capturing the time data. 2. The time synchronization system according to claim 1, further comprising means for prohibiting transmission after the completion of measurement of the data propagation delay time.