JP2897684B2 - Wireless transceiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention is applied to a digital cordless telephone, a PHS (Personal Handy Phone), etc.
The present invention relates to a wireless transmission / reception device that performs intermittent reception by detecting reception timing with an internal clock signal of a child device after the child device detects the timing of intermittent reception based on transmission from a base station.

[0002]

2. Description of the Related Art Recently, in a digital cordless telephone or the like, a time division multiplexing system (TDMA) for transmitting control information of a radio channel, incoming information and the like between a base station (master) and a slave in a time division and multiplex manner. ) Has been adopted. In the transmission / reception between the master unit and the slave unit, the slave unit intermittently receives only the signal addressed to itself, thereby reducing the power consumption by the built-in battery.
That is, the standby reception time (standby time) is made as long as possible.

In this case, during standby reception, only circuits necessary for the operation are operated to reduce power consumption. Then, when a signal addressed to itself is received, another circuit is activated. Further, in order to reduce power consumption, the intermittent reception timing is performed at a low speed. In other words, the internal clock generating circuit generates a low-speed clock signal.

FIG. 6 is a block diagram showing a main configuration of a receiving system in a slave unit of a conventional digital cordless telephone. The example shown in FIG. 6 is a high-frequency signal processing unit (high-frequency amplifier circuit, frequency conversion circuit, and intermediate frequency amplifier circuit) of the receiving unit 1
The received data clock signal generating section 1b reproduces a clock signal from the intermediate frequency signal output by 1a, and the received data signal Sa demodulated by the received data generating section 1c is output by this clock signal.

In this case, the intermittent operation signal S from the control unit 3
b and the intermittent reception clock signal Sc from the clock signal generation circuit 4, the intermittent reception timing control unit 5 sends the intermittent reception timing signal Sd to the reception unit 1 to control the intermittent reception operation.

FIG. 7 is a diagram for explaining this intermittent reception operation. In FIG. 7, the base station transmits, by TDMA, a downlink control signal to the slave unit necessary for transmission and reception of control information of a wireless channel, incoming call information, and the like, and the slave unit controls the reception timing based on the downlink control signal. doing.

The TDMA frame S shown in FIG.
201 includes a slot T for downlink transmission to a slave and a reception slot R for uplink from a slave, and includes a time axis T1, T2,
It is composed of slots divided into eight by T3, T4 and R1, R2, R3, R4. The base station transmits the downlink control signal S202 shown in (b) of FIG. 7 in the slot Tl shown in (c) of FIG. This transmission signal has a constant interval Ti
During this period, twelve types of signals "1 to 12" are transmitted, and this is repeated. The cycle Tl for repeatedly transmitting these 12 types of signals is “Ti × 12”.

[0008] Here, when the power of the slave unit is turned on (operation starts).
Operates irrespective of the control signal timing transmitted by the base station and receives all transmission signals (radio waves). And
When an information signal of a wireless channel is received and a signal interval and an arrangement state transmitted by the base station are determined, only a signal (signal 2 in the example of FIG. 7) necessary for self-call is intermittently received. In other words, the system enters a state of waiting for an incoming call. Except for the reception in this case, the power supply to the circuits other than the necessary circuits is stopped to reduce the power consumption, and the long-time standby operation can be performed.

As described above, the conventional slave unit detects the timing of the intermittent reception based on the transmission from the base station, and thereafter performs the intermittent reception by setting the reception timing by the internal clock signal.

[0010]

However, in the above-described conventional digital cordless telephone, the longer the interval between intermittent operations (reception), the lower the power consumption, but the interval between intermittent operations (reception). If the time is too long, the operation start for an incoming call from the base station is delayed. Conventionally, the interval is set to 1 to 2 seconds.

In this case, in the slave unit, the intermittent reception timing control unit 5 controls the intermittent operation by the intermittent reception clock signal Sc from the clock signal generation circuit 4 in FIG. Intermittent reception clock signal Sc and a clock signal transmitted by the base station (clock signal in reception data clock signal generation section 1b of reception section 1)
There is an error in the frequency. Therefore, the longer the intermittent operation interval is, the more the reception timing is shifted.

To solve this problem, the slave unit may perform signal processing using the high-precision intermittent reception clock signal Sc. However, a conventional clock generator has an error in its oscillation frequency. As shown in (d) and (e) of FIG. 7, the intermittent reception timing Tla due to the clock signal generated inside the slave unit is shifted from the cycle Tl.

In order to improve the accuracy of the oscillating frequency of the clock signal generating circuit 4, for example, it is necessary to use a high-precision crystal oscillator and to adapt the operating environment (temperature correction, voltage fluctuation, etc.). In this case, the design is troublesome, and the adjustment of the oscillation frequency at the time of manufacture takes time and costs. Furthermore, if the accuracy of the oscillation frequency is poor, it is difficult to quickly establish the reception timing, and the operation for this establishment is prolonged, resulting in an increase in power consumption.

As techniques for preventing such an increase in power consumption, a "wireless communication system" disclosed in JP-A-3-17418 and an "intermittent reception system" disclosed in JP-A-2-79526 are known. I have. In the former case, in order to reduce the current consumption during reception standby, the line between the transmitting and receiving stations is connected via the control channel until the connection of the communication channel is set by the line connection control signal. Temporarily connected. Then, at the time of this connection, a signal for determining the control timing is generated to correct the initial setting and the setting.

In this conventional example, although the current consumption at the time of waiting for reception can be reduced without deteriorating the reception rate of the control signal of the line connection, control for adjusting the control timing at both the transmitting and receiving stations is necessary. Further, there is a disadvantage that the configuration becomes complicated and the scale of the apparatus and the scale of signal processing increase.

In the latter example, in order to reduce power consumption, when it is determined that there is no incoming call to the own station, the receiving operation is stopped. However, the latter example has a drawback that, although power consumption is reduced, continuous reception cannot be performed.

The present invention solves such a disadvantage of the prior art, and it is possible to correct the intermittent reception timing only on the slave unit side without increasing the apparatus scale and signal processing scale. It is not necessary for the slave unit to generate a high-accuracy intermittent reception clock signal, which facilitates design and manufacture of the oscillation frequency adjustment, reduces costs, and enables quick and reliable reception timing. An object of the present invention is to provide a wireless transmission / reception device that is established and can reduce power consumption.

[0018]

In order to achieve the above-mentioned object, the present invention as defined in claim 1 provides a communication system between a base station and a plurality of slave units.
In the time division multiplex access, the
Communication by communication system, and the slave unit receives
Measure the accuracy of the intermittent reception clock signal from the
In a wireless transmitting and receiving device that corrects the missing reception timing,
A signal generated from a received signal from the base station is transmitted to the slave unit.
Clock signal for intermittent reception based on the
Outputs clock accuracy signal for intermittent reception that measures signal accuracy
Clock signal accuracy measuring means for intermittent reception,
The intermittent reception clock from the reception clock signal accuracy measurement means
Intermittent reception timing is corrected according to the accuracy of the signal
Count value of the intermittent reception clock signal
Counter that outputs the clock, and measures the clock precision signal for intermittent reception.
Outputs a correction value signal obtained by correcting the set value based on constant accuracy
Correction value calculation circuit, and counting from the counter
The value is compared with the correction value from the correction value calculation circuit to match.
Intermittent reception to match the intermittent reception timing when
Having a comparator for outputting a communication timing signal
It is configured to include a missing reception timing correction unit .

According to a second aspect of the present invention, there is provided a radio transmitting / receiving apparatus comprising: a base station;
Signal in time division multiplex access between a terminal and multiple slave units
Signal, perform communication by frame transmission of the downlink signal,
The slave unit receives the intermittent reception clock signal from the reception signal from the base station.
Radio that measures signal accuracy and corrects intermittent reception timing
In the transmitting / receiving device, the slave unit receives a signal from the base station.
Based on the received data clock signal generated from the received signal
An intermittent reception clock that measures the accuracy of the intermittent reception clock signal.
Clock for intermittent reception to output lock accuracy signal
A frequency divider that divides the signal
Counting the set value, and from the frequency divider circuit
Counter that stops counting by the divided output signal of
And the received data from the counter value and set value of this counter.
Of the intermittent reception clock signal to the data clock signal
Output the intermittent reception clock precision signal whose degree has been calculated.
Clock signal accuracy measurement for intermittent reception with an accuracy calculation circuit
From the intermittent reception clock signal accuracy measuring means.
Intermittent reception clock accuracy Intermittent reception according to the accuracy of the signal
Clock signal for intermittent reception to correct timing
Counter that outputs the count value of
Compensation that corrects the set value based on the measurement accuracy of the
A correction value calculation circuit for outputting a positive value signal, and the counter
And the correction value from the correction value calculation circuit.
And the intermittent reception timing is matched when they match.
To output the intermittent reception timing signal
And intermittent reception timing correction means having data .

[0020]

[0021]

The wireless transmission / reception device having such a configuration is based on a slave unit.
Received data clock signal generated from the received signal from the base station
The accuracy of the intermittent reception clock signal based on the
I have. And the measured intermittent reception clock precision signal
The reception timing for intermittent reception according to the accuracy of
I have. Therefore, for example, the reception timing at the base station
No need for correction, increasing device scale and signal processing scale
Generation of a high-precision intermittent reception clock signal
Need to be implemented.

[0022] In addition, time division multiple access (TDMA)
Communication between the base station and multiple slave units
Of the intermittent reception clock signal in the time division multiplexed connection
When each slave unit corrects the reception timing
Increase in equipment scale and signal processing scale
Wear.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the radio transmitting / receiving apparatus of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an embodiment of the wireless transmission / reception device of the present invention. FIG.
Shows a main configuration of a receiving system in the slave unit of the digital cordless telephone. The receiving system includes a receiving unit 10 for receiving a signal (radio wave) from a base station (base unit) (not shown) through an antenna Ant, and The unit 10 is provided with an intermittent reception timing control unit 11 for transmitting the intermittent reception timing signal S114 to control the intermittent reception operation.

Further, an intermittent reception clock signal accuracy measuring unit 12 for transmitting an intermittent reception clock accuracy signal S115 obtained by measuring the accuracy of the input reception data clock signal S110 to the intermittent reception timing control unit 11, and a reception data signal S111 And sends an intermittent operation signal S116 for instructing the intermittent operation of the receiving unit 10 to the intermittent reception timing control unit 11, and the intermittent reception clock signal S
An accuracy measurement control signal S11 for measuring the accuracy of 113
And a control unit 13 for sending 2 to the intermittent reception clock signal accuracy measurement unit 12. Further, there is provided a clock signal generation circuit 14 for generating the intermittent reception clock signal S113 and sending it to the intermittent reception timing control unit 11.

The receiving section 10 includes a high-frequency signal processing section 10a having a high-frequency amplifier circuit, a frequency conversion circuit, and an intermediate frequency amplifier circuit, and reproduces a received data clock signal S110 from the intermediate frequency signal output from the high-frequency signal processing section 10a. And a reception data clock signal generation unit 10b for outputting the data. Further, the reception data clock signal S11
And a reception data generation unit 10c that outputs a reception data signal S111 demodulated by “0”.

Next, the operation of this embodiment will be described. The receiving unit 10 receives a signal from a base station (not shown) in FIG.
The transmission signal S202 (radio wave) shown in (b) of FIG. 7 in the TDMA frame shown in (a) of FIG.
nt. A reception signal from the antenna Ant is processed by a high-frequency amplifier, a frequency converter, and an intermediate-frequency amplifier (not shown) in the high-frequency signal processor 10a of the receiver 10, and the intermediate-frequency signal is processed by the reception data clock signal generator 10b and the reception signal. The data is input to the data generator 10c.

The reception data clock signal generator 10b
The reception data clock signal S110 is reproduced from the intermediate frequency signal and output to the intermittent reception clock signal accuracy measurement unit 12. The reception data clock signal S1 reproduced by the reception data clock signal generation unit 10b
The control unit 13 outputs the received data signal S111 demodulated from the intermediate frequency signal to the control unit 13 by the control unit 10.

Clock signal accuracy measuring section 12 for intermittent reception
Calculates the accuracy of the intermittent reception clock signal S113 from the clock signal generation circuit 14 by using the reception data clock signal S1.
Measure based on 10. In this case, the intermittent reception timing control unit 11 transmitted by the clock signal generation circuit 14
The accuracy of the intermittent reception clock signal S113 is measured at power-on, for example, by a signal search process of the control unit 13. This measurement is controlled by an accuracy measurement control signal S1 from the control unit 13.
12 is performed.

The intermittent reception timing control section 11 corrects the next reception of the intermittent reception timing signal S114 based on the intermittent reception clock signal S113 and the intermittent reception clock precision signal S115, outputs the corrected signal to the reception section 10, and outputs the intermittent reception timing signal S114. Controls reception timing. In response to the intermittent operation signal S116 from the control unit 13, an unnecessary circuit operation in the intermittent operation is turned off to start a state in which power consumption is reduced (hereinafter, a non-receiving operation section). Until the intermittent reception timing signal S114 is generated, only the intermittent reception timing control unit 11 operates to reduce the power consumption.

When the intermittent reception timing signal S114 is generated, each unit operates to receive the radio wave from the base station, and the reception processing is performed. When the reception process is completed, the non-reception operation section is again performed by the intermittent operation signal S116 from the control unit 13. The control unit 13 controls the intermittent reception clock signal accuracy measurement unit 12 with the accuracy measurement control signal S112, controls the intermittent reception timing control unit 11 with the intermittent operation signal S116, and a power on / off control unit (not shown). The control of the control processing unit for analyzing the received signal is performed.

FIG. 2 is a block diagram showing a detailed configuration of the intermittent reception clock signal accuracy measuring unit 12, and FIG. 3 is a timing chart of a processing signal in the operation of the intermittent reception clock signal accuracy measuring unit 12.

In FIG. 2 and FIG. 3, the intermittent reception clock signal accuracy measuring unit 12 outputs the intermittent reception clock signal S11.
3, an N frequency dividing circuit 31 that outputs a frequency-divided output signal S310 obtained by dividing the frequency by N, and a reception data clock signal S11
The counter 32 counts the set value α by 0 and stops counting when the enable is not permitted. Further, the set value α and the count value S311
And an accuracy calculation circuit 33 for calculating the accuracy of the intermittent reception clock signal S113 with respect to the reception data clock signal S110.

Next, the operation of the intermittent reception clock signal accuracy measuring section 12 will be described. The measurement accuracy of the intermittent reception clock signal S113 starts when the accuracy measurement control signal S112 shown in FIG. 3A resets the N frequency dividing circuit 31 and the counter 32.

The intermittent reception clock signal S113 corresponding to the reception data clock signal S110 shown in FIG.
Is frequency-divided by the N frequency dividing circuit 31, and (d) in FIG.
Is an enable signal for the counter 32 and the accuracy calculation circuit 33. Here, as shown in (c) and (d) in FIG. 3, the frequency division ratio is 4. If this frequency division ratio is increased, the processing time is increased, but the measurement accuracy is improved. If the frequency division ratio is reduced, the processing time is reduced, but the measurement accuracy is deteriorated. Therefore, the frequency division ratio is determined in consideration of the processing time and the measurement accuracy.

The counter 32 counts with the reception data clock signal S110 during the enable state shown in FIG. 3E, and stops counting when the enable state is disabled. When there is no difference between the received data clock signal S110 transmitted from the base station not shown and the intermittent reception clock signal S113, (c) to (e) in FIG.
As shown in the figure, the “ratio × division ratio” is counted.
In the count value shown in (e) of FIG. 3, the ratio is 12 and the dividing ratio is 4, and the value of the count value S311 is "48". This count value is equal to the set value α when there is no deviation.

Here, the transmission signal (reception data clock signal S110) from the base station and the intermittent reception clock signal S1
13 and (f) to (h) in FIG.
As shown in the figure, the count value S311 is before or after “48”. Here, the intermittent reception clock signal S113 is shifted earlier, and the count value S311 is “46”.

Thus, the set value α and the count value S311
The accuracy calculation circuit 33 calculates the received data clock signal S1
The intermittent reception clock precision signal S115 obtained by calculating the precision of the intermittent reception clock signal S113 with respect to 10 is sent to the intermittent reception timing control unit 11. In the example of FIG.
6/48 × 100 (%) ”.

FIG. 4 is a block diagram showing a detailed configuration of the intermittent reception timing control section 11, and FIG. 5 is a timing chart of a processing signal in the operation of the intermittent reception timing control section 11. In FIGS. 4 and 5, the intermittent reception timing control unit 11 includes an intermittent reception clock signal S.
A counter 51 that counts 113 and outputs the count value S510 is provided.

Further, the clock accuracy signal S115 for intermittent reception measured by the clock signal accuracy measurement unit 12 for intermittent reception.
And the set value β are input, and the set value β is set based on the measurement accuracy.
And a correction value calculation circuit 52 that outputs a correction value (signal) S511 that corrects. Also, the count value S510 from the counter 51 and the correction value S from the correction value calculation circuit 52 are calculated.
511 and a comparator 54 that outputs an intermittent reception timing signal S114 when the comparison results in a match.

Next, the intermittent reception timing control unit 11
Will be described. The non-receiving operation section in the intermittent operation is set in the comparator 54 by the intermittent operation signal S116 shown in FIG. 5A from the control unit 13 shown in FIG. The intermittent operation signal S116 is generated for each reception data signal S111 shown in FIG. After that, the counter 51 outputs the count value S510 obtained by counting the intermittent reception clock signal S113 to the comparator 54.

The set value β is represented by (c) in FIG.
As shown in (1), a count value is set when there is no shift in the intermittent reception clock signal S113. That is, the set value β is “T1 × intermittent reception clock signal S113 (number of clocks)”, and in the example of (d) in FIG. 5, the value is “76790”. The intermittent reception clock accuracy signal S115 measured by the intermittent reception clock signal accuracy measurement unit 12 and the set value β are input to the correction value calculation circuit 52, and the set value β is corrected based on the accuracy of the measurement. The correction value S511 is calculated.

In the case of (c) in FIG. 5, the intermittent reception clock signal S113 is shifted earlier and the count value "76"
"800" is output to the comparator 54 as the correction value S511. The comparator 54 compares the correction value S511 with the count value S510, and outputs the intermittent reception timing signal S114 when they match.

The intermittent reception timing signal S114 is
It is cleared by the intermittent operation signal S116. Here, as shown in FIG. 5E, the intermittent reception clock signal S113
"Tl" when correction is not performed because
In a shorter time, the count value of the counter 51 becomes “7679”.
0 ", and the intermittent reception timing of the signal transmitted by the base station (not shown) and the slave unit shown in FIG. 1 is shifted. In this case, as shown in (f) in FIG. 5, the correction value calculation circuit 52 corrects the counter 51 to change the comparison value to “76”.
800 ", the intermittent reception timing is matched.

[0044]

As is apparent from the above description, according to the radio transmission / reception apparatus of the first, second, third, and fourth aspects, the slave sets the reception data clock signal generated from the reception signal from the base station. Since the reception timing for intermittent reception is corrected in accordance with the accuracy of the intermittent reception clock signal measured based on this, it is not necessary for the slave unit to generate a high-accuracy intermittent reception clock signal. As a result, it becomes unnecessary to correct the reception timing at the base station, so that the device scale and the signal processing scale do not increase, and the slave unit does not need to generate a high-accuracy intermittent reception clock signal. Oscillation frequency adjustment and the like at the time of design and manufacture are facilitated, and costs can be reduced. Further, there is an effect that the reception timing is quickly and reliably established, and the power consumption can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an embodiment of a wireless transmission / reception device of the present invention.

FIG. 2 is a block diagram illustrating a detailed configuration of a clock signal accuracy measuring unit for intermittent reception illustrated in FIG. 1;

FIG. 3 is a timing chart of a processing signal in the operation of the intermittent reception clock signal accuracy measuring unit shown in FIG. 2;

FIG. 4 is a block diagram illustrating a detailed configuration of an intermittent reception timing control unit illustrated in FIG. 1;

FIG. 5 is a timing chart of a processing signal in the operation of the intermittent reception timing control unit shown in FIG. 4;

FIG. 6 is a block diagram showing a main configuration of a receiving system in a slave unit of a conventional digital cordless telephone.

FIG. 7 is a diagram for explaining an intermittent reception operation in the slave unit shown in FIG. 6;

[Explanation of symbols]

 REFERENCE SIGNS LIST 10 reception unit 10b reception data clock signal generation unit 10c reception data generation unit 11 intermittent reception timing control unit 12 intermittent reception clock signal accuracy measurement unit 13 control unit 14 clock signal generation circuit 31 N frequency dividing circuit 32, 51 counter 33 accuracy calculation Circuit 52 Correction value calculation circuit 54 Comparator

Claims (2)

(57) [Claims] 1. A base station and a plurality of slaves perform communication by frame transmission of an uplink signal and a downlink signal in a time-division multiplexing connection, and the slaves receive a clock signal for intermittent reception from a signal received from the base station. And measuring the accuracy of the intermittent reception clock signal based on a reception data clock signal generated from a reception signal from the base station. An intermittent reception clock signal accuracy measuring means for outputting the intermittent reception clock accuracy signal, and an intermittent reception clock accuracy signal according to the accuracy of the intermittent reception clock accuracy signal from the intermittent reception clock signal accuracy measurement means. Counter that outputs the count value of the intermittent reception clock signal, and corrects the set value based on the measurement accuracy of the intermittent reception clock accuracy signal Correction value calculation circuit for outputting a corrected correction value signal, and intermittent reception timing for matching the count value from the counter with the correction value from the correction value calculation circuit to match the intermittent reception timing when they match. And a intermittent reception timing correction means having a comparator for outputting a signal. 2. A base station and a plurality of slaves perform communication by frame transmission of an uplink signal and a downlink signal in a time division multiplexing connection, and the slaves receive a clock signal for intermittent reception from a signal received from the base station. And measuring the accuracy of the intermittent reception clock signal based on a reception data clock signal generated from a reception signal from the base station. To output the intermittent reception clock precision signal
A frequency dividing circuit for dividing a clock signal for intermittent reception, a counter for counting a set value based on a received data clock signal, and stopping counting by a frequency divided output signal from the frequency dividing circuit, and a counter for the counter An intermittent reception clock signal accuracy measuring device including an accuracy calculation circuit that outputs the intermittent reception clock accuracy signal calculated from the value and the set value with respect to the reception data clock signal, and the intermittent reception. Counter for outputting the count value of the intermittent reception clock signal for correcting the intermittent reception timing according to the accuracy of the intermittent reception clock accuracy signal from the clock signal accuracy measurement means for measurement, and measurement of the intermittent reception clock accuracy signal A correction value calculation circuit for outputting a correction value signal obtained by correcting a set value based on accuracy; An intermittent reception timing correction unit having a comparator that outputs an intermittent reception timing signal for matching the intermittent reception timing when the count value from the counter and the correction value from the correction value calculation circuit are compared and matched, A wireless transmission / reception device comprising: