JP2000227782A - Color image generating device, color image generating method and electronic instrument - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the color image generating device of a feel sequential system which is capable of performing satisfactory assigning intensity levels in which luminance is not lowered. SOLUTION: A color image generating device 10 is constituted of a light source 11, a rotary color filter 12, a condensing lens 13, an electrooptical device 14 and a projection lens 15. The rotary color filter 12 is provided with plural color filters for each color so as to divide plural subframe periods during one frame period by rotation. In the electroptical device 14, color image data are written in each pixel before a corresponding color subframe period in accordance with the weight of a gradation and the color image of a subframe is generated in synchronization with the corresponding color subframe period. Thus, since color images are selectively generated in color subframe periods in accordance with the weight of the gradation in this manner, satisfactory assigning intensity levels become possible.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color image generating apparatus, a color image generating method, and an electronic apparatus which generate a color image by being driven in a field sequential system, and more particularly, to easily perform gradation display. The present invention relates to a digitally driven color image generation device and a color image generation method, and an electronic apparatus including the color image generation device.

[0002]

2. Description of the Related Art As a color image generating apparatus, there is an apparatus which performs color display by time-difference color mixing within a single dot, that is, additive color mixing by a time-division driving method. In such a color image generating apparatus, since one pixel is one picture element, there is an advantage that three times the resolution can be obtained as compared with a color image generating apparatus that performs side-by-side color mixing.

In such a field sequential type color image generating apparatus, R (red), G (red) which generates light from a white light source through a rotating color filter is used.
(Green) and B (blue) color lights are radiated onto the electro-optical device in a time-sequential manner, and display is performed by the electro-optical device. And a color image is displayed by projecting a color image.

In order to perform gradation display with such a color image generation apparatus, one frame period (one vertical scanning period) is divided into a plurality of sub-frame periods, and one frame period is divided into a plurality of sub-frame periods. There is a so-called pulse width modulation drive system in which a sub-frame period is appropriately selected within a frame period and an image generation signal is output. When setting a sub-frame period in image generation, as shown in FIG. 24, each of the R, G, and B color filters of the rotating color filter 1 is divided into two equal parts, and the respective color filters 1R, 1G, 1B, 2R, 2G, 2
B allocates a plurality of subframe periods within a period where white light emitted from the light source is incident.
That is, as shown in FIG. 25, for example, a sub-frame period (1S) for generating four images is included in a period (hereinafter, referred to as a color light generation period) 1R in which the first red filter 1R is selected.
F, 2SF, 3SF, and 4SF), and four image generation sub-frame periods (5SF, 6SF, and 4SF) within the R light generation period 2R in which the second red filter 2R is selected.
7SF, 8SF).

[0005] The electro-optical device has two ON and OFF states.
Each pixel is driven by a pulse width modulation method of modulating color light by a value, and a gradation of each color light is generated for each pixel by changing an ON / OFF pulse width according to image information. For example, the pixels are driven so as to transmit (in the case of a transmissive electro-optical device) or reflect (in the case of a reflective electro-optical device) color light only during the ON period, and modulate the color light for each pixel. In the case of FIG. 25, eight weighting periods of the gradation in the pulse width modulation method are arranged corresponding to each other within eight subframe periods existing in one frame period, and in any of the eight subframe periods, Is turned on, the gradation level is controlled.
The same driving is performed in the green filter and the blue filter.

[0006] As in the above example, an example in which a plurality of sub-frame periods are allocated within one color light generation period is as follows.
A sequential color imaging method disclosed in JP-A-8-51633 is known. FIG. 26 is a timing chart showing the relationship between the color light generation (color subframe) period and each color image generation signal in this sequential color imaging method.

[0007]

However, in the above-described field sequential color image generating apparatus, a plurality of sub-frame periods are allocated on the image generating side within one color light generating period. Therefore, it is necessary to address each pixel in each sub-frame period and apply image data to each pixel to determine whether to drive the pixel in the sub-frame period. Each sub-frame period includes a pixel addressing period. Therefore, there is a problem in that as the number of pixels increases, the addressing period in the color light generation period becomes longer, and the period in which a color image is substantially generated is shorter.

Further, for example, when the transfer is started in the divided color light generation period, the data signal of the pixel in the first row and the first column is refreshed (rewritten) in the scanning line selection period in which the scanning line is selected. In the other pixels in the first row and the pixels in the second and subsequent rows, the signal of the previous subframe remains as it is. For this reason, in one display period of an image (in a vertical scanning period for displaying one screen), the operation of modulating the color light in each pixel (display operation) and the operation of sequentially writing image data to each pixel proceed simultaneously. In one display screen, a display portion based on image data written in the previous subframe and a display portion based on image data written in the current subframe are mixed. Accordingly, in the first sub-frame period of the period in which the color light is generated, the image data for the color light in the previous color light generation period written in the previous frame period is also in the current color light generation period until all the image data is rewritten. Regardless, the modulation is performed by the image data of the previous color light. Also, in the sub-frame period in the color light generation period, the previous image data is written until the previous image data written in the previous sub-frame period is completely rewritten regardless of the current sub-frame period. Causes modulation. As a result, color mixing, gradation deterioration, and non-uniformity of the display screen occur.

In the case of a display screen having a relatively small number of pixels, the writing period can be shortened. Therefore, the unevenness of the display screen as described above is hardly seen. However, as the number of pixels is increased, the writing period of all pixels becomes longer. As a result, the display period of all pixels is shortened, the display screen becomes uneven, and the image quality and brightness are reduced. Of course, in the signal line driving circuit, the line sequential driving method can be adopted instead of the dot sequential driving method, but even in this case, the switching pixel between the image corresponding to the previous sub-frame and the image corresponding to the subsequent sub-frame has a line. Progress in order,
Since it appears on the display screen as it is, the display screen also becomes uneven. When the number of pixels is increased, the image quality is further reduced due to the unevenness of the display screen. For this reason, there is a limit to the enlargement of the screen or the increase in the definition due to the number of pixels. Furthermore, since the period allocated to the weighting period for the substantial pulse width modulation is shortened, a sufficient pulse width for gradation display cannot be secured, and a high-quality color image cannot be generated. Was.

The problem to be solved by the present invention is to provide a color image generating apparatus, a color image generating method, and an electronic device capable of performing a good gradation display without a decrease in luminance. The point is whether to take.

[0011]

In order to solve the above-mentioned problems, a means to be taken in the present invention is a color light generation section for generating a plurality of color lights in time sequence within one frame period;
An image generation unit that generates a color image for each color light in a time sequential manner corresponding to the color light generation unit, wherein the generation of each color light is performed within one frame period. The period is divided into a plurality of divided color light generation periods, and the gradation weighting period of the color image in the image generation unit substantially coincides with the divided color light generation period corresponding to the color, and the image generation unit Is characterized in that a color image is selectively generated for a divided color light generation period in accordance with the weighting of the gradation.

According to such a configuration of the present invention, since the divided color light generation period obtained by dividing the color light generation period substantially coincides with the gradation weighting period of the color image in the image generation unit, It is possible to generate a color image in which the gradation is weighted over the color light generation period. Therefore, the ratio of the image generation period to the divided color light generation period is high, and the brightness of the display image can be increased. Further, since the divided color light generation period is set substantially equal to the gradation weighting period of the color image, there is an effect that gradation display of the color image can be efficiently performed.

According to the present invention, it is preferable that a plurality of group periods in which a divided color light generation period for generating mutually different color light is positioned one by one in time sequence within one frame period. According to such a configuration, since the divided color light generation periods of different colors are arranged in time sequence, it is possible to favorably perform time-difference additive color mixing of the generated color image. Further, if the order of the colors of the color lights generated during this group period is made constant, it is possible to set the color light repetition order so that the generated image does not perceive a sense of incongruity. Conversely, when the order of the colors of the color lights generated during the group period is undefined, it is possible to avoid the order of the colors of the color lights that are easily perceived.

In the present invention, the divided color light generation periods of the same color light may be set to be equal to each other. According to such a configuration, it is easy to control the color light generation timing of the color light generation unit and the color image generation timing of the image generation unit, and the configuration of the sub-frame conversion circuit in the image generation unit is simplified. .

In the present invention, it is preferable that the divided color light generation periods of the same color light are set to different periods. According to such a configuration, by selecting the divided color light generation period in accordance with the weighting of the gradation of the color image, each pixel can perform a large number of gradations by selecting a small number of divided color light generation periods within one frame period. This has the effect of realizing a number. Specifically, the length of each of the plurality of (n: an integer of 2 or more) divided color light generation periods that constitute each color light generation period within one frame period is generated within one frame period. Assuming that the color light allocation time of each color is CT and the maximum number of gradations is Hmax, CT · 2
It is preferable to set the length to any length that satisfies ^{m 2} / Hmax (where m is an integer of 0 or more and less than n). For example,
If the number n of the divided color light generation periods is 8, the ratio of the lengths of the eight divided color light generation periods is 1 (= 2 ⁰ ): 2 (= 2 ¹ ):
4 (= 2 ² ): 8 (= 2 ³ ): 16 (= 2 ⁴ ): 32
(= 2 ⁵ ): 64 (= 2 ⁶ ): 128 (= 2 ⁷ ), and the maximum gradation number Hmax of 256 can be realized. FIG. 23 shows a case where a pixel is driven using a pulse modulation (PWM) method. FIG. 23A shows a data period defined by the vertical synchronization signal VSYN. In the drawing, the color light generation period in one scanning period is divided into only three periods, and in each color light generation period, each pixel is driven to an ON state with a pulse width corresponding to the gradation.
FIG. 23B shows what pulse width can be selected during the generation period of the R light for the red light in FIG. If gradation display each color light by 4-bit image data, the pulse width is generated a pulse width of 2 ^{0-2 7} 8 different lengths of, by combining the pulse width, 256 gradations Can be displayed. The drawing shows a pulse example of the 170th gradation out of 256 gradations. As the timing for driving the pulse width, there are a case where the pulse is dispersed as shown in the second from the bottom of the figure and a case where the pulse is continuous as shown in the bottom. It is preferable to make the pulses continuous, and it is possible to prevent a shift in gradation due to dulling of the pulse waveform. Also, the pulses can be tailored to the trailing edge instead of to the leading edge.

In the present invention, each of the plurality of types of pulse width periods in the pulse width modulation system is a "weighting period in the pulse width modulation system" for expressing the gradation level of each pixel. Is equivalent to In FIG. 23, the weighting periods based on the respective pulse widths are sequentially positioned by shifting the pulses within one frame period. However, in the present invention, the weighting periods based on the pulse widths are not generated successively, but are performed for each color. The weighting period is assigned to each divided color light generation period that is dispersed and generated within one frame period for each light. Therefore, the number of divided color light generation periods for each color light and the number of weighting periods (the number of types of pulse widths) of the pulse width modulation method are basically the same. The length of the divided color light generation period may not correspond to the length of the weighting period. However, if the length of the divided color light generation period is set to be equal to or longer than that, the weighting period may be positioned within that period. In addition, each weighting period is
A relationship of a length of a multiple of 2 may be provided, but the gradation changes linearly by compensating for the non-linear characteristic (also referred to as gamma characteristic) of the light transmittance (reflectance) of the electro-optical device. So that
It is preferable to adjust the length of the period.

The color light generating section according to the present invention may be configured to include a light source and a rotating color filter that generates a plurality of color lights based on the light from the light source.
According to such a configuration of the present invention, by using light including a plurality of color light wavelength bands, there is an effect that driving / control of the light source side becomes extremely easy. Further, in the present invention, since it is only necessary to rotate the rotating color filter at a predetermined rotation speed, this also has the effect that driving and control are facilitated and stable generation of color light can be performed.

Further, the color light generation section in the present invention may include a light source for generating a plurality of color lights, and these light sources may be switched on and off in time sequence. According to the present invention having such a configuration, since a plurality of color lights can be directly generated by the light source, there is an effect of increasing the use efficiency of the color lights.

As the image generating unit in the present invention, a reflection type electro-optical device can be used, and it is particularly preferable to use a liquid crystal device. According to the present invention having such a configuration, good gradation display can be performed in, for example, a direct-view display device or a projection display device. In the present invention, as a liquid crystal device, for example, a memory type liquid crystal device using a bistable liquid crystal such as a ferroelectric liquid crystal or an antiferroelectric liquid crystal, a π cell mode liquid crystal device, and a liquid crystal using a horizontal alignment type liquid crystal Device, liquid crystal device using vertical alignment type liquid crystal, liquid crystal device with narrow cell gap of TN liquid crystal cell, OCB
A liquid crystal device having high-speed response, such as a liquid crystal device using birefringence of a liquid crystal such as a liquid crystal and an ECB mode, and a light scattering liquid crystal using a polymer dispersed liquid crystal can be applied. Further, a micromirror device such as a digital micromirror device (DMD) can be used as the electro-optical device. According to the present invention, the brightness of a display image of a field-sequential electro-optical device such as a liquid crystal device can be dramatically increased as compared with the related art, and a bright color image can be generated.

The present invention is characterized in that it comprises a substrate for an electro-optical device having the following configuration in order to improve the luminance of a color image and to achieve good gradation display. The substrate for an electro-optical device provided in the present invention can be used as a substrate for a digitally driven display device such as a liquid crystal device, a DMD, a field emission device, a plasma display, an electroluminescence device, and an LED.

That is, the electro-optical device applied to the present invention includes an electro-optical device substrate in which pixel electrodes are formed on pixels corresponding to matrix intersections of the scanning electrodes and the signal electrodes, respectively. A pixel driving operation of reading out the stored preceding color image digital signal and driving the pixel;
The pixel circuits that execute the temporary storage operation for the delayed color image digital signal of the same pixel output to the signal electrode next to the preceding color image digital signal while simultaneously and sequentially shifting the storage signal, respectively. A transparent substrate having a counter electrode, which is formed and sandwiches the electro-optical material in opposition to the electro-optical device substrate, is disposed, and the preceding color image digital signal is read in synchronization with the divided color light generation period. The color image data corresponding to the divided color light generation period to be output and driven by the pixel, and the delayed color image digital signal is a color image digital signal corresponding to the divided color light generation period located next to the divided color light generation period. It is structured.

In the conventional pixel circuit, the timing for temporarily storing the signal of the same pixel in the storage capacitor coincides with the timing for driving the electro-optical material in the pixel, but according to the color image generating apparatus of the present invention, Since the timing for temporarily storing the signal from the signal electrode and the timing for reading out the temporary storage signal and driving the pixel can be positively shifted within a certain period (for example, a divided color light generation period), the next division is performed. Simultaneous driving (simultaneous still display) of all pixels can be realized over the color light generation period.

In the present invention, regardless of the dot-sequential system or the line-sequential system, the writing is merely performed in the temporary storage sequence, so that the writing sequence does not appear as the pixel driving sequence, and the frame (sub (Frame) switching display. As a result, unevenness of the display screen can be eliminated, and a high-quality color image generating apparatus can be provided. Therefore, regardless of the number of pixels, it is possible to realize a large screen or high definition of high image quality. Also, simultaneous driving (simultaneous still display) of all pixels can be realized over the divided color light generation period, and the display time and the writing time do not conflict with each other, and the display is substantially more effective than the conventional field sequential type color image generation apparatus. You can extend the time. Therefore, in the present invention, higher image quality can be achieved. Further, a temporary storage operation of all pixels can be realized over the color subfield period, and the address period can be lengthened. Therefore, it is possible to reduce the signal transfer speed, and to simplify the peripheral circuit configuration and increase the number of pixels. Further, there is an effect that a frame memory for display data externally attached to the electro-optical device substrate can be reduced.

As such a pixel drive delay type pixel circuit, a plurality of sample-and-hold means for executing a temporary storage operation for taking in a color image digital signal from a signal electrode exclusively or sequentially in a time-division manner, Pixel driving means for reading out the temporary holding signal from the means and executing the pixel driving operation exclusively or sequentially in a time-division manner. In general, it is sufficient that the first and second sample-and-hold means alone are used as the sample-and-hold means. In this case, the writing period of the delayed color image digital signal is the same as the pixel driving period of the preceding color image digital signal.

In the present invention, a third or more sample holding means may be provided. When N sample-and-hold units are provided, for example, the writing period of the delayed color image digital signal can be set to (N-1) times the pixel driving period of the preceding color image digital signal. The simplification of the peripheral circuit configuration and the increase in the number of pixels become remarkable. In the case of the field sequential method as in the present invention, for example, if two sample and hold units are provided, it is possible to write a G color sub-frame signal (G color image digital signal) during the R division color light generation period. In addition, during the G division color light generation period, writing of a B color sub-frame signal (B color image digital signal) can be performed. Further, during the B-division color light generation period, an R color sub-frame signal (R color image digital signal) can be written. As described above, in the field sequential system, a configuration including two sample-and-hold units may be used. However, a configuration including three sample-and-hold units may be used. According to such a configuration, the R-divided color light generation period and the G
A B frame signal (B color image digital signal) can be written over the divided color light generation period. Further, the R color sub-frame signal (R color image digital signal) can be written over the G divided color light generation period and the B divided color light generation period. Similarly, the G color sub-frame signal (G color image digital signal) can be written over the B divided color light generation period and the R divided color light generation period.

When one signal electrode is assigned to each pixel in this sample-and-hold means, the serial signal on one signal electrode is converted into a preceding color image digital signal and a delayed color image by a plurality of sample-and-hold means. After being divided into digital signals and subjected to serial / parallel conversion, they are temporarily stored. In this case, the number of scan electrodes for controlling the selection timing of the plurality of sample and hold units is required by the number of the sample and hold units. For example, when the first and second sample and hold means are provided, one signal electrode and two scanning electrodes are required. Conversely, for example, when a signal electrode dedicated to odd-numbered frames and a signal electrode dedicated to even-numbered frames are provided, one scanning electrode can be shared, and the first and second sample-and-hold means no longer function as serial-parallel conversion means. First, it performs only a temporary storage function.

In the present invention, as the above-mentioned first sample and hold means, the first signal holding means and the signal (color image digital signal) on the signal electrode which is opened and closed by the first write timing signal are used as the first sample and hold means. A first signal writing means for sampling to the signal holding means; a second signal holding means; a second signal holding means;
And a second signal writing unit that opens and closes by the writing timing signal and samples a signal (color image digital signal) on the signal electrode to the second signal holding unit. The preceding color image digital signal corresponding to the preceding divided color light generation period is temporarily held in, for example, the first means holding means by the first signal writing means, and the lagging color image digital signal corresponding to the lagging divided color light generation period. The signal is temporarily held in the second signal holding means by, for example, the second signal writing means.

Specifically, the first signal writing means has one terminal electrically connected to the signal electrode and the other terminal connected to the first electrode.
The first signal transistor is electrically connected to the signal holding means, and the second signal writing means has one terminal electrically connected to the signal electrode and the other terminal electrically connected to the second signal writing means. Second transistor. Here, the transistor is not limited to a monopolar transistor, and a bipolar transistor can be used.

Further, the present invention is characterized in that a substrate for an electro-optical device having the following configuration is provided in order to improve the luminance of a color image and to perform good gradation display. The electro-optical device substrate provided in the present invention includes:
Liquid crystal device, DMD, field emission device,
It can be used as a substrate for a digitally driven display device such as a plasma display, an electroluminescence device, and an LED.

That is, the present invention comprises an electro-optical device substrate in which pixel electrodes are formed on pixels corresponding to matrix intersections of scanning electrodes and signal electrodes, respectively.
The static driving operation of the pixel electrode based on the temporarily stored and held preceding color image digital signal and the temporary storage operation for the delayed color image digital signal of the same pixel arriving at the signal electrode after a predetermined time from the preceding color image digital signal are simultaneously performed. Digital storage means to be executed while sequentially shifting are formed correspondingly, and a transparent substrate having an opposing electrode, which sandwiches the electro-optical material in opposition to the electro-optical device substrate, is arranged. The color image digital signal is a signal corresponding to the weighting of the gradation corresponding to the divided color light generation period read out in synchronization with the corresponding divided color light generation period, and the delayed color image digital signal is the signal next to the preceding divided color light generation period. Is a signal corresponding to the gradation weighting corresponding to the sub-frame period positioned at

According to the present invention having such a configuration, the timing of temporarily storing the color image digital data from the signal electrodes and the timing of reading out the temporarily stored data and driving the pixels are stored in all pixel data. Since the phase shift is positively performed, data of all pixels is written and accumulated in the preceding divided color light generation period, and then all pixels are simultaneously displayed (still display) in the next divided color light generation period. it can. In the present invention, regardless of the writing sequence such as the dot sequential system or the line sequential system, the writing sequence is limited to the temporary storage sequence, and the pixel driving (data reading) is performed.
Thus, it is possible to realize frame switching display of all pixels at the same time and display simultaneousness of all pixels. This makes it possible to eliminate unevenness in the display screen regardless of the number of pixels of the color pixel generation device, and achieve high image quality, large screen or high definition. In addition, the display time and the writing time are not inconsistent with each other in the one-segment color light generation period, and the display time of all the pixels can be made longer than that of the conventional field-sequential color image generation apparatus. For this reason, the present invention has an effect of improving the quality of the display image of the color image generation device. Further, in the present invention, the writing operation of all pixels can be performed over the divided color light generation period, so that a long writing time can be secured. In addition, according to the present invention, since the writing time can be increased, the signal transfer speed can be reduced, so that the peripheral circuit configuration can be simplified or the number of pixels can be increased. Moreover, there is an advantage that a frame memory for display data externally attached to the substrate of the electro-optical device constituting the image generating unit can be reduced. In particular, in the present invention having such a configuration, since the pixel driving method is not the active driving but the static driving based on the temporarily stored data, the pixel driving signal is not attenuated and the complete digital driving is possible.
For this reason, in the present invention, the gradation weighting period and the divided color light generation period of the color image in the electro-optical device as the image generation unit are made to substantially match, and the divided color light generation period is selected according to the gradation weighting. By outputting the color image digital signal in this way, there is an effect that the so-called pulse width modulation type gradation control can be stably performed.

Further, according to the present invention, there is provided an electro-optical device substrate in which pixel electrodes are formed at pixels corresponding to matrix intersections of scanning electrodes and signal electrodes, respectively.
Digital storage means for temporarily storing and temporarily storing the color image digital data arriving at the signal electrode while sequentially shifting to a plurality of cascade-connected storage cells, and statically driving the pixel electrode based on the storage output of the last-stage storage cell,
It is preferable that the storage output of the storage cell at the last stage be a color image digital signal corresponding to the sub-frame period and read out in synchronization with the divided color light generation period.

According to the present invention having such a configuration, since the memory cells for statically driving the pixel electrodes are always provided by the memory cells at the last stage, it is possible to carry out a completely digital drive. In order to perform the field sequential color image generation, if the storage cells are configured in two stages, the time is sufficient in consideration of the period of the temporary storage operation and the period of the storage output operation. A storage cell may be provided.

In the present invention, as the above-mentioned digital storage means, a first latch means for taking in and temporarily storing a color image digital signal arriving at the signal electrode,
Of the color image digital signal by 1
At least a second latch means for reading and temporarily storing the preceding color image digital signal stored immediately before the first latch means for taking in data and statically driving the pixel electrode based on the stored output. It is preferable to have a configuration. Here, the second latch means is characterized in that it is driven statically, and the first latch means is characterized in that it functions as data delay means.

The first latch means includes first data selection means for taking in the color image digital signal and first flip-flop for temporarily storing the color image digital signal taken in by the first data selection means. The second latch means temporarily stores the second data selecting means for taking in the output data of the first flip-flop, and the color image digital signal taken in by the second data selecting means. A second flip-flop electrically connected to the pixel electrode. The first flip-flop functions as a delay unit, and the second flip-flop functions as a static driving unit of the pixel electrode.

Further, various configurations can be adopted as the first data selecting means. For example, the first
Is a first data transfer MOS transistor that conducts in synchronization with the first timing pulse, and the first flip-flop performs a storage operation in synchronization with the first timing pulse. A second flip-flop, wherein the second data selection means is a second MOS transistor for data transfer which is turned on in synchronization with a second timing pulse generated before the second timing pulse; The flip-flop can be a second synchronous flip-flop that performs a storage operation in synchronization with the second timing pulse. As described above, since the data selection means can be constituted by one transistor, the number of elements can be reduced.

Further, the first data selecting means is a first one-input type gate element which performs a logical operation in synchronization with the first timing pulse, and the first flip-flop is synchronized with the first timing pulse. And a second data selecting means is a second one-input type gate element that performs a logical operation in synchronization with a second timing pulse, and is a second flip-flop. May be a second synchronous flip-flop that performs a storage operation in synchronization with the second timing pulse.
When a one-input type gate element is used as the data selection means,
The above transistors are required, but the power consumption is reduced,
It is effective for waveform shaping and energy amplification, functions as a writing drive unit, and can reliably perform a storage operation. The one-input gate element may be, for example, a clocked inverter or a three-state buffer.

In the color image generating method according to the present invention, it is possible to perform a good gradation display without a decrease in luminance. Means to be taken in the present invention is that a color light generation unit generates a plurality of color lights in time sequence and irradiates the image generation unit, and the image generation unit generates an image for each color light in time sequence corresponding to the plurality of color lights. A driving method of an image generating apparatus, wherein each color light generation period of a plurality of color lights in one frame period is divided into a plurality of divided color light generation periods, and a color image corresponding to the divided color light generation period is generated by an image generation unit. Is selectively generated according to the weighting of the gradation.

According to such a configuration of the present invention, since the divided color light generation period obtained by dividing the color light generation period substantially coincides with the gradation weighting period of the color image in the image generation unit, It is possible to generate a color image in which the gradation is weighted over the color light generation period. Therefore, the ratio of the image generation period to the divided color light generation period is high, and the brightness of the display image can be increased. Further, since the divided color light generation period is set substantially equal to the gradation weighting period of the color image, there is an effect that gradation display of the color image can be efficiently performed.

If the divided color light generation periods of the same color light are set to be equal to each other, according to such a configuration, the color light generation timing of the color light generation unit and the color image generation timing of the image generation unit can be reduced. Control becomes easier,
There is an effect that the configuration of the sub-frame conversion circuit in the image generation unit is simplified.

Further, in the present invention, it is preferable that the divided color light generation periods of the same color light are set to different periods. According to such a configuration, by selecting the divided color light generation period in accordance with the weighting of the gradation of the color image, each pixel can perform a large number of gradations by selecting a small number of divided color light generation periods within one frame period. This has the effect of realizing a number.

In the present method, the color light generating section is provided with a rotating color filter that separates the light emitted from the light source in a time-sequential manner to generate each of the plurality of color lights. The use of light including the above wavelength band has an effect that driving / control of the light source side becomes extremely easy. Further, in the present invention, since it is only necessary to rotate the rotating color filter at a predetermined rotation speed, this also has the effect that driving and control are facilitated and stable generation of color light can be performed.

Further, in the method according to the present invention, the color light generation unit may include a light source that generates a plurality of color lights, and the light sources may be switched on and off in time sequence. With such a configuration, since a plurality of color lights can be directly generated by the light source, there is an effect of increasing the use efficiency of the color lights.

In the method according to the present invention, a reflection type or transmission type electro-optical device can be used as the image generation unit. Further, it is preferable to use a liquid crystal device as the electro-optical device. According to the present invention having such a configuration, good gradation display can be performed in, for example, a direct-view display device or a projection display device. In the present invention,
As a liquid crystal device, for example, a memory type liquid crystal device using a liquid crystal having bistability such as a ferroelectric liquid crystal or an anti-ferroelectric liquid crystal, π
Cell mode liquid crystal device, liquid crystal device using horizontal alignment type liquid crystal, liquid crystal device using vertical alignment type liquid crystal, liquid crystal device with narrow cell gap of TN liquid crystal cell, OCB and ECB
A liquid crystal device having high-speed response, such as a liquid crystal device using birefringence of a liquid crystal in a mode or the like, or a light scattering liquid crystal using a polymer dispersed liquid crystal can be applied. As an electro-optical device, for example, a digital micromirror device (DM)
A micromirror device such as D) can be applied.

According to the present invention having such a configuration, the brightness of a display image of a field-sequential electro-optical device such as a liquid crystal device can be dramatically increased as compared with the related art, and a bright color image can be generated. It has the effect of being able to.

Further, when the above-described color image generating apparatus is used in an electronic device, an electronic device having a high-quality display section can be realized because high-brightness and good gradation display can be performed.

[0047]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of a color image generating apparatus, a color image generating method, and an electronic apparatus having a color image generating apparatus according to the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 shows Embodiment 1 of a digital image-driven color image generation apparatus and a color image generation method of a field sequential system according to the present invention. As shown in FIG. 1, a color image generating apparatus 10 according to the first embodiment includes a light source 11 that emits white light including each spectrum of red light, blue light, and green light, and a light source 1 that emits white light.
1 is a rotary color filter that is arranged in front of 1 and rotates the areas of red, blue and green color elements, so that light from a light source irradiates the area of each color element and color light based on the color elements is sequentially generated. 12 and this rotating color filter 1
2, a condensing lens 13, a polarizing beam splitter 9, and an image generating unit that generates a color image corresponding to the color of the color light incident through the condensing lens 13 and the polarizing beam splitter 9. Reflective electro-optical device 14
And a projection type display device provided with a projection lens 15 that receives and reflects light reflected and modulated by the electro-optical device 14, and color light modulated by image generation from the projection lens 15 is sequentially superimposed on a screen 16. And a color image is synthesized and displayed on the screen 16. Light source 1
1 is a reflector 1 for reflecting light from a light source as shown in FIG.
1A is provided.

Since the polarization beam splitter 9 has the polarization selective reflection film formed along the bonding surface of the two triangular prisms, one of the S-polarized light and the P-polarized light (R) which are substantially orthogonal to each other among the incident color lights. When the light component (for example, S-polarized light) is reflected and reflected by the electro-optical device 14, the degree of rotation of the polarization axis is controlled for each pixel by the liquid crystal. This reflected light passes through the polarizing beam splitter 9 again and is incident on the projection lens 15, and the other polarized component (for example, P-polarized component) passes through the polarizing beam splitter 9 and enters the projection lens 1.
5 is incident. At this time, one polarization component (for example, S
The polarized light component returns to the light source side. When the electro-optical device 14 is a liquid crystal light valve, depending on the degree of rotation of the polarization axis,
Modulation is performed by changing the intensity of light incident on the projection lens 15. Further, since the light from the light source is randomly polarized, the other polarization component (for example, a P-polarization component) included in the light source light so that most of the light from the light source is incident on the electro-optical device 14 via the polarization beam splitter. Is preferably provided between the light source and the polarization beam splitter 9 to convert the light into one polarized light component (for example, an S-polarized light component) to make the light source light uniform to the one polarized light component.

The rotating color filter 12 rotates such that each color light is generated a plurality of times within one frame period (display period of one screen = 1 vertical scanning period). The amount of rotation in one frame period may be less than one rotation, or may be less than one rotation as long as the color light can be generated a predetermined number of times.
It is assumed that one rotation is made during the frame period. However, the color light may be generated a predetermined number of times by making one or more rotations in one frame period. In any case, the rotating color filter 12 constituting the color light generation unit generates a plurality of color lights within one frame period by the rotation thereof to define a color light generation period. Further, the color light generation period of each color light is divided into one frame period, and a divided color light generation period is provided for each color light. In the present invention, this divided color light generation period is called a color sub-frame period.

Further, such a color image generating apparatus 10
The drive circuit 21 mainly includes a microprocessor 17, a timing generator 18, a frame memory 19, and a sub-frame conversion circuit 20. In the color image generating apparatus 10, the timing generator 18 synchronizes the color sub-frame period set by the rotational driving of the rotating color filter 12 with the color image generating (driving) timing by the reflective electro-optical device 14. Control.

Next, an outline of the operation of the first embodiment will be described. First, image data is sampled by a sampling circuit (not shown). Then, the synchronization signal in the image input signal is sent to the microprocessor 17 and the timing generator 18. At the same time, the image data in the image data is written to the frame memory 19 at the timing controlled by the timing generator 18. The white light emitted from the light source 11 is transmitted to the electro-optical device 1 by the timing generator 18.
The light passes through the three-color rotating color filter 12 that rotates in synchronization with the drive timing of No. 4. As a result, red light, blue light, and green light are sequentially generated from the light source light, and the condensing lens 1
Irradiation is performed on the reflection type electro-optical device 14 via the reference numeral 3. Each color light emitted in this way is
Light is modulated by the electro-optical device 14 and the projection lens 15
, And the image is formed on the screen 16 to display a color image.

As shown in FIG. 2, the rotating color filter 12 used in the color image generating apparatus 10 according to the first embodiment
A fan-shaped red color filter 12 obtained by dividing a circle into 12 parts
Four R, green, and blue color filters 12G and 12B are arranged and provided integrally so as to repeat the order of R, G, and B, respectively. In this rotating color filter 12, R, G, and B color filters 12R, 12G, and 12B form a group within a 90-degree angle, and a total of four groups (12R1, 12G1, and 12R1) are provided.
B1) to (12R4, 12G4, 12B4). In the first embodiment, the period of one rotation of the rotating color filter 12 is set to be the same as one frame period (1F) of the image generated by the electro-optical device 14. That is, it is set to make one rotation in one frame period (1F). As described above, the number of rotations of the rotating color filter 12 for one frame period (1F) is appropriately set according to a desired gradation level and the number of color sub-frame periods (sf). However, the present invention is not limited to one that rotates once per frame period (1F) as in the first embodiment.

In the first embodiment, the rotating color filter 1
1 is rotated once in one frame period (1F), FIG.
The light from the light source 11 shown in FIG.
The time for transmitting one of 12G (1 to 4) and 12B (1 to 4) is a color subframe period (sf). In the present embodiment, each color element of the color filter has a width of an angle of 30 ° obtained by dividing 90 ° into three equal parts, and the rotation speed is constant.
f) is a period of the same length. During the color sub-frame period (sf), light in a predetermined wavelength range generated by being absorbed and separated through the color filter enters the image generation area of the electro-optical device 14.

As described above, when there are n groups of R, G, and B color filters within one frame period (1F), as shown in FIG. The image generation of each color is performed n times (four times in the first embodiment) corresponding to the color sub-frame period (sf) of each color. In the figure, RSF (1-n), GSF (1-n), BSF (1-
n) indicates, for each color light, a period in which the pixels are driven in accordance with the image data of each color light written to each pixel in the corresponding color sub-frame period. Each pixel of the electro-optical device 14 is turned on or off by a pulse width modulation method that modulates color light with binary values of ON and OFF.
It is driven in the F state, and the gradation of each color light is generated for each pixel by changing the pulse width of ON and OFF according to the image data (image information). For example, ON
The pixels are driven so as to transmit (in the case of a transmissive electro-optical device) or reflect (in the case of a reflective electro-optical device) color light only during the period, and modulate the color light for each pixel according to the length of the ON period. To do it.

That is, in the case of red light, n pulse widths (ON time widths) having different time lengths, which are the gradation weighting periods in the pulse width gradation method, are set to RSF1 to RSF1.
It is positioned in a dispersed manner corresponding to each period of Fn. For example, by associating the longest pulse width with RSF1, RS
A period in which the pixel is driven to the ON state for the longest time is provided in the period of F1, and the second longest pulse width is made to correspond to the second longest pulse width in the period of RSF2.
A period for driving to the N state is provided, and similarly, n pulse widths and RSFn are assigned one-to-one. However, the order in which the pulse widths are made to correspond may be from a long pulse width or a short pulse width, or may be random. However, if the pulse widths are sequentially assigned to be longer or shorter, the control of writing image data to pixels can be easily performed. Similarly, for the other color lights, n pulse widths (N times different pulse lengths in the pulse width modulation method) for the GSF (1 to n) and BSF (1 to n) are used. (ON time width), and the pixels are driven to the ON state with different time lengths in each color sub-frame period.

As described above, in each color sub-frame period (sf), in synchronization with this, in the electro-optical device 14, O written in advance in accordance with the gradation weighting is used.
One of N or OFF color image data is read out from all the pixels, and if each pixel is ON data according to the image data, the pixel is driven during the weighting period allocated to the subframe period, and the OFF data is used. If so, the pixel is not driven during this sub-frame period. Thus, when n color sub-frame periods have elapsed, in which color sub-frame period the pixels are driven based on the ON data, n
The ON drive period of the pixel in one frame period is determined by the combination of the pulse widths (the number of combinations of ²ⁿ ), whereby the gradation (any of ²ⁿ gradations) of each pixel is formed. Is driven / non-driven by all the pixels in each sub-frame period to generate an image. In the present embodiment, since there are four color filters 12R, 12G, and 12B for each color as shown in FIG. 2, the gradation weighting period for each color light has four types of pulse widths. 2 ⁴ = 16 gradations can be expressed, and a color image formed by three colors is 4
Thus, gradation display of 096 colors can be performed.

The color image data read in the corresponding color sub-frame period (sf) is written to all the pixels in a dot-sequential or line-sequential manner prior to the color sub-frame period (sf). However, the writing of the image data may be performed for all the pixels for each color sub-frame, or may be performed for each color sub-frame only for the pixels that require rewriting of the image data. The image data required in each subframe is a binary value of driving (ON) or driving (OFF) the pixel in the ON state or OFF state in the subframe. If the data does not differ, rewriting is not necessary, and such control may be performed.

The electro-optical device 14 used in the first embodiment is a memory type liquid crystal device using a bistable liquid crystal such as a ferroelectric liquid crystal or an anti-ferroelectric liquid crystal as a liquid crystal device of a liquid crystal light valve. π cell mode liquid crystal device, liquid crystal device using horizontal alignment type liquid crystal, liquid crystal device using vertical alignment type liquid crystal, liquid crystal device with narrow cell gap of TN liquid crystal cell, birefringence of liquid crystal such as OCB and ECB mode A liquid crystal device having high-speed response, such as a liquid crystal device using a liquid crystal or a light scattering type liquid crystal using a polymer dispersed liquid crystal or the like, can be applied. As an electro-optical device other than a liquid crystal device, a micro mirror device such as a DMD developed by Texas Instruments can be applied.

In the case of a light scattering type liquid crystal device using a polymer dispersed type liquid crystal or the like or a micromirror device, the polarizing beam splitter 9 is unnecessary, and in the former case, the incident light is reflected (transmitted). (In the case of the type, transmission) and light scattering to modulate the gradation, and the latter controls the reflection angle of the mirror that reflects the incident light for each pixel so that the light is reflected by the projection lens 15 or absorbed by the absorber. Display gradation.
However, in this case, the illumination system and the projection optical system are arranged so that the incident light and the reflected light to the electro-optical device are obliquely incident and obliquely reflected.

Next, a configuration in which a liquid crystal panel is used as the electro-optical device 14 will be described. FIG. 14 is a diagram showing a cross section of the liquid crystal panel. As shown in FIG. 1, the electro-optical device 14 includes a panel substrate (electro-optical device substrate) 23 fixed on a supporting substrate 22 made of, for example, glass, ceramic, or the like with an adhesive, and the panel substrate 23.
An opposing transparent substrate 25 disposed opposite to the panel substrate 23 at a predetermined interval via a sealing material 24 disposed so as to surround the upper pixel area (display area) in a frame shape; Sealing material 2 between 23 and opposing transparent substrate 25
The liquid crystal 26 is sealed in the space defined by 4. As described above, the liquid crystal 26 is a well-known TN (Twiste
d Nematic) type liquid crystal, vertical alignment type liquid crystal in which liquid crystal molecules are aligned substantially vertically in the absence of voltage, horizontal alignment type liquid crystal in which liquid crystal molecules are aligned substantially horizontally without twisting in the absence of voltage, polymer dispersed type Liquid crystal such as liquid crystal can be used.

A counter electrode (common electrode) 27 made of a transparent conductive material such as ITO (indium tin oxide) is formed on at least the entire display area on the inner surface of the opposing transparent substrate 25. ing. On the other hand, in the panel substrate 23, an active matrix circuit and various driving circuits to be described later are formed on a single crystal silicon substrate, and pixel electrodes 28 are arranged and formed in a matrix on the surface side facing the opposing transparent substrate 25. It becomes. The pixel electrode 28
Is a reflection electrode in which the electrode itself is formed of a light-reflective conductive material, but a configuration in which the electrode itself is used as a light-transmitting electrode and a reflection mirror is separately arranged on the substrate side may be adopted. Each pixel portion has a unit (sample hold circuit) that can store color image data corresponding to the color sub-frame period sf as digital values (H level, L level), as described later. As shown in FIG. 4, a light shielding film 29 for blocking unnecessary light incidence is formed around the pixel area (display area) of the panel substrate 23. In addition, the sealing material 24 on the panel substrate 23
A terminal pad 30 is arranged and formed on the outer peripheral portion of the flexible tape wiring 32, and one end of a flexible tape wiring 32 is connected to the terminal pad 30 via an anisotropic conductive adhesive 31. In addition, this flexible tape wiring 32
Is connected to the above-described timing generator 18, frame memory 19, sub-frame conversion circuit 20, and the like.

In such an electro-optical device 14, by changing the effective voltage applied from the pixel electrode 28 to the liquid crystal 26 according to the image data, the incident light is changed according to the change in the arrangement of the liquid crystal molecules in the liquid crystal 26. The light is reflected and emitted by changing the polarization plane and the degree of scattering. When changing the plane of polarization, incident light is incident via a polarizing element, and reflected light is guided to the projection lens 15 via the polarizing element to modulate light intensity for each pixel.
In the case of a change in light scattering (when the liquid crystal is a polymer dispersed type, etc.)
The light intensity is modulated for each pixel by providing a slit in front of the projection lens 15 and passing the slit through the slit.

Next, the operation and operation of each element in the above configuration will be described. For example, when the light from the light source 11 is in the red region of the
Before the transmission timing of 2R1), the color image data of the red component stored in advance in the driving cycle earlier than this is sequentially read from the frame memory 19 in accordance with the read timing signal supplied from the timing generator 18. The data is output to the subframe conversion circuit 20. Upon receiving the red component color image data, the sub-frame conversion circuit 20 performs a gradation weighting period (a plurality of types of pulses indicating a period for driving the pixel to the ON state) in accordance with the gradation level of the red component color image data. Width) is set, and the plurality of color sub-frame periods sf arranged in one frame period 1F correspond to the weighting periods on a one-to-one basis. Prior to the frame period, a color image digital signal (a binary signal indicating whether or not to drive the pixel to the ON state during the pulse width period for gradation weighting provided in the subframe period)
Is supplied to the electro-optical device 14 at a predetermined timing.
The electro-optical device 14 pre-writes the color image digital signal output from the sub-frame conversion circuit 20 and associated with the color sub-frame period according to the gradation weighting. Is the red area of the rotating color filter 12 (color filter 12R
Data is read out at the timing of transmission through 1), and all pixels are turned on or off throughout the period (R color sub-frame period 1 sf) during which red light is generated by the rotating color filter 12 (12R1). Drive.
The timing generator 18 includes the microprocessor 1
Under the control of 7, timing control is performed to synchronize the timing of each component. In the electro-optical device 14, the liquid crystal 26 is driven for each pixel to modulate and reflect red light, and accordingly, a red light image is generated. Therefore,
The modulated light intensity of each pixel (in the case of using a liquid crystal panel, the light intensity of each pixel is determined via a polarizing element) is input to a projection lens 15 and a red light image is projected on a screen 16. Is displayed. Then, such a red light image is generated for each color sub-frame period sf set to correspond by weighting of gradation within one frame period, and the projection display for one frame period of the color image is performed. Done. In the color sub-frame period of another color while one frame of the red light image is generated, another color image set corresponding to the gradation weighting is generated.

That is, at the timing when the light source light passes through the green area (12G1) of the rotating color filter 12,
As in the case of red light, image data for green light is read from the frame memory 19, and is associated with a predetermined color sub-frame period (sf) according to the gradation weighting by the sub-frame conversion circuit. Outputs color image data. The color image data is input, and each pixel of the electro-optical device 14 is driven by writing and reading the color image data according to the color image data. As a result, the green light incident on the electro-optical device 10 is modulated, and a green light image is projected and displayed on the screen 16. The same applies to the timing at which light from the light source passes through the blue region (for example, 12B1) of the rotating color filter 12. in this way,
The color images corresponding to the color lights generated in time sequence with the rotation of the rotating color filter 12 are sequentially generated by the electro-optical device 14, and one frame of color image is displayed. In this embodiment, the order of the color light generation is R,
Although set to G and B, it is not limited to this,
In any order.

In the electro-optical device 14 in the color image generating apparatus 10 according to the first embodiment, as described above, the color image data (digital data) corresponding to the color sub-frame period (sf) is written in advance, A panel substrate (electro-optical device substrate) 23 having a function of reading color image data corresponding to the sub-frame period is provided.

Hereinafter, the panel substrate 23 of the electro-optical device 14 used in the color image generating apparatus 10 according to the first embodiment will be described.
Will be described.

FIG. 5 is a circuit diagram showing an active matrix liquid crystal display element driving circuit built in a panel substrate (electro-optical device substrate) of a reflection type liquid crystal panel as the electro-optical device 14 according to the first embodiment. 7 is a circuit diagram showing a pixel circuit included therein, FIG. 7 is a timing chart for explaining operation of the pixel circuit, and FIG. 8 is a timing chart for explaining operation of the active matrix liquid crystal display element driving circuit.

The reflective liquid crystal panel substrate 23 used in the first embodiment is formed by forming active elements and capacitive elements on the main surface of a single crystal semiconductor substrate, and alternately stacking an interlayer insulating film and a conductive layer thereon. It has a large number of rectangular pixel electrodes (reflection electrodes) 28 arranged in a matrix in a pixel region which is a film and occupies a main area in plan view.

An active matrix liquid crystal display element driving circuit 50 shown in FIG. 5 includes an active matrix circuit 51 formed immediately below a pixel region of a semiconductor substrate and a color image received by serial transfer from the above-described subframe conversion circuit 20. Digital signals (Data) are applied to signal electrodes (X) X1 to Xm for each pixel column of the active matrix circuit 51.
Line drive circuit (X driver) 52
And four scan electrodes Y1 (Y11 to Yn1) for each pixel row for selecting a pixel row of the active matrix circuit 51,
Y2 (Y12 to Yn2), Y3 (Y13 to Yn3), Y4 (Y14
To Yn4) and a scanning line driving circuit (Y driver) 53 for sending a selection timing signal to the scanning line driving circuit. The signal line driving circuit 52 and the scanning line driving circuit 53 constitute a peripheral circuit for the active matrix circuit 51.

The signal line drive circuit 52 is an insulated gate field effect which is an n-parallel connected switch element for sequentially distributing a color image digital signal (Data) of a serial signal to the signal electrodes X1 to Xm for each pixel selection period. A pixel signal sampling circuit 52a having a transistor (hereinafter referred to as a MOSFET) and a signal line shift register (X) for sequentially generating switch drive timing pulses φH1 to φHm for each switch element based on a shift clock CLX and a latch pulse DX. Shift register) 52b. The scanning line drive circuit 53a sequentially generates row drive timing pulses φV1 to φVn in a pixel row based on the shift clock CLY and the scan start pulse (frame start pulse) DY, and a scan line shift register (Y shift register) 53a. Further, based on the row drive timing pulses φV1 to φVn and the liquid crystal alternating signal (signal switched every frame) FR, four scan electrodes Y1, Y2, Y3 for each pixel row are provided.
, Y4, and a selection timing circuit 53b for generating selection timing pulses .PHI.1 to .PHI.4.

In the active matrix circuit 51, a pixel circuit 55 shown in FIG. 6 is formed at each matrix intersection of the signal electrode X extending in the column direction and the scanning electrode Y extending in the row direction. ing. The pixel circuit 55 includes an odd subframe color image digital signal V (O) and an even subframe color image digital signal V of the color image digital signal V (H level or L level) sent to the signal electrode X.
(E) is alternately sampled and held, and the sample-and-hold circuit 56 switches the sub-frame between the odd-numbered sub-frame color image digital signal V (O) and the even-numbered sub-frame color image digital signal V (E). And a pixel drive circuit 57 which alternately reads out the pixel electrode 28 and drives the pixel electrode 28 by voltage driving.

The sample-and-hold circuit 56 includes a first sample-and-hold circuit 56a and a second sample-and-hold circuit 56b.
Is an N-type first MOSFET (insulated gate field effect transistor) T1 having a source S electrically connected to the signal electrode X and a gate G electrically connected to the first scan electrode Y1, and a drain thereof. D electrically connected to the first
Of the storage capacitor C1. The second sample-and-hold circuit 56b has the same configuration, and is an N-type second circuit having a source S electrically connected to the signal electrode X and a gate G electrically connected to the second scan electrode Y2. 2 MOSFETs
(T2) and a second electrode electrically connected to its drain D.
And the storage capacitor C2.

The pixel driving circuit 57 according to the first embodiment includes the first
An N-type third MOSFET (T3) having a source S electrically connected to the storage capacitor C1 and a gate G electrically connected to the third scan electrode Y3, and an electric current connected to the second storage capacitor C2. N-type fourth MOSFE having a source S that is electrically connected and a gate G that is electrically connected to the fourth scan electrode Y4.
T (T4), a third MOSFET (T3) and a fourth MOSFET (T3).
N-type fifth having a gate G electrically connected to the drain D of the MOSFET (T4), a drain D electrically connected to the pixel driving power supply Vdd, and a source S electrically connected to the pixel electrode 28. MOSFET (T5). A third MOSFET (T3) and a fourth MOSFET (T4)
) Indicates that the odd-numbered sub-frame color image digital signal V (O) from the first storage capacitor C1 and the even-numbered sub-frame color image digital signal V (E) from the second storage capacitor C2 are alternately switched each time the sub-frame is switched. The fifth MOSFET (T5) constitutes a signal reading means for reading, and the fifth MOSFET (T5) responds to the read odd-numbered sub-frame color image digital signal V (O) and even-numbered sub-frame color image digital signal V (E). A common pixel driving means for applying a pixel driving voltage Vdd to the pixel electrode 28 is configured.

Although the configuration of the selection timing circuit 53b will be described later, the selection timing circuit 53b generates selection timing pulses Φ1 to Φ4 shown in FIG. When the first write timing pulse Φ1 is generated on the first scan electrode Y1 in the odd color subframe period 1sf, the first MOSFET of the first sample and hold circuit 56a
(T1) is opened to sample the odd sub-frame color image digital signal V (O) on the signal electrode X, and the signal V (O) is written to the first storage capacitor C1. When the second write timing pulse Φ2 is generated on the second scan electrode Y2 in the even-numbered color sub-frame period 2sf immediately after that, the second sample-and-hold circuit 56b
MOSFET (T2) is opened to sample the even-numbered sub-frame color image digital signal V (E) on the signal electrode X, and the signal V (E) is written to the second storage capacitor C2. Odd subframe color image digital signal V (O)
Are written dot-sequentially to the first storage capacitors C1 of the pixel circuits 55 of all the pixels in the odd-numbered color subframe period 1sf, and the even-numbered subframe color image digital signal V
(E) is dot-sequentially written to the second storage capacitors C2 of the pixel circuits 55 of all the pixels in the even color subframe period 2sf. Since the second write timing pulse Φ4 continues to be generated on the fourth scan electrode Y4 over the odd color subframe period 1sf in parallel with the alternate write operation for each color subframe period, By opening the fourth MOSFET (T4), the even-numbered sub-frame color image digital signal V (E) temporarily stored in the second holding capacitor C2 is read out. As a result, the fifth MOSFET (T5) conducts, and the liquid crystal cell LC electrically connected to the pixel electrode 28 is driven. Since the first write timing pulse .PHI.3 continues to be generated on the third scan electrode Y3 over the even color subframe period 2sf, the first storage capacitor C1 is opened by opening the third MOSFET (T3). , The odd sub-frame color image digital signal V (E) is read out, so that the fifth MOSFET (T5) conducts by the odd-numbered sub-frame color image digital signal V (O), and the pixel electrode 28 The liquid crystal cells LC to be electrically connected are driven. In the liquid crystal device, the liquid crystal cell LC is a pixel driven to an ON state or an OFF state via the pixel electrode 28.

The writing method of the first embodiment is a dot-sequential method. However, the writing order is limited to the sample-and-hold circuit 56 and does not appear as a pixel driving order.
For this reason, the sub-frame switching display of all the pixels can be performed simultaneously, and the unevenness of the display screen can be eliminated. Irrespective of the number of pixels, it is possible to realize a large screen and high definition of high image quality. Simultaneous still display of all pixels of the previous subframe can be realized during the sample and hold operation of the subsequent subframe,
The display time and the writing time do not conflict with each other, so that the display time can be lengthened and the image quality can be further improved. Further, since the writing period can be lengthened, the peripheral circuit configuration can be simplified.

The selection timing pulses Φ1 to Φ shown in FIG.
4 is generated by the selection timing circuit 53b shown in FIG.
As shown in FIG. 7, an inverter INV for inverting the liquid crystal alternating signal FR for each color sub-frame, and a row driving timing pulse .phi.V (.phi.V1 to .phi.Vn) from the Y shift register 53a for each pixel row, and the liquid crystal An AND gate A1 receiving the signal FR as the other input and a row drive timing pulse φV (φV1 to φVn) from the Y shift register 53a as one input and an inverter output (FR bar) as the other input. A2. The output of the AND gate A1 is applied to the first scan electrode Y1, the output of the AND gate A2 is applied to the second scan electrode Y2, the inverter output (FR bar) is applied to the third scan electrode Y3, and the AC signal FR is applied to the fourth scan electrode Y3. , Respectively. The two AND gates A1 and A2 correspond to a scan electrode selection circuit for alternately selecting the first scan electrode Y1 and the second scan electrode Y2 every color sub-frame period.

In the first embodiment, as described above, twelve color sub-frame periods (1 s) are included in the color sub-frame period
f, 2sf... 12sf). As shown in FIG. 8, for example, 1 located at the beginning of one frame period 1F
When the liquid crystal alternating signal FR rises in the first color subframe period 1sf, a second read timing pulse Φ4 is generated as shown in FIG.
5, the fourth MOSFET (T4) is opened, the first read timing pulse .PHI.3 disappears, and the third M
OSFET (T3) is closed. In the color sub-frame period 1sf, row drive timing pulses φV1 to φVn are sequentially generated from the Y shift register 53a.
The row drive timing pulse φV1 generated in the first row of pixels in the color sub-frame period 1sf and the high level of the liquid crystal alternating signal FR cause the AND gate A in the first row of pixels.
1 is turned on, a first write timing pulse .PHI.1 is generated, and the first MOSFET (T1) is opened. Similarly, each time the row drive timing pulses .phi.V2 to .phi.Vn are sequentially generated for each horizontal period, a first write timing pulse .phi.1 is generated in the pixel row and the first MOSFET (T1) is opened.

Next, during the horizontal period in which the first write timing pulse Φ1 of the second row of pixels is generated, the X shift register 52b sequentially switches the switch drive timing pulses φH1 to φHm in synchronization with the shift clock CLX. Therefore, the sampling circuit 52a converts the serial color image digital signal (Data) from serial to parallel to convert the color image digital signals V1 to Vm into signal electrodes X1 to X for each pixel column.
m. When the switch drive timing pulse φH1 is generated, the color image digital signal V1 on the signal electrode X1 is generated.
Is the first MOS of the pixel circuit 55 in the first column of the second row of pixels
The data is written to the first storage capacitor C1 via the FET (T1). Next, when the switch drive timing pulse φH2 is generated, the color image digital signal V2 on the signal electrode X2 is generated.
Is the first MOS of the pixel circuit 55 in the second row and second column of pixels
The data is written to the first storage capacitor C1 via the FET (T1). Finally, the switch drive timing pulse is φ
When Hm is generated, the color image digital signal Vm on the signal electrode Xm is output from the first M of the pixel circuit 55 in the m-th column of the second row of pixels.
The data is written to the first storage capacitor C1 via the OSFET (T1).

Thus, the first color sub-frame period 1 is stored in the first storage capacitors C1 of all the pixel circuits 55.
When the sf color image digital signal V (O) is written dot-sequentially, in the next second color sub-frame period 2sf, the liquid crystal alternating signal FR falls as shown in FIG. As shown, the first read timing pulse Φ3 is generated, and the third MOSF of each pixel circuit 55 is generated.
ET (T3) is opened, the second write timing pulse .PHI.4 disappears, and the fourth MOSFET (T4) is closed. Therefore, the pixel signals V1 to Vm of each row written to the first storage capacitors C1 of all the pixel circuits 55 in the first color sub-frame period 1sf are output to the fourth MOS transistors.
It is read out through the FET (T4) and the pixel signal V of each row is read out.
The fifth MOSFET (T5) is opened according to 1 to Vm, and the liquid crystal cells LC electrically connected to the pixel electrode 28 are simultaneously driven.

As shown in FIG. 8, the Y shift register 53a is also provided during the color sub-frame period 2sf.
, Row drive timing pulses φV1 to φVn are sequentially generated. The row drive timing pulse φV1 generated in the first row of pixels and the H level of the inverter output (FR bar) in the color subframe period 2sf turns on the AND gate A2 in the first row of pixels, and the second write timing pulse Φ2 Is generated, the second MOSFET (T2) is opened, and the first MOSFET (T1) is closed. Similarly, every time the row drive timing pulses φV2 to φVn are sequentially generated for each horizontal period, a second write timing pulse φ2 is generated in the pixel row to generate a second MOSFET.
(T2) is opened.

Here, for example, in the horizontal period in which the second write timing pulse Φ2 of the second row of pixels is generated,
Since the X shift register 52b sequentially generates the switch drive timing pulses φH1 to φHm in synchronization with the shift clock CLX, the sampling circuit 52a converts the serial color image digital signal (Data) from serial to parallel and converts the color image digital The signals V1 to Vm are applied to the signal electrodes X for each pixel column.
1 to Xm. The pixel signals V1 to Vm on the signal electrodes X1 to Xm correspond to all the pixel circuits 55 in the second row of pixels.
Since the second MOSFET (T2) is open for the horizontal period, as described above, the second MOSFET (T2)
2) are written into the second storage capacitor C2 in a dot-sequential manner. The pixel signals V1 to Vm of each row in the color sub-frame period 2sf correspond to the next odd color sub-frame period (3
In sf), all the pixels are simultaneously read out and all the pixels are driven simultaneously.
Similarly, the same operation is performed after the color sub-frame period (4sf).

In the first embodiment, the rotation color filter 1
Color sub-frame period 1 sf to 12 s
Color image generation corresponding to f is selectively performed according to the gradation weighting. In each color sub-frame period sf, the color image data written in advance is read out and a color image is generated over the entire color sub-frame period sf of the corresponding color. Can significantly improve the luminance of the color image generated. In addition, by selecting the color sub-frame period sf within one frame period 1F, the gradation display of the image can be reliably performed. Note that the first embodiment is an example in which the color sub-frame period sf within one frame period 1F is an even number.
Even if the number of color sub-frame periods within the sub-frame is odd, color image data corresponding to the color sub-frame period sf can be written in time sequence, so that there is no problem.

(Embodiment 2) FIG. 9 is a front view showing a rotating color filter used in Embodiment 2 of a color image generating apparatus according to the present invention, and FIG. 10 is a diagram showing color light generation and each color image generation in Embodiment 2. 6 is a timing chart showing the timing of FIG. In the second embodiment, the configuration of the rotary color filter 12 is different from the configuration of the first embodiment described above, and only different points will be described. Also,
The same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

As shown in FIG. 9, the rotating color filter 120 used in the color image generating apparatus of the second embodiment
Fan-shaped color filter 120R1, 120G1, 1
20B1 group and a fan-shaped color filter 120R having a wider angular width than the color filters of this group.
2, 120G2, 120B2 and a fan-shaped color filter 120R3, 120G having the widest angular width.
3, 120B3, which are integrally provided to form a circle. In the second embodiment, as in the first embodiment, the period during which the rotary color filter 120 makes one rotation is the same as one frame period (1F) of the image generated by the electro-optical device 14. You have set. That is, it is set to make one rotation in one frame period (1F). In addition,
The number of rotations of the rotating color filter 120 for one frame period (1F) is appropriately set according to a desired gradation level and the number of color sub-frame periods (sf). It is not limited to one rotation per 1F).

In the second embodiment, the rotating color filter 1
When the light source 20 is rotated once during one frame period (1F), the light from the light source 11 emits the respective color filters 120R (1-3), 12R constituting the rotating color filter 120.
The time for transmitting one of 0G (1-3) and 120B (1-3) is a color sub-frame period (sf). During this color sub-frame period (sf), the length of time differs between different groups.

Then, as shown in the timing chart of FIG. 10, image generation of each color is performed up to three times corresponding to the color sub-frame period (sf) of each color. In addition,
In the figure, RSF (1-3), GSF (1-3), BSF
(1-3) indicate subframe periods on the color image generation side in which image data read out in the corresponding color subframe period is generated. In the second embodiment, since the color sub-frame periods sf having three different lengths are set due to the configuration of the rotating color filter 120,
When each image is generated, efficient gradation expression can be performed by selecting the color sub-frame periods sf having different lengths within one frame period. Also, with the setting of the three lengths of the color sub-frame period sf, the output timing of the color image digital signal and the write timing and read timing of the color image digital signal in the pixel portion are appropriately changed. Have been. Other configurations in the second embodiment are the same as those in the first embodiment.
Other functions and effects of the second embodiment are the same as those of the first embodiment.

In the second embodiment, three color sub-frame periods sf having different time lengths are set.
Color subframe periods with two different lengths of time or 4
One or more color subframe periods having different lengths of time may be set. For example, if the number n of the color sub-frame periods is 8, the ratio of the lengths of the eight color sub-frame periods is set to one of 2 n (n is an integer of 0 or more). If the length ratio is 1 (=
2 ⁰ ): 2 (= 2 ¹ ): 4 (= 2 ² ): 8 (= 2 ³ ):
16 (= ²⁴ ): 32 (= ²⁵ ): 64 (= ²⁶ ): 1
28 (= 2 ⁷ ), the maximum gradation number H
max can be realized by 256. That is, the time length of each of the plurality of color sub-frame periods constituting each color light generation period within one frame period is defined as CT, where CT is the allocation time of the color light of each color generated within one frame period. If the maximum number of gradations is Hmax, the length is any length that satisfies CT · 2 ^m / Hmax. Then, in order to set such a ratio of the color sub-frame periods, the angle width of each color filter of the rotating color filter 120 may be set. In the second embodiment, the order of the color filters having the same angular width in the rotation color filter 120 is set to be constant in the group. However, for example, the color filters having different angular widths are different from each other in the rotation color filter 120A shown in FIG. The filters may be set in an undefined order. In this example, there is an effect that an efficient gradation expression can be performed and a color that is easily perceived can be made inconspicuous.

(Embodiment 3) FIG. 12 shows a color image generating apparatus and a color image generating method according to Embodiment 3 of the present invention.
Is shown. In the third embodiment, the front side of the display screen (FIG. 1)
The present invention is applied to a direct-view-type color image generation apparatus having a lighting device (front light) in the upper part in FIG. In the third embodiment, three-color lights emitted in color sequence from the front side are generated in a color sub-frame period, and the timing of generating a color image in an electro-optical device as an image generation unit is set in a color sub-frame period of each color light. They are set to match.

As shown in FIG. 12, a color display device 100 according to the third embodiment includes a color switching type illumination device 101,
An electro-optical device 102 and a driving circuit 103 for driving and controlling the illumination device 101 and the electro-optical device 102
And comprising. In FIG. 12, since the illumination device 101 is disposed on the front side, the reflection type electro-optical device is used, and a reflection type liquid crystal display device is used as in the first embodiment.

The configuration of the color-switching illumination device 101 is such that, for example, a red light source 101R, a green light source 101G, and a blue light source 101B, and the color light emitted from these components are reflected toward the display screen of the electro-optical device 102. Reflector 10
4 is provided. Note that these light sources 101R, 10R
1G and 101B are fluorescent tubes such as cold cathode tubes and hot cathode tubes,
Various color light emission sources such as an EL (electroluminescence) light emitting element and an LED can be applied.

The configuration of the reflection type electro-optical device 102 is the same as the configuration described in the first embodiment, and the description is omitted.

The drive circuit 103 includes the microprocessor 1
05, a timing generator 106, a frame memory 107, a sub-frame conversion circuit 108, a light source color switcher 109, and a light source power supply 110. In the color image generating apparatus 100, the timing generator 106 controls the switching timing of the light source color switcher 109 and the color image generating timing of the electro-optical device 102. First, the image data is sampled by a sampling circuit (not shown), and the synchronization signal in the image input signal is sent to the microprocessor 105 and the timing generator 106. At the same time, the image data in the image data is
Frame memory 107 at a timing controlled by
Is written to. The color-switching illumination device 101 controls the timing generator 10 so as to synchronize with the generation timing of each color image of the electro-optical device 102.
6, a red light source 101R, a green light source 101G, a blue light source 101
B is repeatedly turned on in time sequence. In this way, the illumination device 101 generates color light in the same color sequence as the display color image, and illuminates the reflective electro-optical device 102. The thus-irradiated color light (display light) is reflected while being subjected to light modulation by the electro-optical device 102, and performs color image display in color sequence.

For example, the timing generator 106 supplies a light source switching timing signal to the light source color switcher 109 so that the illumination device 101 emits red light, and power is supplied from the light source power supply 110 to the selected light source. Then, the red light source 101R is turned on. A read timing signal is supplied from the timing generator 106 to the frame memory 107 so as to be synchronized with the switching timing of the light source color switcher 109, and the red component image data stored in advance in the drive cycle earlier than this is sequentially output. The sub-frame conversion circuit 108 that receives the read image data receives the electro-optical device 102 before the corresponding color sub-frame period set by the illumination device 101 in accordance with the weighting of the gradation of the color image for the red component. To output a color image digital signal to In the electro-optical device 102 which receives the color image digital signal, the color pixel digital signal is written into each pixel portion, and the red color image is formed over the entire color subframe period synchronized with the corresponding color subframe period. Is generated. Further, the timing generator 106 controls the timing so as to synchronize the timing of each component under the control of the microprocessor 105.
The electro-optical device 102 modulates red light for each pixel,
A red light image has been generated. Therefore, an image is displayed on the display screen by the red light whose light intensity is modulated for each pixel.

Next, a green light source 101 is
At the timing of turning on G, similarly to the case of red light, image data for green light is read from the frame memory 107 and the subframe conversion circuit 108 associates the image data with the color subframe period according to the weighting of the gradation. To output a color image digital signal to the electro-optical device 102. Accordingly, in each pixel portion of the electro-optical device 102, the color image digital signal is written prior to the corresponding color sub-frame period, and read out in synchronization with the corresponding color sub-frame period to generate a color image. . Along with this, the liquid crystal sandwiched between the pixel electrode and the common electrode modulates blue light, and a green light image is displayed simultaneously during a color sub-frame period corresponding to the display screen of the electro-optical device 102. Next, the same applies to the timing at which the blue light source 101B is turned on by the lighting device 101.
As described above, the color images of the three color lights are displayed on the electro-optical device 102.
Are generated sequentially in the corresponding color sub-frame period,
By repeating this cyclically within one frame period, a color image is displayed.

The timing of generating color light and the timing of generating a color image in the color sub-frame period sf of the third embodiment may be the timing shown in FIG. 3 as in the first embodiment, or may be the same as in the first embodiment. As shown in FIG. 10, as in FIG. 2, the time lengths of the color sub-frame periods sf of each group may be different from each other, and the timing for synchronizing the color image generation in these color sub-frame periods may be used. The number of groups in the color sub-frame period is not limited. Further, the number of color sub-frame periods may be different for each color within one frame period. Further, the order in which the colors are generated in the color sub-frame period is not limited to the order of R, G, and B, and may be any order.

(Embodiment 4) FIG. 13 shows the driving of an active matrix liquid crystal display element built in a panel substrate for an electro-optical device (reflection type liquid crystal panel) used in a color image generating apparatus according to Embodiment 4 of the present invention. It is a circuit diagram showing a circuit. In the fourth embodiment, a color image digital signal that is time-sequentially generated by weighting is alternately written and read in a pixel portion using a Y shift register for odd subframes and a Y shift register for even subframes. It is characterized by: That is, an odd-numbered color sub-frame period and an even-numbered color sub-frame period are different according to the generation order of a plurality of color sub-frame periods sf arranged in time sequence within one frame period 1F.
The pixel portion is alternately controlled using a shift register. In the fourth embodiment, a reflective liquid crystal panel having the same configuration as that of the electro-optical device 14 (see FIG. 4) in the above-described first embodiment is used. An active matrix liquid crystal display element driving circuit built in an optical device substrate 23 is the first embodiment.
And different. In FIG. 13, the same parts as those of the first embodiment are denoted by the same reference numerals, and will be described.

As in the case of the first embodiment, the panel substrate 23 of the fourth embodiment has active elements and capacitance elements formed on the main surface of a single-crystal semiconductor substrate (for example, 20 mm square), and has an interlayer insulating film formed thereon. Conductive layers are alternately stacked to form a film, and have a large number of rectangular pixel electrodes (reflective electrodes) 28 arranged in a matrix in a pixel region that occupies a main area in plan view.

The active matrix liquid crystal display element driving circuit 60 according to the fourth embodiment includes an active matrix circuit 51 and a signal line driving circuit (X
Driver 52). The scanning line driving circuit has a configuration slightly different from that of the first embodiment. 4 per pixel row
Of the scan electrodes Y1, Y2, Y3, Y4 addressed to the book, the first read timing pulse .PHI.3 on the third scan electrode Y3.
As the second read timing pulse Φ4 on the fourth scan electrode Y4.
Is the same as in the first embodiment in that outputs (FR bars) obtained by inverting the signals by the inverter INV are respectively used.

However, the first write timing pulse Φ1 supplied to the first scan electrode Y1 and the second scan electrode Y2
The configuration of the write timing circuit for generating the second write timing pulse .PHI. This write timing circuit uses a shift clock C
Based on LY and the odd frame start pulse DY1, a first write timing pulse .phi.11 to .phi.1n is sequentially generated for each pixel row through the first scan electrode Y1 during the odd color subframe period. Based on the register 53aa, the shift clock CLY and the even-numbered frame start pulse DY2, the second write timing pulses φ21 to φ2n are sequentially applied to the respective pixel rows during the even-numbered color sub-frames via the second scanning electrodes Y2. And a Y shift register 53ab for even-numbered frames, which is generated in a random manner.

Such an odd frame Y shift register 53aa and an even frame Y shift register 53ab
Matrix liquid crystal display element driving circuit 6 having
Even at 0, the generation of the write timing pulses .PHI.1 and .PHI.2 for each pixel row is the same as that of the first embodiment, so that the same operation and effect as those of the first embodiment can be obtained. In addition, since the Y-side shift speed can be changed for each field, it is convenient for interlace signal interpolation processing and the like.

The configuration and operation of the panel substrate 23 of the electro-optical device 14 used in the fourth embodiment have been described. And the operation and effect are the same.

(Embodiment 5) FIG. 14 shows an active matrix liquid crystal display element driving circuit built in a panel substrate of an electro-optical device (reflection type liquid crystal panel) in a color image generating apparatus according to Embodiment 5 of the present invention. Circuit diagram, Figure 1
5 is a timing chart for explaining the operation of the timing circuit. In FIG. 14, the same parts as those in the configuration of the first embodiment will be described with the same reference numerals.

The panel substrate of the fifth embodiment is also formed by forming active elements and capacitive elements on the main surface of a single-crystal semiconductor substrate (for example, 20 mm square), and alternately stacking interlayer insulating films and conductive layers thereon. It has a large number of rectangular pixel electrodes (reflection electrodes) 28 arranged in a matrix in a pixel region which is a film and occupies a main area in plan view.

The active matrix liquid crystal display element driving circuit 70 of the fifth embodiment includes an active matrix circuit 51 and a signal line driving circuit (X driver) similar to those of the first embodiment.
52 and a Y shift register 53a. In the fifth embodiment, in one full frame period 1F, R,
The G and B color sub-frame periods sf are included in time order.

As the read timing circuit of the first embodiment, an empty read timing circuit 53ab is provided. During this time, the empty read timing circuit 53ba
The blanking period setting clock BCK is input to the clock input C.
A D-type flip-flop (FF) having a data input D of a liquid crystal alternating signal FR 'which is switched for each color sub-frame and a liquid crystal alternating signal FR' and an output Q of the D-type flip-flop (FF) (AND) gate A3 and NOR (NOR) gate N1
Consisting of

Since the color image digital signal (Data) is serially transferred in the order of the R color sub-frame, the G color sub-frame, and the B sub-frame, as shown in FIG. A write operation of a G color sub-frame is performed during a read drive period, a write operation of a B color sub-frame is performed during a read drive period of the next G color sub-frame, and an R operation is performed during a read drive period of the next B color sub-frame. The writing operation of the color sub-frame is performed.

Since the liquid crystal alternating signal FR 'alternating with the blanking period setting clock BCK for each subframe is input to the D-type flip-flop (FF), when the liquid crystal alternating signal FR' rises, the D-type flip-flop is switched. Since the output Q of the (FF) rises at a time delayed by the blanking period Tb from the rise of the liquid crystal alternating signal FR ', the output RE2 of the NOR (NOR) gate N1 is synchronized with the rising of the liquid crystal alternating signal FR'. The output RE1 of the AND gate A3 rises in synchronization with the rise of the output Q. The output RE1 is supplied to the gate of the third MOSFET (T3) via the third scan electrode Y3 as a first read timing pulse .PHI.3 ',
The output RE2 is supplied as a second read timing pulse .PHI.4 'via the fourth scan electrode Y4 to the fourth MOSFET.
(T4), the fourth MOS
The blanking period T from the time when the FET (T4) is closed
The third MOSFET (T3) is opened with an interval of b.
Therefore, when switching the frame period, the fourth MOSFET
Since (T4) and the third MOSFET (T3) are closed at the same time, the mixing of the B signal and the R signal does not occur, and the additive color mixing at the time of switching the hue lighting device is not picked up.

When the liquid crystal alternating signal FR 'falls, D
Since the output Q of the flip-flop (FF) falls at a time delayed by the blanking period Tb from the fall of the liquid crystal alteration signal FR ', the output RE1 of the AND gate A3 outputs the fall of the liquid crystal alteration signal FR'. And the output RE2 of the NOR gate N1 rises in synchronization with the fall of the output Q. Therefore, the third M
The fourth MOSFET (T4) is opened after a blanking period Tb from the time when the OSFET (T3) is closed. Therefore, when the subframe is switched, the fourth MOSF
Since the ET (T4) and the third MOSFET (T3) are closed at the same time, the mixing of the R signal and the G signal does not occur, and the additive color mixing at the time of switching the hue lighting device is not picked up. Similarly,
No mixing of the G signal and the B signal occurs, and additive color mixing at the time of switching the hue light source is not picked up.

As described above, in the fifth embodiment, the fourth MOSFET (T4) and the third MOSFET (T3) open and close exclusively with a blanking period Tb therebetween.
Since the two do not penetrate, not only does the mixing of the holding signals not occur, but also does not pick up the additive color mixing at the time of switching the hue lighting device, a high-quality color display can be achieved. As described above, by adding the space read timing circuit 53ab to the configuration, it is possible to generate particularly good color images in the color sequential field sequential system. Also, at the time of frame switching, the fourth MOSFE
By reliably eliminating the simultaneous opening of T (T4) and the third MOSFET (T3), it is possible to prevent mixing of holding signals at the time of frame switching.

The other configuration of the fifth embodiment is as follows.
Since this embodiment is the same as the first embodiment, the same operation and effect as those of the first embodiment can be obtained.

(Embodiment 6) FIG. 16 is a circuit diagram showing an active matrix liquid crystal display element driving circuit 80 built in a panel substrate of an electro-optical device in a color image generating apparatus according to Embodiment 6 of the present invention. FIG. 17A is a circuit diagram showing the pixel circuit, and FIG. 17B is a timing chart for explaining the operation of the pixel circuit. In addition,
In FIG. 16, the same portions as those in the configuration of the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

In the panel substrate according to the sixth embodiment, an active element and a capacitive element are formed on the main surface of a single crystal semiconductor substrate (for example, 20 mm square), and an interlayer insulating film and a conductive layer are alternately stacked thereon. In addition, it has a large number of rectangular pixel electrodes (reflection electrodes) 28 arranged in a matrix in a pixel region that occupies a main area in plan view.

The active matrix liquid crystal display element driving circuit 80 of the sixth embodiment includes a signal line driving circuit (X driver) 52 and a Y shift register 53a, similarly to the first embodiment shown in FIG. Circuit 8
The configuration of one pixel circuit 82 is different from the pixel circuit 55 of the first embodiment. The pixel circuit 82 according to the sixth embodiment is configured as shown in FIG.
As shown in (A), the odd color subframe signal V (O) of the color image digital signal V sent to the signal electrode X
Hold circuit 83 for alternately sampling and holding the pixel data and the even color subframe signal V (E). The sample and hold circuit 83 frames the odd color subframe signal V (O) and the even color subframe signal V (E). And a pixel drive circuit 84 for alternately reading and driving the pixel electrode 28 by voltage.

The sample-and-hold circuit 83 comprises a first sample-and-hold circuit 83a and a second sample-and-hold circuit 83b.
Is an N-type first MOSFET (Q1) having a source S electrically connected to the signal electrode X and a gate G electrically connected to the first scan electrode Y1; And a first storage capacitor C1 connected thereto. The second sample and hold circuit 83b has a similar configuration, and is a P-type second circuit having a source S electrically connected to the signal electrode X and a gate G electrically connected to the second scan electrode Y2. (Q2) and a second storage capacitor C2 electrically connected to its drain D. The first MOSFET (Q1) and the second MOSFET (Q2) are of opposite conductivity type, and constitute a so-called CMOS. Therefore, the first write timing pulse .PHI.1 for the first MOSFET (Q1) requires a rising pulse, and the second write timing pulse .PHI.2 for the second MOSFET (Q2) requires a falling pulse. Therefore, the write timing circuit 5 of the sixth embodiment
3b 'is the second of the selection timing circuit 53b shown in FIG.
AND gate A2 for scanning electrode Y2 is connected to NAND gate N
2 is replaced.

On the other hand, the pixel drive circuit 84 includes a source S electrically connected to the first storage capacitor C 1 and a third scan electrode Y.
P-type third M having a gate G electrically connected to the third M
An N-type fourth MOSFET (Q4) having an OSFET (Q3), a source S electrically connected to the second storage capacitor C2, and a gate G electrically connected to the third scan electrode Y3.
), A third MOSFET (Q3) and a fourth MOS
An N-type fifth MOSFET having a gate G electrically connected to the drain D of the FET (Q4), a drain D electrically connected to the pixel driving power supply Vdd, and a source S electrically connected to the signal electrode 14. (Q5). Third MO
It is of a conductivity type opposite to that of the SFET (Q3) and the fourth MOSFET (Q4), and constitutes a so-called CMOS.
The third MOSFET (Q3) and the fourth MOSFET (Q3)
4) means that the gate opens and closes exclusively with the same polarity gate voltage.
Both gates G are supplied with a common read timing pulse .PHI.3 via only one third scan electrode Y3. Therefore, the number of scanning electrodes destined for a pixel row can be reduced by one.

In the sixth embodiment, a relatively high voltage is applied at which the counter electrode (common electrode; LC.COM) 27 on the counter transparent substrate 25 side, which is assembled to face the panel substrate 23, switches for each frame. It is supposed to be.

Therefore, as shown in FIG. 17B, the potential of the counter electrode LC.COM is positive in the odd color sub-frame period 1sf, so that the fourth MOSFET (Q4)
Is opened, the holding signal is read out, and the fifth MOSFET
When (Q5) is opened, even if the power supply potential Vdd is low, the potential difference between the signal electrode potential on the negative electrode side (power supply potential Vdd) and the potential of the counter electrode LC.COM on the positive electrode side is relatively large. In the even color sub-frame period 2sf, the counter electrode L
Since the potential of C.COM becomes negative, the third MOSFET
(Q3) is opened, the holding signal is read out, and the fifth MOS
When the FET (Q5) is opened, the potential difference between the signal electrode potential on the positive electrode side and the potential of the counter electrode LC.COM on the negative electrode side is relatively large.

As described above, the counter electrode (common electrode) LC.COM
Of the liquid crystal cell LC can be prevented, and the dynamic range of the signal applied to the pixel electrode 28 can be relatively reduced by performing a so-called common swing that alternates the potential of each sub-frame. Circuit 82
MOSFET can be formed as a low breakdown voltage element. Accordingly, the occupied area can be reduced by miniaturizing the element, and a high-density high-definition display device can be realized by increasing the aperture ratio.

Although the configuration of the panel substrate 23 of the electro-optical device 14 according to the sixth embodiment has been described above, other configurations according to the sixth embodiment are the same as those of the first embodiment, and are the same as those of the first embodiment. It has the function and effect of.

(Embodiment 7) FIG. 18 is a circuit diagram showing an active matrix liquid crystal display element driving circuit built in a panel substrate of an electro-optical device in a color image generating apparatus according to Embodiment 7 of the present invention. In FIG. 18, the same portions as those in the configurations of the fourth and sixth embodiments are denoted by the same reference numerals, and the description thereof will be omitted.

Embodiment 7 In the panel substrate, an active element and a capacitive element are formed on the main surface of a single crystal semiconductor substrate (for example, 20 mm square), and an interlayer insulating film and a conductive layer are alternately stacked thereon to form a film. And a large number of rectangular pixel electrodes (reflection electrodes) 28 arranged in a matrix in a pixel region that occupies a main area in plan view.

The active matrix liquid crystal display element driving circuit 85 of the seventh embodiment includes a signal line driving circuit (X driver) 52, an odd frame Y shift register 53aa, and an even frame frame, similarly to the fourth embodiment shown in FIG. A Y shift register 53ab is provided, and similarly to the sixth embodiment shown in FIGS. 16 and 17, an active matrix circuit 81 having a pixel circuit 82 is provided. Therefore, the seventh embodiment has the same operation and effect as those of the fourth and sixth embodiments.

Although the first to seventh embodiments of the color image generation apparatus and the color image generation method according to the present invention have been described above, in these embodiments, the panel substrate has the switching element on the main surface of the semiconductor substrate. Although formed, the substrate is not limited to a semiconductor substrate, and an insulating substrate such as a glass substrate or a quartz substrate can be used as the substrate.
Needless to say, the present invention can be applied to a case where a thin film transistor (TFT) or the like is formed on an insulating substrate as a switching element. In the first to seventh embodiments, regardless of the dot-sequential method or the line-sequential method, the writing sequence is not the pixel driving sequence at the same time, but only the temporary storage sequence. Since the color image corresponding to each color sub-frame period can be switched and displayed simultaneously for all pixels, a non-uniform display screen can be eliminated and a high-quality color image generation device with good gradation expression can be achieved. Can be provided. In addition, since simultaneous switching display can be performed as described above, it is possible to realize high-quality large-screen or high-definition regardless of the number of pixels.

The first to seventh embodiments have a configuration in which a so-called capacitor memory is provided in which writing of a color image digital signal is stored in the holding capacitors C1 and C2.
A configuration may also be adopted in which a static memory is created for each pixel to store digital values. Embodiments 8 and 9 described below are examples in which a static memory is built for each pixel.

(Eighth Embodiment) FIG. 19 is a circuit diagram showing an active matrix liquid crystal display element driving circuit built in a panel substrate in a color image generating apparatus according to an eighth embodiment of the present invention, and FIG. FIG. 20B is a circuit diagram showing a digital storage circuit provided for each pixel of the matrix liquid crystal display element driving circuit, FIG. 20B is a timing chart for explaining the operation of the digital storage circuit, and FIG. 21 is an overall diagram of the active matrix liquid crystal display element driving circuit. 6 is a timing chart illustrating an operation.

The panel substrate according to the eighth embodiment is also formed by forming active elements and capacitive elements on the main surface of a single crystal semiconductor substrate (for example, 20 mm square) and alternately stacking an interlayer insulating film and a conductive layer thereon. It has a large number of rectangular pixel electrodes (reflection electrodes) 28 arranged in a matrix in a pixel region which is a film and occupies a main area in plan view.

An active matrix liquid crystal display element driving circuit 90 shown in FIG. 19 includes a matrix circuit 91 formed immediately below a pixel region (display region) of a semiconductor substrate, and a color image digital signal (DATA) input by serial transfer. To the signal electrodes (X) X ₀ to 1 for each pixel column of the matrix circuit 91.
Serial-parallel conversion shift register for feeding the X _m in a line sequential manner (signal electrode driver circuit, X driver) 92, a digital memory circuits for each pixel of the matrix circuit 91 M (M ₀₀ ~
M _nm ) on a row-by-row basis by applying a latch control signal (write timing signal) to the scanning electrodes Y ₁ (Y _{10 to} Y ₁₀ ) addressed to two pixel rows.
_1n ), a scan electrode driving circuit (Y driver) 93 for feeding through Y ₂ (Y _{20 to} Y _2n ), and a second timing pulse (normal phase reading) for driving all the pixel electrodes 28 simultaneously. Two scanning electrodes Y ₃ (Y _{30 to} Y _3n ), Y each transmitting a clock pulse RCK (φ3) and a read clock pulse RCK bar (φ4) of the opposite phase for each pixel row.
₄ and a _(Y 40 ~Y _4n). Here, the serial-parallel conversion shift register 92 and the scan electrode drive circuit 93 constitute a peripheral circuit for the matrix circuit 91 in the central pixel area.

The serial / parallel conversion shift register 92 shifts and transfers the color image digital signals (DATA = D _{0 to} D _m ) of the serial column in synchronization with the shift clock CLX, and outputs the signal electrodes X _{0 to} X every one horizontal period. _The corresponding color image digital signal appears on _m . The scan electrode driving circuit 93 outputs a scan start pulse (frame start pulse) DY to a shift clock CLY.
, A scan electrode shift register (Y shift register) 93a for sequentially generating row drive timing pulses φ ₀ to φ _n on a pixel row every one vertical period, and row drive timing pulses φ _{0 to} φ _n. phi _n and write clock pulses WCK and scanning based on the electrode Y1, respectively on the Y2 first timing pulse (positive phase latch control pulse phi
1, a latch timing circuit 93b for generating a latch control pulse φ2) having an opposite phase.

The latch timing circuit 93b generates row drive timing pulses φ _{0 to} φ ₀ corresponding to each pixel row.
The logical product of _n and the write clock pulse WCK and outputs on a first scan electrode Y ₁ as the positive phase of the latch control pulse .phi.1, the inverted output of the AND output .phi.1 as the latch control pulse φ2 of opposite phase 2 a logic circuit _G 0 ~G _n to be output on the scanning electrode _{Y 2.}

The matrix circuit 91 includes a digital storage circuit M (M ₀₀ ) shown in FIG. 20A at each of the matrix intersections of the signal electrodes X extending in the column direction and the scanning electrodes Y extending in the row direction. ~ M _nm ). Each of the digital storage circuits M has a data input D to which the color image digital signal Di arriving at the signal electrode Xi is input, and a pixel electrode 28 which sandwiches the liquid crystal 26 in opposition to the common electrode 27.
And a storage output Q for applying a drive voltage to the signal electrode Xi in a preceding color sub-frame period (for example, an odd-numbered color sub-frame period within one frame period) sf.
And a first latch circuit L1 for fetching and temporarily storing the color image digital signal Di arriving at the first latch circuit L1 in the delayed color sub-frame period (even-numbered color sub-frame period) sf. A second latch circuit L2 for reading the color image digital signal Di before the latch operation of the first latch circuit L1, temporarily storing the digital image signal Di, and outputting the same to its storage output Q.

The first latch circuit L1 is an N-channel first data transfer MOSFET (T1) for taking in a color image digital signal in synchronization with the positive-phase latch control pulse φ1 of the first scan electrode _Yi1. And the first data transfer MO
The data passed through the SFET (T1) is transferred to the second scan electrode Y
_and a first synchronous flip-flop F1 that performs a temporary storage operation in synchronization with the disappearance of the opposite-phase latch control pulse φ2 on _i2 . The second latch circuit L2, the third read clock pulse RCK positive phase on the scanning electrode Y _i3
(Φ3), the first synchronous flip-flop F1
An N-channel type second data transfer MOSFET (T2) for taking in the output data of
The data passed through the SFET (T2) is transferred to the fourth scan electrode Y.
and a second synchronous flip-flop F2 that performs a temporary storage operation in synchronization with the disappearance of the opposite-phase latch control pulse φ4 on _i4 and outputs the storage output Q.

The first synchronous flip-flop F1 has 2
Of the inverters INV1 and INV2 in a cyclic connection
And an N-channel type first memory holding control circuit for temporarily disconnecting the electrical connection between the input of the first stage INV1 and the output of the feedback stage INV2 in synchronization with the negative-phase latch control pulse φ2 MOSFET (Q1).
The second synchronous flip-flop F1 includes a second double inverting circuit in which two inverters INV3 and INV4 are cyclically connected, an input of the first-stage inverter INV3 and a feedback stage in synchronization with a read timing pulse φ4 having an opposite phase. Second for temporarily disconnecting the electrical connection with the output of the inverter INV4
And a MOSFET (Q2) for storage retention control.

As shown in the timing chart of FIG. 21, for example, in the first color sub-frame period 1sf, the liquid crystal alternating signal FR which switches every sub-frame is displayed.
When rises, in synchronism with the rising edge, with the third scan electrode _Y 30 _{to Y 3n} on the positive phase of the read timing pulse RCK (.phi.3) is generated, the fourth scan electrodes _Y 40 _{to Y 4n} on An opposite-phase read timing pulse RCK (φ4) is generated. The scan start pulse DY is applied to the scan electrode shift register 93a at the same time when the AC conversion signal FR rises, and the row drive timing pulses Φ _{0 to} Φ _n are synchronized with the shift clock CLY generated at fixed intervals.
Are sequentially generated, and the write clock pulse WCK is generated in synchronization with the shift clock CLY. Therefore, the first scan electrodes _Y 10 to Y pixel row
The on _1n positive phase of the latch control pulse φ1 ₀ ~φ1 _n (φ
With 1) is generated, the second scan electrodes _Y 20 to Y
_2n , the opposite-phase latch control pulses φ2 _{0 to} φ2 _n (φ
2) is generated.

Therefore, the first to fourth scan electrodes Y _i1
To Y _i4 include pulses φ1 to φ1 in the order shown in FIG.
4 is generated. During the writing period W1 of the preceding color sub-frame period (for example, 1 sf), the latch control pulses φ1 and φ2 are applied on the first scanning electrode Y _i1 and the second scanning electrode Y _i2.
Occurs, in the first synchronous flip-flop F1, the first data transfer MOSFET (T1) is turned on, and the first storage holding control MOSFET (T1) is turned on.
Since (Q1) is turned off, the output of the feedback-stage inverter INV2 does not feed back to the first-stage inverter INV1, and the logical value of the preceding data D1 from the first data transfer MOSFET (T1) is applied to the first-stage inverter INV1. The inverted logic value appears at the output of the first-stage inverter INV1. When the latch control pulses φ1 and φ2 disappear and the write period W1 ends, the first data transfer MOSFET (T1) is turned off and the first memory holding control MOSFET (T1) is turned off.
Since (Q1) is turned on, the output of the feedback-stage inverter INV2 is fed back to the first-stage inverter INV1, the storage operation of the first synchronous flip-flop F1 re-functions, and the first synchronous flip-flop F1 stores the preceding data in the first synchronous flip-flop F1. (Color image digital signal) The inverted logical value of D1 is temporarily stored.

The read clock pulse φ3 is applied to the third scan electrode Y _i3 and the fourth scan electrode Y _{i4 in} the read period R1 in the next delayed color sub-frame period (for example, 2 sf).
And φ4 occur, the second synchronous flip-flop F
2, the second MOSFET for data transfer (T2)
Is turned on, and the second memory holding control MOSFE
Since T (Q2) turns off, the feedback stage inverter INV4
Does not feed back to the first-stage inverter INV3, the inverted logical value of the preceding data D1 from the first synchronous flip-flop F1 is applied to the first-stage inverter INV3, and the inverted logical value (preceding data D1) of the first-stage inverter INV3 is Appears in the output. When the read clock pulses φ3 and φ4 disappear and the read period W1 ends, the second data transfer MOSFET (T2) is turned off and the second memory holding control MOSFET (Q2) is turned on. The output of the inverter INV4 is the first-stage inverter INV
3, the storage operation of the second synchronous flip-flop F2 re-functions, the preceding data D1 is temporarily stored in the second synchronous flip-flop F2, and the storage output Q is applied to the pixel electrode 28. Continue to be supplied. Then, the first scan electrode Y _i1 and the second scan electrode Y during the writing period W2.
_{When the} latch control pulses φ1 and φ2 are generated on _i2 , the first synchronous flip-flop F1
Is rewritten to the delay data D2.

The writing method of the eighth embodiment is a line-sequential method. However, the writing order is limited to the first synchronous flip-flop F1 and the write sequence is continued up to the second synchronous flip-flop F2. It does not spread. For this reason, in each color sub-frame period sf, sub-frame switching display of all pixels can be performed at the same time, and unevenness of the display screen can be eliminated. Since the simultaneous still display of all the pixels of the previous color sub-frame can be realized during the writing operation of the subsequent color sub-frame and a color image can be displayed over the entire color sub-frame period, the display time and the writing time Are not contradictory within one frame period, and the brightness can be increased and the high image quality can be achieved.

In the eighth embodiment, the second flip-flop F2 functions as a driver for statically driving the pixel electrode. Unlike active matrix driving, there is no attenuation of the pixel driving signal, and complete digital driving is possible.

The above-mentioned first and second data transfer MOSFETs (T1, T2) are turned on / off mutually exclusively, and the first and second memory holding control MOSFETs (Q
1, Q2) MO, which are turned on / off mutually exclusively, but with first and second data transfer MOSFETs (T1, T2
2) are of opposite conductivity types, and the first and second storage holding control MOSFETs (Q1, Q2) are also of opposite conductivity types, so that both the positive-phase pulse and the negative-phase pulse are digital storage circuits. M need not be sent to
This can be reduced.

The panel substrate of the electro-optical device used in the color image generating apparatus according to the eighth embodiment has been described above. Other configurations and effects of the eighth embodiment are the same as those of the first embodiment.

(Embodiment 9) FIG. 22 is a circuit diagram showing a digital storage circuit built in a panel substrate (electro-optical device substrate) of an electro-optical device according to a ninth embodiment of a color image generating apparatus according to the present invention. It is. In FIG. 22, the same portions as those in the configuration of the eighth embodiment are denoted by the same reference numerals.
The description is omitted.

Panel substrate 23 in Embodiment 9
Also, active elements and capacitive elements are formed on the main surface of a single-crystal semiconductor substrate (for example, 20 mm square), and an interlayer insulating film and a conductive layer are alternately stacked thereon to form a film. Has a large number of rectangular pixel electrodes (reflection electrodes) 28 arranged in a matrix in a pixel area occupying the area. The ninth embodiment also has the same serial-to-parallel conversion shift register 92 and scan electrode driving circuit 93 as the above-described eighth embodiment, but the configuration of the digital storage circuit M ′ is the same as that of the eighth embodiment. Different from circuit M.

As in the case of the digital storage circuit M, the digital storage circuit M 'is connected to the data input D to which the color image digital signal Di arriving at the signal electrode Xi is input and to the pixel electrode 28 which sandwiches the liquid crystal 26 on the common electrode 27. A first latch circuit which includes a storage output Q for applying a drive voltage and takes in and temporarily stores a color image digital signal Di arriving at the signal electrode Xi in a preceding color subframe period (for example, an odd color subframe period). L1 'and the color image digital signal Di temporarily stored in the first latch circuit L1' during the delayed color sub-frame period (for example, even color frame period) are read before the latch operation of the first latch circuit L1 '. And a second latch circuit L2 'for temporarily storing and outputting to a storage output Q.

The first latch circuit L1 'receives a color image digital signal Di as an input, and has a first clocked inverter K1 which performs logical operation in synchronization with a positive-phase latch control pulse φ1 of the first scan electrode _Yi1. And a first synchronous flip-flop F1 'for temporarily storing the output data in synchronization with the disappearance of the negative-phase latch control pulse φ2 on the second scan electrode _Yi2 . Also, the second latch circuit L2 '
Includes a clocked inverter K2 that logic operation in synchronization with the first output data of the synchronous flip-flop F1 'as an input the third scan electrode Y _i3 on the positive-phase read clock pulse RCK (.phi.3), the read clock pulse RCK reverse phase output data on the fourth scan electrode Y _i4
A second synchronous flip-flop F that performs a temporary storage operation in synchronization with the disappearance of the bar (φ4) and outputs the same to its storage output Q
2 '.

The first synchronous flip-flop F1 '
A first double inverting circuit in which two inverters INV1 and INV2 'are cyclically connected, and a feedback stage inverter I
NV2 'is a clocked inverter which interrupts the logic operation in synchronization with the opposite-phase latch control pulse φ2, and the second synchronous flip-flop F2' also has two inverters IN
V3, a second double inverting circuit in which an inverter INV4 'is cyclically connected, and its feedback stage INV4' is a clocked inverter that interrupts a logical operation in synchronization with a read clock pulse φ4 having an opposite phase.

Also in the ninth embodiment, as shown in FIG. 20B, the preceding color sub-frame period (for example, 1s
f) During the writing period W1, the first scan electrode Yi1 and the second
When the latch control pulses .phi.1 and .phi.2 are generated on the scan electrode Yi2, the first clocked inverter K1 performs a logical operation and the feedback inverter INV2 'suspends the logical operation in the first synchronous flip-flop F1'. Therefore, the output of the feedback-stage inverter INV2 'does not feed back to the first-stage inverter INV1, and the logical value of the preceding color image digital signal D1 from the first clocked inverter K1 is applied to the first-stage inverter INV1. It appears at the output of the first-stage inverter INV1. When the latch control pulses φ1 and φ2 disappear and the write period W1 ends,
Since the first clocked inverter K1 interrupts the logic operation and the feedback stage inverter INV2 'performs the logic operation, the output of the feedback stage inverter INV2' is fed back to the first stage inverter INV1 and the first synchronous flip-flop F1 ' Is reactivated, and the preceding color image digital signal D1 is temporarily stored in the first synchronous flip-flop F1 '.

The read clock pulse φ3 is applied to the third scan electrode Yi3 and the fourth scan electrode Yi4 in the read period R1 in the next delayed color sub-frame period (for example, 2 sf).
And φ4 occur, the second synchronous flip-flop F
In 2 ', since the second clocked inverter K2 performs a logical operation and the feedback-stage inverter INV4' interrupts the logical operation, the output of the feedback-stage inverter INV4 'does not feed back to the first-stage inverter INV3, but the first synchronous The inverted logical value of the preceding color image digital signal D1 from the formula flip-flop F1 ′ is applied to the first-stage inverter INV3,
The inverted logical value (preceding color image digital signal D1) appears at the output of the first-stage inverter INV3. When the read clock pulses φ3 and φ4 disappear and the read period R1 ends, the second clocked inverter K1 stops the logical value operation and the feedback stage inverter INV4 ′ performs the logical operation. The output is fed back to the first-stage inverter INV4, and the storage operation of the second synchronous flip-flop F2 'is re-functioned, and the preceding color image digital signal D1 is converted to the second synchronous flip-flop F2'.
And the stored output Q is stored in the pixel electrode 2
8 continue to be supplied. Thereafter, during the writing period W2, the first
When the latch control pulses φ1 and φ2 are generated on the scan electrode Yi1 and the second scan electrode Yi2, the stored content of the first synchronous flip-flop F1 ′ is changed to the delayed color image digital data D2 in the same manner as described above. Rewritten.

The panel substrate of the electro-optical device of the color image generating apparatus according to the ninth embodiment has been described above. The other configuration of the ninth embodiment is the same as that of the first and eighth embodiments. It has the same effect.

In the ninth embodiment, since the digital storage circuit M 'uses a clocked inverter, it is effective in reducing power consumption, shaping the waveform, and amplifying the energy, and contributes to ensuring the storage operation. Can be. Note that a three-state buffer can be used instead of the clocked inverters K1 and K2.

Although the first to ninth embodiments have been described above, the color image generating apparatuses of these embodiments are
For example, the present invention can be applied to various electronic devices such as a liquid crystal projector, a word processor, and a personal computer. Further, the present invention is not limited to the above-described first to ninth embodiments, and various changes accompanying the gist of the configuration are possible. For example, the first embodiment described above
In the ninth embodiment, the reflection type liquid crystal panel is applied as the electro-optical device, but a DMD (digital micromirror device) may be applied. The DMD modulates the amount of light incident on the projection lens by changing the inclination angle of the reflection mirror in accordance with the color image digital signal for each pixel. More specifically, the time width for directing the light reflected by the reflection mirror to the projection lens and the time width for absorbing the reflected light by the absorber are determined by pulse width modulation (PWM) according to the color image data.
Then, the intensity of the color light can be modulated for each pixel. Then, the color image digital data provided on the panel substrate (electro-optical device substrate) used in the above-described embodiment is applied to the substrate on which the reflection mirrors are arranged in a matrix, prior to the corresponding color sub-frame period. Means for simultaneously reading out the data during the corresponding color sub-frame period (e.g., one having the above-described capacitor memory or one having a static memory), so that the data can be simultaneously obtained during the color sub-frame period. The reflection mirror of each pixel can be driven to change the angle.

In the first to ninth embodiments, a reflection type liquid crystal panel is applied as an electro-optical device. However, a color light is transmitted using a transmission type electro-optical device such as a transmission type liquid crystal panel. At the same time, the light intensity may be modulated. In the case of a liquid crystal panel, a polarizing element such as a polarizing plate is required on at least one of the color light incident side and the emission side of the panel (not necessary for a light scattering type liquid crystal). That is, in each embodiment, the present invention has been described mainly with respect to the reflective electro-optical device. However, the field-sequential color image display device and the display method according to the present invention pass through the transmissive electro-optical device. May be configured as a projection display device that projects and displays the modulated light on a screen, or the illumination device 101 shown in FIG. 12 is disposed on the back side and the color light therefrom is modulated by a transmission electro-optical device. Alternatively, the display device may be configured to directly view the transmitted light.

The present invention is not limited to the setting of the length of the color sub-frame period and the number of divisions of the color generation period within one frame period in each of the above-described embodiments. Needless to say, it can be appropriately changed according to the level.

Further, in the above-described embodiment, three-color light of red light, green light, and blue light is described as the color light. However, three-color light of cyan light, magenta light, and yellow light may be used, or two-color light or three-color light may be used. More colored light can be used.

[Brief description of the drawings]

FIG. 1 is a first embodiment of a color image generating apparatus according to the present invention.
FIG.

FIG. 2 is a front view of a rotating color filter used in the first embodiment.

FIG. 3 is a timing chart showing color generation timing and color image generation timing in the first embodiment.

FIG. 4 is a cross-sectional view of the electro-optical device according to the first embodiment.

FIG. 5 is a circuit diagram showing an active matrix liquid crystal display element driving circuit built in the electro-optical device substrate of the electro-optical device according to the first embodiment.

FIG. 6 is a circuit diagram showing a pixel circuit according to the first embodiment.

FIG. 7 is a timing chart illustrating the operation of the pixel circuit according to the first embodiment.

FIG. 8 is a timing chart illustrating the operation of the pixel circuit according to the first embodiment.

FIG. 9 is a second embodiment of the color image generating apparatus according to the present invention.
FIG. 2 is a front view showing a rotating color filter used in the embodiment.

FIG. 10 is a timing chart showing the timing of generation of color light and generation of each color image in the second embodiment.

FIG. 11 is a front view showing a modification of the rotating color filter.

FIG. 12 is a configuration explanatory view showing a third embodiment of the color image generation device according to the present invention.

FIG. 13 is a circuit diagram showing an active matrix liquid crystal display element driving circuit built in a panel substrate of an electro-optical device according to a fourth embodiment of the color image generating apparatus according to the present invention.

FIG. 14 is a circuit diagram showing an active matrix liquid crystal display element driving circuit formed on a panel substrate of an electro-optical device according to a fifth embodiment of the color image generating apparatus according to the present invention.

FIG. 15 is a timing chart illustrating the operation of the timing circuit according to the fifth embodiment.

FIG. 16 is a circuit diagram showing an active matrix liquid crystal display element driving circuit built in a panel substrate of an electro-optical device according to a sixth embodiment of the color image generating apparatus according to the present invention.

FIG. 17A is a circuit diagram illustrating a pixel circuit in Embodiment 6, and FIG. 17B is a timing chart illustrating operation of the pixel circuit.

FIG. 18 is a circuit diagram showing an active matrix liquid crystal display element driving circuit built in a panel substrate of an electro-optical device according to a seventh embodiment of the color image generating apparatus according to the present invention.

FIG. 19 is a circuit diagram showing an active matrix liquid crystal display element driving circuit built in a panel substrate in a color image generating apparatus according to Embodiment 8 of the present invention.

20A is a circuit diagram illustrating a digital storage circuit provided for each pixel of an active matrix liquid crystal display element driving circuit in Embodiment 8, and FIG. 20B is a timing chart illustrating operation of the digital storage circuit.

FIG. 21 is a timing chart illustrating the overall operation of the active matrix liquid crystal display element driving circuit according to the eighth embodiment.

FIG. 22 is a circuit diagram illustrating a digital storage circuit built in a panel substrate (electro-optical device substrate) of an electro-optical device according to a ninth embodiment of a color image generating apparatus according to the present invention.

23A is a timing chart illustrating a color light generation period using a pulse width modulation method defined by a vertical synchronization signal VSYN, and FIG. 23B is a timing chart illustrating red light R in FIG.
6 is a timing chart showing an example of selecting a pulse width during a light generation period.

FIG. 24 is a front view of a rotating color filter of a conventional color image generating device.

FIG. 25 is a timing chart of a conventional color image generation device.

FIG. 26 is a timing chart showing a color image generation timing of another conventional example.

[Explanation of symbols]

10, 100 color image generation device 11 light source 12 rotating color filter 14, 102 electro-optical device 16 screen 17, 105 microprocessor 18, 106 timing generator 19, 107 frame memory 20, 108 sub-frame conversion circuit 21, 103 drive circuit 23 panel Substrate (electro-optical device substrate) 25 opposing transparent substrate 26 liquid crystal 27 common electrode 28 pixel electrode 50, 60, 70, 80, 85, 90 active matrix liquid crystal display element driving circuit 51, 81, 91 active matrix circuit 52 signal line Drive circuit (X driver) 52a Pixel signal sampling circuit 52b Signal line shift register (X shift register) 53 Scan line drive circuit (Y driver) 53a Scan line shift register (Y shift register) 53b Selection Imming circuit 53b 'Write timing circuit 53ba Empty read timing circuit 53aa Y shift register for odd frame 53ab Y shift register for even frame 55, 72, 82, 92 ... pixel circuits 56 and 83, sample hold circuits 56a and 83a Sample hold circuit 56b, 83b Second sample hold circuit 57, 84 Pixel drive circuit 101 Illumination device 109 Light source color switcher A1, A2, AND gate N1 NOR gate N2 NAND gate INV Inverter FF D-type flip-flop T1, Q1... First MOSFET T2, Q2 Second MOSFET T3, Q3 Third MOSFET T4, Q4 Fourth MOSFET T5, Q5 Fifth MOSFET X, X1 to Xm Signal electrode Y Scan electrode Y1, Y11 to Yn1 First scan Pole Y2, Y12 to Yn2 Second scan electrode Y3, Y13 to Yn3 Third scan electrode Y4, Y14 to Yn4 Fourth scan electrode φH1 to φHm Switch drive timing pulse φV1 to φVn Row drive timing pulse φ1 First write Timing pulse Φ2 Second write timing pulse Φ3 First read timing pulse Φ4 Second read timing pulse FR, FR 'Liquid crystal alternating signal CLX, CLY, CLY1, CLY2 Shift clock DX Latch pulse DY Frame start pulse V (O Odd color subframe signal V (E) Even color subframe signal

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09F 9/00 325 G09F 9/00 360Z 360 G09G 3/20 641A G09G 3/20 641 G02F 1/1335 530

Claims (28)

[Claims] 1. A color light generation unit that generates a plurality of color lights in a time sequence within one scanning period, and an image generation unit that generates a color image for each of the color lights in a time sequence corresponding to the color light generation units Wherein the generation period of each color light in one scanning period is divided into a plurality of divided color light generation periods, and the color light generation unit generates the color light for each divided color light generation period. The image generation unit, in a weighting period of the gradation of the pulse width modulation method defined for each color light within one scanning period,
An image having a gradation of each color light is generated by selectively driving pixels based on image information, and the plurality of divided color light generation periods and the gradation weighting periods are associated with each other. Characteristic color image generation device. 2. The method according to claim 1, wherein a plurality of group periods in which the divided color light generation periods for generating the different color lights are positioned one by one in time sequence are provided in one scanning period. Item 2. The color image generation device according to Item 1. 3. The color light generated in the group period has a constant color order.
A color image generating apparatus as described in the above. 4. The method according to claim 2, wherein the order of the colors of the color light generated within the group period is undefined.
A color image generating apparatus as described in the above. 5. The color image generating apparatus according to claim 1, wherein the divided color light generation periods of the same color light are set to be equal to each other. 6. The color image generating apparatus according to claim 1, wherein the divided color light generation periods of the same color light are set to different periods. 7. The length of each of the plurality (n: an integer of 2 or more) of the divided color light generation periods constituting each of the color light generation periods within one scanning period is within one frame period. Assuming that the allocated time of the color light of each color to be generated is CT and the maximum number of gradations is Hmax, the following expression is satisfied: CT · 2 ^m / Hmax, where m is an integer of 0 or more and less than n. 7. The color image generating apparatus according to claim 6, wherein the length of the color image is equal to the length of the color image. 8. The color light generation unit according to claim 1, further comprising: a light source; and a rotating color filter configured to generate the plurality of color lights based on the light from the light source. A color image generating apparatus as described in the above. 9. The light source according to claim 1, wherein the color light generation unit includes a light source that generates the plurality of color lights, and the light sources are switched on and off in time sequence. A color image generating apparatus as described in the above. 10. The color image generation device according to claim 1, wherein the image generation unit is a reflection-type electro-optical device. 11. The color image generating apparatus according to claim 10, wherein said electro-optical device is a liquid crystal device. 12. The electro-optical device includes an electro-optical device substrate in which pixel electrodes are formed at pixels corresponding to matrix intersections of scanning electrodes and signal electrodes, and the electro-optical device substrate includes the pixel. In each case, a pixel driving operation for reading out the pixel data of the preceding color image temporarily stored and driving the pixels, and a temporary storing operation for the delayed color image digital signal of the same pixel output to the signal electrode after the preceding color image digital signal And a pixel circuit that executes while simultaneously and sequentially shifting the storage signal, the corresponding preceding color image digital signal is read out in synchronization with the divided color light generation period, and The color image data to be driven, corresponding to the divided color light generation period, wherein the delayed color image digital signal is the divided color light generation signal positioned next to the divided color light generation period. Color image generation apparatus according to claim 10 or claim 11 characterized in that it is a color digital image signals corresponding to the period. 13. The pixel circuit includes at least first and second sample-and-hold means for sampling and holding a signal on the signal electrode in a time-sequential manner, and a first sample-and-hold means held by the first sample-and-hold means. And a second temporary holding signal held by the second sample and hold means in a time sequential manner, and performing pixel driving on the pixel electrode in accordance with the read signal. 2. The method according to claim 1, further comprising:
3. The color image generation device according to 2. 14. The first sample and hold means,
A first signal holding unit, a first signal writing unit that opens and closes with a first write timing signal and samples a signal on the signal electrode into the first signal holding unit; The sample and hold means comprises: a second signal holding means; and a second signal writing means for opening and closing by a second writing timing signal and sampling a signal on the signal electrode to the second signal holding means. 14. The color image generation device according to claim 13, comprising: 15. The first writing means is a first transistor having one terminal electrically connected to the signal electrode and the other terminal electrically connected to the first signal holding means. The second signal writing means is a second transistor having one terminal electrically connected to the signal electrode and the other terminal electrically connected to the second signal holding means. 15. The color image generation device according to 14. 16. The electro-optical device includes an electro-optical device substrate in which pixel electrodes are formed at pixels corresponding to matrix intersections of scanning electrodes and signal electrodes, and the electro-optical device substrate includes the pixel. In each case, a static drive operation of the pixel electrode based on the preceding color image digital signal temporarily stored and held, and a temporary storage operation for the delayed color image digital signal of the same pixel arriving at the signal electrode after a predetermined time from the preceding color image digital signal Digital memory means for executing while sequentially and concurrently shifting, the corresponding preceding color image digital signal corresponds to the divided color light generation period read out in synchronization with the divided color light generation period. The delayed color image digital signal is a signal corresponding to the gradation weighting, and the delayed color image digital signal is a signal positioned next to the divided color light generation period. Color image generation apparatus according to claim 11, characterized in that a signal corresponding to the weighting of the tone corresponding to the frame period. 17. The electro-optical device includes an electro-optical device substrate in which pixel electrodes are formed at pixels corresponding to matrix intersections of scanning electrodes and signal electrodes, wherein the electro-optical device substrate is provided for each of the pixels. Digital storage means for temporarily storing digital data arriving at the signal electrode while sequentially shifting the digital data to a plurality of cascade-connected storage cells and statically driving the pixel electrode based on the storage output of the last-stage storage cell is provided. The storage output of the storage cell in the last stage is a color image digital signal read out in synchronization with the divided color light generation period, respectively, wherein the storage output of the storage cell in the final stage is a color image digital signal. Color image generation device. 18. The digital storage device, comprising: first latch means for fetching and temporarily storing the color image digital signal arriving at the signal electrode; and wherein the first latch means is one more than the color image digital signal. A second latch means for reading the preceding color image digital signal stored immediately before before the data fetch operation of the first latch means, temporarily storing the digital signal, and statically driving the pixel electrode based on the stored output; 18. The color image generation device according to claim 17, comprising at least: 19. The first latch means comprises: first data selection means for taking in the color image digital signal; and first flip-flop for temporarily storing the color image digital signal taken in by the first data selection means. A second data selection unit that captures output data of the first flip-flop, and temporarily stores the color image digital signal captured by the second data selection unit. 19. The color image generating apparatus according to claim 18, further comprising: a second flip-flop having a storage output electrically connected to said pixel electrode. 20. The first data selection means is a first MOS transistor for data transfer which is turned on in synchronization with a first timing pulse, and wherein the first flip-flop is provided with the first timing. A first synchronous flip-flop that performs a storage operation in synchronization with a pulse, wherein the second data selection unit conducts in synchronization with a second timing pulse generated before the second timing pulse. 20. The data transfer MOS transistor of claim 2, wherein the second flip-flop is a second synchronous flip-flop that performs a storage operation in synchronization with the second timing pulse. Color image generator. 21. The first data selection means, comprising: a first data selector which performs a logical operation in synchronization with the first timing pulse;
An input-type gate element, wherein the first flip-flop is a first synchronous flip-flop that performs a storage operation in synchronization with the first timing pulse; The second flip-flop is a second synchronous flip-flop that performs a storage operation in synchronization with the second timing pulse. 20. The color image generating apparatus according to claim 19, wherein: 22. A color image generating apparatus which generates a plurality of color lights in time sequence and irradiates them to an image generation unit, and the image generation unit generates images for each color light in time sequence corresponding to the plurality of color lights. The driving method, wherein the generation period of each color light in one scanning period is divided into a plurality of divided color light generation periods, and generates color light for each divided color light generation period. In the weighting period of the gradation of the pulse width modulation method defined for each color light in the period,
A color having a gradation of each color light generated by selectively driving pixels based on image information, wherein the plurality of divided color light generation periods correspond to the gradation weighting periods. A method for driving an image generation device. 23. The method according to claim 22, wherein the divided color light generation periods of the same color light are equal to each other. 24. The driving method according to claim 22, wherein the divided color light generation periods of the respective color lights of the same color have different lengths from each other. 25. The color light generation unit according to claim 22, wherein the color light generation unit includes a rotating color filter that separates light emitted from the light source in time sequence to generate each of the plurality of color lights. 25. The driving method of the color image generating device according to any one of 24. 26. The apparatus according to claim 22, wherein the color light generation unit includes a light source that generates a plurality of color lights, and the light sources are switched on and off in time sequence. A method for driving a color image generation device. 27. The apparatus according to claim 22, wherein said image generating section is a reflection-type electro-optical device.
7. The driving method of the color image generation device according to any one of 6. 28. An electronic apparatus comprising the color image generation device according to claim 1. Description: