JP2000165338A - Ofdm receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an OFDM demodulator where establishment of accurate symbol synchronization is attained regardless of presence of a multipath so as to enhance the reception performance. SOLUTION: A delay circuit 109 and a subtractor circuit 110 are provided between am amplitude detection circuit 108 and a maximum value timing detection circuit 111. Then the subtractor circuit 110 obtains a difference between a correlation amplitude output outputted from the amplitude detection circuit 108 and an output resulting from delaying the correlation amplitude output delayed by a guard period at the delay circuit 109, and a peak value of an output waveform of the subtractor circuit 110 is detected to detect a symbol synchronization timing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an orthogonal frequency division multiplex (OFDM).
ex) OF for receiving and demodulating a signal modulated by a modulation method
It relates to a DM receiver.

[0002]

2. Description of the Related Art In recent years, digital modulation systems have been actively developed for transmitting high quality signals such as audio and video. In particular, in terrestrial digital broadcasting, an OFDM modulation scheme that has various advantages such as high frequency use efficiency has attracted attention.

In the OFDM system, a guard period is added to each symbol before an effective symbol period in order to prevent intersymbol interference due to multipath interference. The signal included in the guard period is a signal obtained by cyclically copying (copying) the signal at the rear end of the effective symbol for the guard period as shown in FIG.

[0004] In the OFDM receiver, symbol synchronization detection is performed by using the correlation of the guard period to obtain a fast Fourier transform (FFT) window timing and a timing signal of a demodulation circuit. That is, when a correlation between the received signal and a signal obtained by delaying the received signal by the effective symbol period is obtained, the maximum amplitude appears at the reception timing of the guard period. Then, the symbol synchronization timing is detected based on the timing of the maximum amplitude.

[0005] However, such a conventional apparatus has a disadvantage that the accuracy of synchronization detection is degraded when a multipath exists. That is, when there is a multipath, a delay wave due to the multipath is superimposed on the received signal, and the output waveform becomes trapezoidal due to the correlation component of the delay wave, so that accurate peak detection cannot be performed.

This means that when a multipath exists, a phase error of symbol synchronization occurs, which has a serious adverse effect on reception performance such as causing intersymbol interference. In particular, in an area such as terrestrial broadcasting and mobile communication, it is rather natural to have an environment in which multipath exists. Therefore, it is necessary to immediately take some measures.

[0007]

As described above, in the conventional OFDM receiver, when multipath exists,
There was a problem that accurate symbol synchronization could not be established and the reception performance deteriorated.

[0008] The present invention has been made in view of the above circumstances,
An object of the present invention is to provide an OFDM demodulator capable of establishing accurate symbol synchronization regardless of the presence or absence of multipath, thereby improving reception performance.

[0009]

In order to achieve the above object, an OFDM receiver according to the present invention receives an OFDM (Orthogonal Frequency Division Multiplexing) signal to which a guard period is added for each symbol, and receives the received OFDM signal. In an OFDM receiver for detecting a symbol synchronization timing based on the position of the guard period included in the OFDM receiver, a correlation detecting means,
It has subtraction means and synchronization detection means. And
Correlation detection means finds a correlation between the received OFDM signal and a signal corresponding to a signal in a guard period included in the received OFDM signal, and subtraction means calculates the correlation output obtained by the correlation detection means and this correlation output. The difference between the delayed correlation output and the delayed correlation output is obtained, and the symbol detection timing is detected by the synchronization detection means based on the subtraction output obtained by the subtraction means.

Therefore, even if the correlation output waveform includes the correlation component of the delay wave due to multipath, the correlation component is canceled by the delay calculation process, and the correlation component of the desired wave is obtained. Therefore, by detecting the symbol synchronization timing based on the correlation output waveform after the delay calculation processing, accurate symbol synchronization can always be established regardless of the presence or absence of multipath. Can be improved.

[0011]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a schematic diagram of an O-type sensor according to the present invention.
It is a block diagram showing one embodiment of an FDM receiving device.
In the figure, OFD received by an antenna (not shown)
The M-modulated signal is tuned by a tuner 101, converted into an intermediate frequency (IF) signal, and then converted into a digital signal by an analog / digital conversion circuit (A / D) 102. The output of the A / D conversion circuit 102 is the quadrature detection circuit 1
At 03, they are converted into baseband in-phase components (I signals) and quadrature components (Q signals). These signals are converted to frequency axis data by performing an FFT operation in a fast Fourier transform (FFT) circuit 104, and then subjected to demodulation signal processing in a demodulation circuit 105 and output as demodulated data.

On the other hand, the output of the quadrature detection circuit 103 is input to a correlation detection circuit 107, which detects a correlation value with a signal delayed by the length of an effective symbol period by a delay circuit 106. .

FIG. 2 shows an example of the configuration of the correlation detection circuit 107. The correlation detection circuit 107 includes a complex conjugate circuit 201
, A complex multiplying circuit 202, and a guard period width moving average circuit 203. The complex conjugate of the output of the delay circuit 106 (the delayed output of the quadrature detection circuit 103) is obtained by the complex conjugate circuit 201. The output of the complex conjugate circuit 201 is provided to a complex multiplication circuit 202, and the output of the complex conjugate circuit 201 and the output of the quadrature detection circuit 103 are subjected to complex multiplication. Then, the result of the multiplication is given to the guard period width moving average circuit 203, and is subjected to moving average to output a correlation value.

The correlation output obtained by the correlation detection circuit 107 is converted into an amplitude value by the amplitude detection circuit 108. The output (amplitude value) of the amplitude detection circuit 108 is subtracted by a subtraction circuit 110 together with a signal delayed by the delay circuit 109 itself.
And the difference between the two is output. Here, the delay time in the delay circuit 109 may be the assumed maximum delay time of the multipath, and for example, a delay time corresponding to the length of the guard period is set.

The output of the subtraction circuit 110 is the maximum value detection circuit 1
11 to detect the output timing of the maximum amplitude value. Based on this, the symbol synchronization timing is detected by the synchronization detection circuit 112. Then, in the timing generation circuit 113, the FF synchronized with the symbol synchronization is output.
An FFT window timing of the T operation and a timing signal necessary for the demodulation circuit are generated and supplied to the FFT circuit 104 and the demodulation circuit 105, respectively.

The operation of the above configuration will be described with reference to FIG. The OFDM baseband signal (FIG. 3A) output from the quadrature detection circuit 103
The signal is input to the correlation detection circuit 107 together with the signal (FIG. 3B) delayed by the effective symbol period in 6, and the correlation value is obtained. Here, the correlation amplitude value when there is no multipath is a triangular waveform that forms a peak at the head position of the symbol as shown in FIG.

On the other hand, when there are multipaths, the correlation components of the delayed waves overlap, so that the correlation amplitude output waveform has a trapezoidal waveform as shown in FIG. Therefore, when trying to obtain symbol synchronization timing from this trapezoidal waveform, the timing of the peak value varies by the delay time of the delay wave corresponding to the upper side of the trapezoid, and as a result, the accuracy of symbol synchronization decreases.

However, in the device of the present embodiment, the subtraction circuit 110 uses the output of the amplitude detection circuit 108 shown in FIG. 3D to delay the signal itself by the delay circuit 109 (FIG. 3E). Is subtracted. This subtraction output waveform has a multipath component canceled as shown in FIG. Then, the peak of the subtraction output waveform is detected by the maximum value timing detection circuit 111, and the symbol detection timing is detected by the synchronization detection circuit 112 based on the detection timing. Therefore, by detecting the peak of the subtraction output waveform, it is possible to accurately detect the symbol synchronization timing even when a multipath exists. That is, the timing of the maximum value (peak value) can be used as the head of the symbol regardless of the presence or absence of multipath.

As described above, in the present embodiment, the delay circuit 109 and the subtraction circuit 110 are provided between the amplitude detection circuit 108 and the maximum value timing detection circuit 111. The difference between the correlation amplitude output output from the amplitude detection circuit 108 and the output obtained by delaying the output by the guard period by the delay circuit 109 is obtained by the subtraction circuit 110, and the peak value of the output waveform of the subtraction circuit 110 is detected. By doing so, the symbol synchronization timing is detected.

Accordingly, it is possible to obtain a signal waveform that matches the delimiter position of the symbol period regardless of the presence or absence of the multipath, and it is possible to detect an accurate symbol synchronization timing based on the signal waveform. Therefore, it is possible to improve reception performance.

The present invention is not limited to the above embodiment. For example, in the above embodiment, FIG.
The maximum value of the subtraction output waveform shown in (f) is detected. However, the present invention is not limited to this. For example, as shown in FIG. The peak value may be detected by correcting the peak value. Even in this way, it is possible to establish the symbol synchronization timing.

In the subtraction circuit 110, the waveform of FIG. 3E is subtracted from the waveform of FIG. 3D. Conversely, the waveform of FIG. 3E is subtracted from the waveform of FIG. May be subtracted. In this case, the subtraction circuit 110 outputs FIG.
A waveform obtained by inverting the waveform of (f) is output.
Therefore, in such a configuration, the same effect as described above can be obtained by monitoring the minimum value of the waveform.

Further, the delay time in the delay circuit 109 does not necessarily need to be set to the guard period length, but may be arbitrarily set within a range longer than 0 and equal to or shorter than the guard period length.

Further, the delay time of the delay circuit 109 may be variably set without being fixed. That is, the guard period length may be set to a different value in a system, a channel, or a time series. For example, in the current system using the OFDM method, when the effective symbol length is 2048 samples, the guard period length can be set to four lengths of 64, 128, 256 and 512 samples. In such a case, for example, information indicating a guard period length superimposed on a transmission signal is detected, and a delay circuit (programmable: for example, using a semiconductor memory or the like) is delayed according to the system in accordance with the information. Just set the time.

In addition, various modifications can be made without departing from the spirit of the present invention.

[0026]

As described above, according to the present invention, accurate symbol synchronization can always be established irrespective of the presence or absence of multipath, thereby improving the reception performance.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an OFDM receiving apparatus according to the present invention.

FIG. 2 is a block diagram illustrating an example of a configuration of a correlation detection circuit 107.

FIG. 3 is a schematic diagram showing waveforms of respective units in the configuration of the OFDM receiver according to the embodiment of the present invention;

FIG. 4 is a diagram for explaining another example of how to detect the symbol synchronization timing.

FIG. 5 is a view for explaining how to set a signal in a guard period portion in an OFDM signal.

[Explanation of symbols]

101: tuner, 102: A / D conversion circuit, 103:
Quadrature detection circuit, 104: Fast Fourier transform (FFT) circuit, 105: Demodulation circuit, 106: Delay circuit, 107: Correlation detection circuit, 108: Amplitude detection circuit, 109: Delay circuit, 110: Subtraction circuit, 111: Maximum value Timing detection circuit, 112 synchronization detection circuit, 113 timing generation circuit, 201 complex conjugate circuit, 202 complex multiplication circuit,
203: guard period width moving average circuit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Makoto Sato 3-3-9, Shimbashi, Minato-ku, Tokyo Inside Toshiba AV EE Co., Ltd. (72) Inventor Noboru 3-3-1 Shimbashi, Minato-ku, Tokyo No. 9 Toshiba Abu E Co., Ltd. (72) Inventor Takashi Seki 8 Shinsugita-cho, Isogo-ku, Yokohama-shi, Kanagawa Prefecture F-term in Toshiba Multimedia Technology Research Laboratories 5K022 DD01 DD19 DD33 DD42 5K047 AA03 AA11 CC01 CC08 HH15 HH58 MM36 MM62

Claims (5)

[Claims] 1. An OFDM receiver which receives an OFDM (Orthogonal Frequency Division Multiplexing) signal to which a guard period is added for each symbol and detects a symbol synchronization timing based on the position of the guard period included in the received OFDM signal. In the apparatus, a correlation detecting means for calculating a correlation between the received OFDM signal and a signal corresponding to a signal in a guard period included in the received OFDM signal; a correlation output obtained by the correlation detecting means; An OFDM receiver comprising: subtraction means for obtaining a difference from a delayed delayed correlation output; and synchronization detection means for detecting symbol synchronization timing based on the subtraction output obtained by the subtraction means. 2. The method according to claim 1, wherein said subtracting means obtains a difference between a correlation output obtained by the correlation detecting means and a delayed correlation output obtained by delaying the correlation output by the guard period length. The OFDM receiver according to any one of the preceding claims. 3. The subtraction means calculates a difference between a correlation output obtained by the correlation detection means and a delayed correlation output obtained by delaying the correlation output by a maximum delay time of a multipath assumed in a transmission path. 2. The method according to claim 1, wherein
FDM receiver. 4. The OFDM receiver according to claim 1, wherein said synchronization detecting means detects a peak value of the subtraction output, and obtains a symbol synchronization timing based on the detection timing. 5. The synchronization detecting means compares a level of the subtraction output with a predetermined threshold value, detects a timing exceeding the threshold value, and offset-corrects the detection timing to obtain a symbol synchronization timing. The OFDM receiver according to claim 1, wherein: