JP2000151640A - Atm system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the scale of hardware by eliminating the need for a connection setting table for an alarm indication signal. SOLUTION: An address generating counter 202 conducts countup or countdown based on a period given from a timer 201 to generate sequentially virtual paths. An alarm indication signal AIS cell generating circuit 203 uses the virtual paths received from the address generating counter 202 to sequentially generate AIS cells. An AIS cell insertion circuit 204 transmits sequentially the AIS cells to a path distribution section for a user cell. An alarm generating section 102 generates alarm indication cells for all addresses and transmits them and invalid cells are discarded to a path distribution section for the user cell. Thus it is not required to provide the connection setting table to the alarm generating section 102.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an alarm display signal (A
ATM with IS (Alarm Indication Signal) generation function
(Asynchronous Transfer Mode) device.

[0002]

2. Description of the Related Art Generally, an ATM device is provided with an AIS generation function. By providing the AIS generation function, when a failure occurs in the physical layer, it is possible to generate a VP-AIS which is a virtual path (VP) for transmitting this failure state to a lower-level device. When a failure occurs in a virtual path, a virtual channel (VC) for transmitting the failure state to a lower-level device is provided.
Is generated.

FIGS. 3A and 3B show a conventional ATM.
It is a conceptual diagram for explaining operation of an apparatus.

As shown in FIGS. 3A and 3B,
In the ATM device 300, a cell received from an upstream device is transmitted to a downstream device.

Here, as shown in FIG. 3A, when the ATM device 300 detects that a failure has occurred in the physical layer 310, a VP-AIS is generated at the VP level 321 of the ATM layer 320. And transmitted to downstream devices.

As shown in FIG. 3B, when the ATM device 300 detects that a failure has occurred at the VP level 321, the VC level 322 of the ATM layer 320.
Generates a VC-AIS and sends it to the downstream device.

VP generated by the ATM device 300
-AIS is transmitted only to the VPs of other ATM devices whose connection is valid at the time of detecting a failure. For this reason, conventionally, a table indicating the connection state of the VP-AIS is provided in the alarm generation unit in the ATM device 300. Then, the alarm generator sequentially determines valid transmission destinations of the connection, and generates and transmits a VP-AIS for each of the transmission destinations.

Similarly, the VC-AIS is also transmitted only to one of the VCs of the other ATM devices, the connection of which is set when a failure is detected. Again,
Each ATM device also had a table indicating the destination of the VC-AIS.

[0009]

As described above, FIG.
In the device shown in the above, for VP-AIS and VC-AIS
Connection setting tables are required. In this table, for each configurable destination, V
8 or 12 bits for P-AIS, VC-AI
In the case of S, a 16-bit storage area is required.

For this reason, in the conventional ATM device, the AIS
Attempting to provide a generating function has a disadvantage that a large-scale memory is required and the scale of hardware is increased.

[0011]

An ATM device according to the present invention includes a timer for generating a signal generation period and an address for sequentially generating address signals by counting up or down at a period given by the timer. A generation unit that generates an alarm display cell using an address signal input from the address generation counter, and a cell insertion unit that sends the alarm display cell to a function unit for transmitting another type of cell. An alarm generating means is provided.

In the device having such a configuration, when a failure occurs, a timer and an address generation counter are used.
An address signal for all addresses is generated, and the cell generation unit generates an alarm display cell using these address signals. Then, the cell insertion unit sends the alarm display cell to a function unit for transmitting another type of cell.

As a result, the alarm display cell with an invalid connection is discarded by the function unit for transmitting another type of cell, so that there is no need to provide a connection setting table for the alarm display cell. Therefore,
Hardware size can be reduced.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. In the drawings, the size, shape, and arrangement of each component are only schematically shown to an extent that the present invention can be understood, and numerical conditions described below are merely examples. Please understand that.

FIG. 1 is a block diagram schematically showing an overall configuration of an ATM device according to this embodiment.

Referring to FIG. 1, an interface 101 includes:
Data A is received from outside.

The alarm generator 102 monitors the input of the data A as described later. When the failure signal B is input, an alarm display cell (VP-AIS cell or VC
-AIS cell) and insert it into the band without user cells.

The route distribution unit 103 is a functional unit for transmitting a user cell. The route distribution unit 103 inputs a user cell from the outside via the alarm generation unit 102. The connection setting table 10 determines whether the connection between the input user cell and the destination is valid or invalid.
4 and discard the cell if invalid. On the other hand, if the connection is valid, the header of the user cell is rewritten according to the destination. In this embodiment, an alarm display cell is also input to the route distribution unit 103. Therefore, the route distribution unit 103 determines whether the connection is valid / invalid using the connection setting table 104 also for the alarm display cell, discards the cell when invalid, and discards the header of the cell when valid. Will be rewritten.

The interface 105 includes the route distribution unit 10
The user cell and the alarm display cell whose headers have been rewritten in step 3 are transmitted to the outside.

FIG. 2 is a block diagram schematically showing the internal configuration of the alarm generator 102. As shown in FIG.

In FIG. 1, a timer 201 generates an AIS generation cycle.

The address generation counter 202 provides a VPI (Virtual Path Identifier) or VC as an address signal based on the cycle given by the timer 201.
Generate I (Virtual Chanel Identifier).

The AIS cell generation circuit 203 generates an alarm display cell using the address signal when the failure signal B is input from the lower layer.

The AIS cell insertion circuit 204 monitors the input of data A. Then, the alarm display cell received from the AIS cell generation circuit 203 is inserted into a band having no user cell, and sent to the route distribution unit 103.

Next, the operation of the ATM device according to this embodiment will be described by taking a case where a failure occurs in the physical layer as an example.

When a failure occurs in the physical layer, a failure signal B is transmitted from the failure location to the AIS cell generation circuit 203. Upon receiving the failure signal B, the AIS cell generation circuit 203 sends an instruction for generating a VPI to the address generation counter 202.

When receiving this command, the address generation counter 202 starts counting up (or counting down) based on the cycle given by the timer 201,
A VPI having each count value as an address is sequentially generated.
These VPIs are sequentially sent to the AIS cell generation circuit 203. Here, the address generation counter 202
As a result, VPIs of addresses 0 to 4095 are respectively generated and transmitted to the AIS cell generation circuit 203.

The AIS cell generation circuit 203 uses each VPI received from the address generation counter 202 to generate a VP
-Generate AIS cells sequentially.

Then, as described above, the AIS cell insertion circuit 204 inserts the VP-AIS cell into the band where there is no user cell, and transmits it to the route distribution unit 103.

The route distribution unit 103 determines the transmission destination of each cell using the connection setting table 104, rewrites the header of each cell according to the transmission destination, and sends the rewritten data to the interface 105. Here, the route distribution unit 103 determines that a cell for which a connection is not set is an invalid cell and discards it. Therefore, from the interface 105, the VP-AIS for which the connection is valid
Only cells are sent to the destination. For example, VPIs corresponding to valid connections are addresses 10, 20, and 30.
Assuming that only addresses are present, only VP-AIS cells storing the VPIs of these addresses are transmitted from the interface 105, and other VP-AIS cells (that is, 0 to 9) are stored.
Address, 11-19, 21-29 and 31-4
The cell in which the VPI at address 095 is inserted is all discarded.

Thereafter, the VP-AI for which the connection is valid
The S cell is transmitted from the interface 105 to a downstream device.

When a failure occurs at the VP level of the ATM layer, the route distribution unit 1 operates similarly to the case of the physical layer.
VC-A determined that the connection is valid in 03
Only IS cells are transmitted.

As described above, in this embodiment, when a failure occurs, the alarm generation unit 102 generates alarm display cells for all addresses and transmits them to the route distribution unit 103 which is a functional unit for user cells. It was decided to. As a result, the alarm display cells that do not need to be transmitted are discarded by the route distribution unit 103, so that the alarm generation unit 102 does not need to determine whether the connection is valid or invalid. Therefore, in this embodiment, there is no need to provide a connection setting table, so that the scale of hardware can be reduced as compared with the related art.

In this embodiment, the connection setting table 104 of the user cell route distribution unit 103 is used. However, it goes without saying that the connection setting table of another functional unit may be used. is there.

[0035]

As described above in detail, according to the ATM device of the present invention, it is possible to eliminate the need for the connection setting table for the alarm display signal, thereby reducing the size of the hardware. Can be.

[Brief description of the drawings]

FIG. 1 is a block diagram schematically showing an overall configuration of an ATM device according to an embodiment.

FIG. 2 is a block diagram schematically showing an internal configuration of an alarm generation unit shown in FIG.

FIGS. 3A and 3B are conceptual diagrams for explaining the operation of a conventional ATM device.

[Explanation of symbols]

 101, 105 Interface 102 Alarm Generation Unit 103 Route Distribution Unit 104 Connection Setting Table 201 Timer 202 Address Generation Counter 203 AIS Cell Generation Circuit 204 AIS Cell Insertion Circuit

Claims (3)

[Claims] 1. A timer for generating a signal generation period, an address generation counter for sequentially generating address signals by counting up or down at a period given by the timer, and an input from the address generation counter. A cell generation unit that generates an alarm display cell using the address signal; and a cell insertion unit that sends the alarm display cell to a function unit for transmitting another type of cell. ATM characterized by the following:
apparatus. 2. The ATM device according to claim 1, wherein the address signal is a virtual path identifier or a virtual channel identifier. 3. The ATM device according to claim 1, wherein the function unit is a route distribution unit for a user cell.