JP2000089198A - Compensation method for liquid crystal applying voltage of liquid crystal display device, liquid crystal display device and voltage detecting method of electronic device and liquid crystal layer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To conduct a highly precise temperature compensation in a liquid crystal display device. SOLUTION: A current detecting circuit 141 detects a current i in the selection interval of a dummy scanning line. An integrating circuit is operated in accordance with control pulses P1 to P3, integrates the current i in the selection interval and computes a moving charge quantity Q. A comparison circuit 143 compares the quantity Q with a reference charge quantity Qref and generates an error signal S. A control signal generating circuit 144, based on the error signal S, generates a control signal CTL so that the quantities Qref and Q are made equal and supplies the signal CTL to a power supply circuit. The power supply circuit adjusts the value of a selection voltage based on the signal CTL and supplies the adjusted voltage a scanning signal driving circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device capable of compensating, for example, a temperature characteristic of a liquid crystal with high accuracy.
In particular, the present invention relates to a temperature compensation method for an active matrix driving type liquid crystal display device that drives a liquid crystal pixel using a two-terminal nonlinear element, a liquid crystal display device, an electronic device using the liquid crystal display device, and a voltage detection method for a liquid crystal layer. .

[0002]

2. Description of the Related Art In general, an active matrix type liquid crystal display device mainly comprises an element array substrate in which switching elements are provided in each of pixel electrodes arranged in a matrix, and an opposing array in which color filters and the like are formed. Board and
And a liquid crystal filled between the two substrates. Then, a liquid crystal layer is constituted by the pixel electrode, the opposing substrate, and the liquid crystal filled therebetween.

In such a configuration, when an ON (selected) signal is applied to the switching element, the switching element is turned on. For this reason, predetermined charges are accumulated in the liquid crystal layer connected to the switching element. Then, even if the switching element is turned off by applying an off (non-selection state) signal after the charge accumulation, if the resistance of the liquid crystal layer is sufficiently high, the accumulation of the charge in the liquid crystal layer is maintained. As described above, when each switching element is driven to control the amount of charge to be stored, the alignment state of the liquid crystal changes for each pixel, and it is possible to display predetermined information. At this time, since it is sufficient to accumulate charges in each liquid crystal layer during a part of the period, by selecting each scanning line in a time-division manner, the multiplexing in which the scanning line and the data line are shared by a plurality of pixels is performed. Driving is possible.

[0004] As the switching element, mainly
A three-terminal TFT element such as a thin film transistor (TFT) and a thin film diode (TFD:
It is roughly divided into two-terminal nonlinear elements such as ThinFilm Diodes. The latter two-terminal nonlinear elements do not have short-circuit defects between wirings in principle because there are no intersections between wirings. Further, it is advantageous in that the film formation step and the photolithography step can be shortened.

Incidentally, the temperature coefficient of an active liquid crystal panel using a TFD element is approximately 120 in terms of a driving voltage.
It is usually mV / degree. For this reason, in a conventional liquid crystal display device, the temperature is detected using a temperature-sensitive element such as a diode or a thermistor, and the driving voltage is adjusted according to the detected temperature, so that the maximum contrast can be obtained even when the ambient temperature changes. Was taking.

[0006]

However, in the conventional liquid crystal display device, the components of the temperature detecting circuit, such as a temperature sensing element, vary widely, and the temperature cannot be accurately detected. On the other hand, there is a problem that the cost of the liquid crystal display device is increased when components are selected in order to eliminate variations. Further, since the temperature sensing element is disposed on the internal substrate of the liquid crystal display device, there is a temperature difference between the liquid crystal panel and the temperature sensing element. For this reason, even if a high-precision temperature detection circuit is used, there is a problem that the temperature of the liquid crystal panel cannot be accurately detected. In particular, there is a problem that the temperature difference between the liquid crystal panel and the temperature sensing element is large during the period from when the power of the liquid crystal display device is turned on until the temperature of the entire device reaches an equilibrium state.

[0007] The present invention has been made in view of such circumstances, and it is an object of the present invention to compensate for temperature characteristics of a liquid crystal panel by directly detecting a current flowing through the liquid crystal panel. It is an object of the present invention to provide a temperature compensation method for a liquid crystal display device, a liquid crystal display device, and an electronic device using the liquid crystal display device.

[0008]

In order to achieve the above object, a temperature compensation method for a liquid crystal display device according to the present invention is realized by controlling an effective voltage applied to a liquid crystal layer by controlling a plurality of scanning signals and a plurality of data signals. In a method for compensating a liquid crystal applied voltage of a liquid crystal display device having a liquid crystal display panel for performing the display of the above, a detection method for detecting a current flowing through the one scanning line during a selection period of one scanning line constituting the liquid crystal display panel A step of adjusting an effective voltage applied to the liquid crystal layer based on the detected current.

According to the liquid crystal display device compensation method for a liquid crystal display device of the present invention, the current flowing in the liquid crystal display panel is directly detected. The effective voltage applied to the liquid crystal layer can be accurately adjusted based on the reflected current. Thereby, it is possible to always maintain the maximum contrast even if the electrical characteristics change.

Further, in the method of compensating for a liquid crystal applied voltage of a liquid crystal display device according to the present invention, the liquid crystal display panel includes a dummy scanning line for temperature compensation, and in the detecting step, the dummy scanning line at a predetermined temperature. And adjusting the effective voltage applied to the liquid crystal layer based on a charge amount obtained by integrating the detected current and a reference value set in advance at the predetermined temperature. It is characterized by the following.

According to the present invention, the temperature compensation is performed based on the current flowing through the dummy scanning line, thereby adjusting the effective voltage applied to the liquid crystal layer. Therefore, the temperature compensation is performed without using a temperature detection circuit. As a result, errors due to variations in elements of the temperature detection circuit are basically eliminated, and accurate temperature compensation can be performed. The dummy scanning lines are desirably provided outside the display area of the liquid crystal display panel or covered with a black matrix so as not to be displayed.

In the liquid crystal display device according to the present invention, a plurality of scanning lines and dummy scanning lines, a plurality of data lines, and a matrix corresponding to an intersection area of each of the scanning lines and dummy scanning lines and each of the data lines are provided. A liquid crystal display panel having a pixel electrode formed in a shape and a switching element, and having a liquid crystal layer connected in series to the pixel electrode, and detecting a current flowing through the dummy scanning line during a selection period of the dummy scanning line. The liquid crystal display device further includes a current detection unit, and an effective voltage adjustment unit that adjusts an effective voltage applied to the liquid crystal layer based on the current detected by the current detection unit.

Here, the effective voltage adjusting means includes an integrated value generating means for generating an integrated value of the current detected by the current detecting means, a comparing means for comparing the integrated value with a predetermined reference value, And adjusting means for adjusting an effective voltage applied to the liquid crystal layer based on a comparison result of the comparing means. In this case, the charge amount is calculated by the integral value generation means, and this is compared with the reference charge amount. Therefore, by setting a reference value according to the data signal in the selection period, accurate temperature compensation can be performed.

Further, the effective voltage adjusting means may adjust the selection voltage of the scanning signal, or
The voltage of the data signal may be adjusted.

The liquid crystal display device according to the present invention may further comprise a plurality of scanning lines and dummy scanning lines, a plurality of data lines, and a matrix corresponding to an intersection area of each of the scanning lines and dummy scanning lines and each of the data lines. A liquid crystal display panel having a pixel electrode and a switching element formed in a shape, and having a liquid crystal layer connected in series to the pixel electrode, a scanning signal driving circuit for supplying a scanning signal to the scanning line and the dummy scanning line, A data signal driving circuit that supplies a predetermined data signal to the data line during the dummy scanning line selection period; and a current detection circuit that detects a current flowing through the dummy scanning line during the dummy scanning line selection period. An integration circuit for integrating the current detected by the current detection circuit during the dummy scanning line selection period to obtain a charge amount; The comparison circuit compares the measured charge amount with a predetermined reference charge amount according to a data signal, and based on a comparison result of the comparison circuit, determines that the charge amount is equal to the reference charge amount. A voltage adjusting circuit for adjusting at least one of a scanning signal and the data signal.

Next, in the liquid crystal display device according to the present invention, the switching element is a two-terminal type non-linear element. The use of a two-terminal nonlinear element is advantageous in that short circuits between wirings do not occur in principle because there are no intersections between wirings, and that the film forming process and the photolithography process can be shortened. Such 2
The terminal type nonlinear element includes a first conductor-insulator-second
A TFD element made of a conductor is desirable.

Further, an electronic apparatus according to the present invention includes the liquid crystal display device according to the above-described invention. Examples of electronic devices to which such a liquid crystal display device is applied include a car navigation system, a portable information terminal device, and various other electronic devices.

Further, the method for detecting the voltage of the liquid crystal layer according to the present invention comprises:
A plurality of scanning lines and a dummy scanning line, a plurality of data lines, and a pixel electrode and a switching element formed in a matrix corresponding to an intersection area of each of the scanning lines and the dummy scanning line and each of the data lines. A method for detecting a voltage applied to the liquid crystal layer in a liquid crystal display panel having a liquid crystal layer connected in series to the pixel electrode, the method comprising: In a selection period, a current flowing through the one scanning line is detected, and a voltage of the liquid crystal layer is obtained based on a charge amount obtained by integrating the detected current during the selection period.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.

<1. TFD Element> First, in the liquid crystal display device according to the present embodiment, a configuration of a switching element for driving each liquid crystal pixel will be briefly described using a TFD element as an example.

FIG. 1A is a plan view showing a layout for one pixel in a liquid crystal panel substrate to which a TFD element is applied, and FIG. 1B shows the structure of the TFD element in FIG.
It is sectional drawing shown along the AA in (a).

As shown in these figures, the TFD element 20
Is based on the insulating film 31 formed on the substrate 30
The first metal film 22, the oxide film 24 serving as an insulator, and the second metal film 26 are formed in this order from the side of the insulating film 31, and the metal-insulator-metal Adopt a sandwich structure. With this structure, the TFD element 20 has diode switching characteristics in both positive and negative directions.

The first metal film 22 constituting the TFD element 20 becomes the scanning line 12 as one terminal as it is, while the second metal film 26 becomes the pixel electrode 3 as the other terminal.
4 is connected. Note that the TFD element 2 is used instead of the scanning line 12.
The first metal film 22 constituting 0 may be used as a data line as one terminal as it is.

The substrate 30 has insulating properties and transparency, and is made of, for example, glass, plastic or the like. Here, the reason why the insulating film 31 is provided is to prevent the first metal film 22 from peeling off from the base by heat treatment after the deposition of the second metal film 26, and
This is for preventing impurities from diffusing into the first metal film 22. Therefore, if this is not a problem, the insulating film 31 can be omitted.

The first metal film 22 is a conductive metal thin film and is made of, for example, tantalum alone or a tantalum alloy. Or, a tantalum simple substance or a tantalum alloy as a main component, for example, tungsten, chromium,
Elements belonging to Group 6, 7, or 8 of the periodic table such as molybdenum, rhenium, yttrium, lanthanum, and displorium may be added. In this case, as the element to be added, tungsten is preferable, and its content ratio is
For example, 0.1 to 6 atomic% is preferable. The oxide film 24 is, for example, an insulating film formed by anodizing the surface of the first metal film 22 in a chemical solution. The second metal film 26 is a conductive metal thin film and is made of, for example, chromium alone or a chromium alloy.

The pixel electrode 34 is made of ITO (Indium Tin Oxide) when used for a transmission type liquid crystal display panel.
When it is applied to a reflective liquid crystal display panel, it is made of a metal film having a high reflectance, such as aluminum or silver.

<1-1: Another Example in TFD Element> Next, another example in the TFD element will be described.

<1-1-1: Common use of second metal film and pixel electrode> TFD element 2 shown in FIGS. 1A and 1B
In the case of No. 0, the second metal film 26 and the pixel electrode 34 are formed of different metal films. However, as shown in the sectional view of FIG. 2, the second metal film and the pixel electrode are formed of the same ITO film or the like. The transparent conductive film 36 may be used. The TFD element 20 having such a configuration has an advantage that the second metal film 26 and the pixel electrode 34 can be formed by the same process. In FIG. 2, the same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

<1-1-2: Back-to-Back Structure> Next, as another example of the TFD element, a TFD element having a back-to-back structure will be described. FIG. 3A is a plan view showing a layout for one pixel in a liquid crystal panel substrate to which the TFD element is applied, and FIG. 3B shows the structure of the TFD element along line BB. It is sectional drawing.

The back-to-back structure refers to a structure in which two diodes are connected in series in opposite directions in order to make the nonlinear characteristics symmetrical in both the positive and negative directions. For this reason,
As shown in the drawing, the TFD element 40 has a structure in which a first TFD element 40a and a second TFD 40b are connected in series with opposite polarities. Specifically, the substrate 30, the insulating film 31 formed on the surface thereof, the first metal film 42, the oxide film 44 formed on the surface by anodic oxidation, and the oxide film 44 formed on the surface and separated from each other And the second metal films 46a and 46b.

The second metal film 46a in the first TFD element 40a becomes the scanning line 48 as it is, while the second metal film 46b in the second TFD element 40b is connected to the pixel electrode 45. The oxide film 44 is formed as shown in FIG.
The film thickness is set smaller than that of the oxide film 24 in the TFD element 20 shown in FIG. The specific configuration of each component such as the first metal film 42, the oxide film 44, and the second metal films 46a and 46b is the same as that of the TFD element 20 described above, and thus the description thereof is omitted. And

In addition, in addition to the above, a ZnO (zinc oxide) varistor, an MSI (Metal Semi-Insulator) driving element,
The symmetry of the non-linear characteristic can be ensured also by a ring-shaped element in which two diodes such as D (Ring Diode) are connected in parallel in opposite directions.

<2. Liquid crystal display> Next, the above-mentioned TF
The configuration and operation of the liquid crystal display device according to the embodiment of the present invention to which the D element 20 is applied will be described. FIG. 4 is a block diagram illustrating a schematic configuration of a main part of the liquid crystal display device according to the present embodiment.

As shown in FIG. 1, in the liquid crystal display panel 10, i data lines X1 to Xi and j + 1 scanning lines Y1 to Yj + 1.
Pixel region 16 is formed at each intersection with the liquid crystal display element (liquid crystal layer) 18 and the TFD.
The device 20 is configured to be connected in series. One of the scanning lines Y1 to Yj + 1 in the figure is the same as the scanning line 12 in FIG.

Here, the scanning line Yj + 1 functions as a dummy scanning line for temperature compensation, and the other scanning lines Y1 to Yj
It is formed by the same process. Therefore, the electrical characteristics of the dummy scanning line Yj + 1 are the same as those of the other scanning lines Y1 to Yj. In the selection period of the dummy scanning line Yj + 1, a predetermined data signal is supplied irrespective of the video signal as described later. That is, the dummy scanning line Yj + 1 is not used for screen display, but is used for detecting a change in the characteristic of the liquid crystal display panel 10 that changes with a change in the environmental temperature. Therefore, the dummy scanning line Yj
+1 is formed outside the display area A.

Each of the scanning lines Y1 to Yj + 1 is driven by a scanning signal driving circuit 100, and each of the data lines X1 to Xi is driven by a data signal driving circuit 110. Further, the scanning signal drive circuit 100 and the data signal drive circuit 110 are controlled by the drive control circuit 120.

In FIG. 4, the TFD element 20 is connected to the scanning line and the liquid crystal layer 18 is connected to the data line. Conversely, the TFD element 20 is connected to the data line. Alternatively, the liquid crystal layer 18 may be provided on the scanning line side.

Now, the power supply circuit 130 converts the power supply voltage Vcc to the voltages V0, V1, V4, V5 used in the liquid crystal display device.
And generates and outputs a voltage used for the drive control circuit 120. Also, the liquid crystal drive voltage adjustment circuit 1
40 supplies a control signal CTL for controlling the levels of the voltages V0 and V5 to the power supply circuit 130 to correct the temperature characteristics of the liquid crystal display.

Hereinafter, the liquid crystal display panel 10, the data signal drive circuit 110, the drive control circuit 120, the power supply circuit 130,
The details of the liquid crystal drive voltage adjustment circuit 140 will be described in order.

<3. Liquid crystal display panel> First, details of the liquid crystal display panel 10 will be described. FIG. 5 is a partially broken perspective view schematically showing one example.

As shown in FIG.
Includes an element array substrate 30 and an opposing substrate 32 disposed opposite to the element array substrate 30. The counter substrate 32 is made of, for example, a glass substrate.

In the element array substrate 30, the pixel electrodes 3
4 are arranged in a matrix. here,
The pixel electrodes 34 arranged in the same row are connected via a TFD element 20 to one of the scanning lines Y1 to Yj + 1 extending in a strip shape in the row direction.

On the other hand, in the counter substrate 32, the i data lines X1 to Xi extend in a strip shape in a column direction orthogonal to the extending direction of the scanning lines Y1 to Yj + 1, respectively. It is formed so as to intersect with the pixel electrode 34 of the substrate 30.

Now, the element array substrate 30 and the opposing substrate 32 configured as described above are separated by a sealant applied along the periphery of the substrate and spacers appropriately dispersed.
A certain gap (gap) is maintained, and for example, TN (Twisted Nematic) type liquid crystal is sealed in this closed space, whereby the liquid crystal layer 18 in FIG. 4 is formed.
The configuration is such that the pixel electrode 34 is connected in series.

In addition, the opposing substrate 32 is provided with color filters arranged in, for example, a striped mosaic shape or a triangle shape according to the use of the liquid crystal display panel 10. And a black matrix such as resin black in which carbon or titanium is dispersed in a photoresist. Here, it is desirable that the above-described dummy scanning line Yj + 1 is covered with a black matrix so that it does not appear on the screen display.

In addition, on the opposing surfaces of the element array substrate 30 and the opposing substrate 32, for example, an alignment film made of an organic thin film such as a polyimide thin film and rubbed in a predetermined direction is provided. Is provided with a polarizing plate corresponding to the orientation direction (both are not shown).

However, in the liquid crystal display panel 10,
If a polymer dispersed liquid crystal in which liquid crystal is dispersed as fine particles in a polymer is used, the above-described alignment film, polarizing plate, and the like are not required, so that the light use efficiency is increased, and thus the liquid crystal display panel 1
This is advantageous in terms of high luminance of 0, low power consumption, and the like. Further, when the liquid crystal display panel 10 is of a reflection type,
The pixel electrode 34 may be made of a metal film having a high reflectivity such as aluminum, and may be a SH (super homeotropic) type liquid crystal in which liquid crystal molecules are almost vertically aligned in a state where no voltage is applied.

<4. Scanning Signal Driving Circuit> Next, a scanning signal driving circuit 10 for supplying a scanning signal to the liquid crystal display panel 10
0 will be described in detail.

As shown in FIG. 6, the scanning signal driving circuit 10
0 mainly includes a clock control circuit 101, a shift register 103, a latch 104, a decoder 105, a level shifter 106, and an LCD driver 107.

The clock control circuit 1
01 generates a shift clock YSCL for data shift based on the scanning clock signal YCLK output from the drive control circuit 120 and supplies the shift clock YSCL to the shift register 103.

The shift register 103 includes scanning lines Y1 to Yj + 1.
And a shift register having a parallel output of j + 1 bits corresponding to each of the input data D0 and D1.
It has a configuration provided independently for each column. Therefore, two bits are output from the shift register 103 for each of the scanning lines Y1 to Yj + 1. Here, the input data D0 and D1 are data for selecting the voltages of the respective scanning lines Y1 to Yj + 1, and are output as serial data from the drive control circuit 120. Further, the shift clock YSCL is supplied to each shift register constituting the shift register 103,
As shown in FIG. 7, each of these shift registers captures data at the rising timing and the falling timing of the shift clock YSCL, and sequentially shifts the captured data.

Next, the latch 104 is provided with a latch for taking in data of j + 1 bits in two columns in parallel. The latch 104 outputs the parallel output data of 2 columns × j + 1 bits by the shift register 103 at the rising edge of the latch strobe signal LS. At the timing, it is configured to directly take in the latches of 2 columns × j + 1 bits. here,
The latch strobe signal LS is a signal supplied from the drive control circuit 120 and is a signal that rises at a predetermined timing after each shift register included in the shift register 103 captures data of (j + 1) bits.

Therefore, the latch 104 outputs the serial data D0 and D1 output from the drive control circuit 120 at the rising timing of the latch strobe signal LS.
Is converted into 2-bit parallel data and output for each of the scanning lines Y1 to Yj + 1.

Next, the decoder 105 decodes the 2-bit parallel data supplied from the latch 104 and converts it into a signal for selecting one of V0, V1, V4 and V5 as the voltage of the selection signal. Things. These voltages V0, V1, V4, V5 are supplied from the power supply circuit 130.

The level shifter 106 sequentially shifts the signal decoded by the decoder 105.

The LCD driver 107 has four types of voltages V0, V1, V4, V5 supplied from the power supply circuit 130 in FIG.
Is selectively connected and output for each of the scanning lines Y1 to Yj + 1 according to the signal shifted by the level shifter 107. Thereby, each of the scanning lines Y1 to Yj
One of the four types of voltages V0, V1, V4, V5 is supplied to +1 as a scanning signal. That is, a scanning signal is supplied to the dummy scanning line Yj + 1 in the same manner as the other scanning lines Y1 to Yj.

Now, the 2-bit parallel data D
If the correspondence between the combination of the values of 0 and D and the voltages V0, V1, V4, and V5 of the scanning signal is as shown in FIG. 8, first, 2-bit parallel data is converted by the decoder 105 into the voltages V0, V
1, V4, V5, and
Then, by shifting through the level shifter 106, a voltage having a magnitude relationship as shown in FIG. 9 as a scanning signal is supplied from the LCD driver 107 to each of the scanning lines Y1 to Yj + 1.
It is possible to sequentially output each time.

<5. Data Signal Driving Circuit> Next, the details of the data signal driving circuit 110 for supplying a data signal to the liquid crystal display panel 10 will be described.

As shown in FIG. 10, the data signal driving circuit 110 mainly includes a shift register 111 and a latch 11
2. It is composed of a gradation control unit 113 and an output circuit 114.

The shift register 111 sequentially shifts and outputs latch signals that are synchronous with the clock signal XCLK and that correspond to the data signal output terminals X1 to Xi.

The latch 112 is connected to each data signal output terminal X1
.. Xi. Each latch area latches n-bit parallel grayscale data GD0 to GDn supplied every n bits in the order of the data lines with a latch signal from the shift register 111, and a latch pulse signal synchronized with the horizontal synchronization signal. Output at the rising edge of LP.

Here, since the grayscale data GD0 to GDn, the clock signal XCLK and the latch pulse signal LP are supplied in association with each other by the drive control circuit 120, the respective latch areas of the latch 112 are supplied in parallel. Of the corresponding grayscale data, the grayscale data GD0 to GDn to the corresponding data lines are taken in, and the latch pulse signal LP
At the rising timing of the data line.

The gradation control unit 113 converts each gradation data corresponding to each data line into pulse width modulation data based on the RES signal and the GCP signal, and supplies the data to the output circuit 114.

The output circuit 114 converts the signal output from the gradation control unit 113 into an appropriate voltage level for driving the panel and outputs the converted signal.

Therefore, each of the data signal output terminals X1 to Xi
After that, data signals pulse width modulated in accordance with the respective gradations are output.

Here, since the gradation data from the latch 112 is performed at the rising timing of the latch pulse signal LP synchronized with the horizontal synchronizing signal, the data signal is output to the data line by the output circuit 114 every one horizontal scanning period. Will be output.

However, as described above, the dummy scanning line Yj
In the +1 selection period, predetermined gradation data GD
0 to GDn are supplied from the drive control circuit 120. In this case, the gradation values indicated by the gradation data GD0 to GDn may all be the same fixed value (for example, 50
% Gradation) or different values. In short, the average value may be a predetermined reference value. When different values are set as the gradation values, for example, from 0% gradation to 10%
It may be set so that 0% gradation is included at an equal ratio. In this case, since the response to each gradation can be averaged and detected, more accurate temperature compensation can be performed.

<6. Power supply circuit> Next, the power supply circuit 130
Are voltages V0, V1, for generating scanning signals and data signals.
V4 and V5 are generated, and the voltages V0, V1, V4 and V5 are applied to the scanning signal driving circuit 100 and the voltages V1 and V4 are applied to the data signal driving circuit 110.
Supply. Here, the levels of the voltages V0 and V5 are adjusted based on the control signal CTL from the liquid crystal drive voltage adjustment circuit 140. Incidentally, the voltage V0 is used as a selection voltage on the positive side of the scanning signal as shown in FIG. 9, while the voltage V5 is
It is used as a negative selection voltage of the scanning signal. As is well known, when a DC voltage is applied to the liquid crystal, the characteristics are deteriorated. Therefore, when performing the adjustment operation based on the control signal CTL, the power supply circuit 130 does not adjust either the voltage V0 or the voltage V5, but always makes the absolute value of the voltage V0 equal to the voltage V5. Adjustments are being made.

<7. Drive Control Circuit> Next, the drive control circuit 120 will be described in detail.

As shown in FIG. 11, the drive control circuit 120
Is mainly composed of a basic timing creation unit 121, a driver control unit 122, a data output unit 123, and an A / D conversion unit 124.

The basic timing generator 121
Generates a clock signal and a timing signal to be supplied to each circuit based on a synchronization signal such as a vertical synchronization signal or a horizontal synchronization signal separated from a composite signal or the like, and generates a driver control unit 122, a data output unit 123, an A /
The data is supplied to the D conversion unit 124 and the selection unit 125.

The A / D converter 124 converts a video signal, which is an analog signal separated from a composite signal or the like, into digital data and supplies the digital data to one input of a selector 125. The other input of the selection unit 125 has the reference data memory 1
From 26, reference data is supplied.
Here, the reference data is digital data indicating a predetermined gradation. According to the timing signal supplied from the basic timing generation unit 121, the selection unit 125 applies the reference data during the selection period of the dummy scanning line Yj + 1 and the digital data from the A / D conversion unit 124 during the other periods. Selectively output data. In the case where the display gradation of the dummy scanning line Yj + 1 is set to include the 0% gradation to 100% gradation at an equal ratio, the reference data memory 12
The data corresponding to each gradation may be stored in 6 and read out according to a clock signal. on the other hand,
When a fixed value is used for the display gradation of the dummy scanning line Yj + 1, the reference data corresponding to the fixed value may always be output from the reference data memory 126.

The data output unit 123 converts the digital data selected by the selection unit 125 into gradation data GD0 to GDn, and converts the digital data into serial data at a predetermined timing based on a clock signal from the basic timing generation unit 121. It is supplied to the data signal drive circuit 110.

The control unit 122 supplies the clock signal YCLK, the latch strobe signal LS, and the data D0 and D1 to the scanning signal driving circuit 100, and supplies the clock signal XCLK and the latch pulse signal LP to the data signal driving circuit 110. To supply. Further, the timing signal P1
To P3 are supplied to the liquid crystal drive voltage adjustment circuit 140.

Each of these signals is generated based on the clock signal and the timing signal of the basic timing generation section 121. Further, the basic timing generation section 121 generates the signals based on the synchronization signals such as the vertical synchronization signal and the horizontal synchronization signal.
Since the clock signal and the timing signal are generated, the scanning signal output from the scanning signal driving circuit 100 and the data signal output from the data signal driving circuit 110 are also synchronized with the horizontal synchronizing signal and the vertical synchronizing signal.

<8. Liquid Crystal Driving Voltage Adjustment Circuit> Next, details of the liquid crystal driving voltage adjustment circuit 140 will be described first, and then the principle of adjustment will be described, followed by the configuration and operation.

<8-1: Adjustment Principle> As is well known, in order to obtain the maximum contrast, the threshold voltage Vth
Needs to be applied to drive. Here, the threshold voltage Vth
Has a temperature characteristic of about 0.4% / degree, which is much smaller than the temperature characteristic of 120 mV / degree converted into a drive voltage, and can be ignored in practice. Therefore, if the voltage applied to the liquid crystal layer 18 can be controlled to maintain the threshold voltage Vth even when the temperature changes, the temperature characteristics of the liquid crystal display panel 10 can be compensated and the maximum contrast can always be maintained. . For this purpose, it is necessary to detect the voltage applied to the liquid crystal layer 18.

However, the liquid crystal display panel 10 includes the data lines X1 to Xi, the scanning lines Y1 to Yj + 1, the liquid crystal layer 18, and the TF.
It is composed of a D element 20 and the like, and its structure makes it impossible to directly detect the voltage applied to the liquid crystal layer 18.

Incidentally, the dielectric constant of the liquid crystal has almost no temperature characteristic, though it depends on the material. This means that the capacitance C of the liquid crystal layer 18 is constant regardless of the temperature.

Here, if the voltage of the liquid crystal layer 18 is represented by V and the charge stored therein is represented by Q, V = Q / C. Since the capacitance C is constant with temperature, if the charge Q can be detected, it is equivalent to detecting the voltage V that fluctuates with temperature.

Therefore, in the present embodiment, during the selection period of the dummy scanning line Yj + 1, the current i flowing therethrough is detected, and this is integrated to calculate the moving charge amount Q. On the other hand, since the reference charge amount Qref at which the maximum contrast can be obtained corresponding to the threshold voltage Vth of the liquid crystal is known, the moving charge amount Q is compared with the reference charge amount Qref, and the scanning signal is determined based on the comparison result. Are varied.

<8-2: Specific Configuration of Liquid Crystal Drive Voltage Adjustment Circuit 140> As shown in FIG. 12, the liquid crystal drive voltage adjustment circuit 140 includes a current detection circuit 141 for detecting a current i flowing through the dummy scanning line Yj + 1. An integrating circuit 142 for calculating the moving charge amount Q by integrating the detection current i during the selection period of the dummy scanning line Yj + 1, and comparing the moving charge amount Q with the reference charge amount Qref to generate an error signal S. The circuit 143 generates the voltages V0 and V5 generated by the power supply circuit 130 based on the error signal S.
And a control signal generation circuit 144 that generates a control signal CTL for controlling the voltage value of the control signal.

Here, the reference charge amount Qref is the dummy scanning line Y
It is predetermined so that the maximum contrast can be obtained in accordance with the pulse width of the data signal supplied in the selection period of j + 1. The error signal S is represented by a moving charge amount Q and a reference charge amount Qre.
Since it represents the difference from f, by controlling the error signal S to be "0", it is possible to obtain the maximum contrast by compensating for the fluctuation of the liquid crystal characteristics due to the temperature change.

Since the amount of moving charge Q is the amount of charge stored in the liquid crystal layer 18, it can be adjusted by changing the effective voltage applied to the liquid crystal layer 18. There are various modes for adjusting the effective voltage.In the present embodiment, as an example, the voltages V0 and V5 of the scanning signals corresponding to the respective selection periods of the scanning lines Y1 to Yj + 1 are adjusted. I have.

Hereinafter, the current detection circuit 141 and the integration circuit 14
2 and the comparison circuit 143 will be described more specifically.

<8-2-1: Current detection circuit> FIG.
FIG. 3 is a circuit diagram illustrating a configuration of a current detection circuit 141 and peripheral components thereof. In FIG. 13, the scanning signal driving circuit 120
Shows functionally only a portion related to the selection operation of the dummy scanning line Yj + 1.

As shown in the figure, a resistor R is provided between the power supply circuit 130 and the scanning signal drive circuit 120 for current detection. The resistance value of the resistor R is set to a very small value of about several ohms, and the current i is detected by measuring the voltage between both ends.
In this case, since the resistor R is provided on the line for supplying the voltage V0, the current i in the period of the voltage V0, that is, the selection period on the positive side is detected in the scanning signal shown in FIG.

Both ends of the resistor R are connected to the positive input terminals of the operational amplifiers 1411, 1412. Where the operational amplifier 141
Because the output terminal of 1,1412 is connected to the negative input terminal,
These operational amplifiers 1411 and 1412 function as voltage followers. Also, an operational amplifier 1413 and resistors 1414-1
417 constitutes a differential amplifier. Therefore, the output signal of the operational amplifier 1413 indicates the potential difference between both ends of the resistor R, that is, the current i flowing through the dummy scanning line Yj + 1.

In addition to the position shown in FIG. 13, the resistor R may be inserted between the scanning signal drive circuit 120 and the dummy scanning line Yj + 1 as shown in FIG. That is, the resistor R may be provided between the output terminal of the power supply circuit 130 for the voltage V0 and the input terminal of the dummy scanning line Yj + 1.

<8-2-2: Integrating Circuit and Comparison Circuit>
Next, the integration circuit 142 and the comparison circuit 143 will be described. In an actual circuit configuration, the integration circuit 142 and the comparison circuit 143 are integrally formed as shown in FIG.

In the figure, an operational amplifier 1421, a resistor 1422, and a capacitor 1423 correspond to the integration circuit 142. The negative input terminal of the operational amplifier 1421 is supplied with a reference voltage Vref indicating the reference charge amount Qref, and the integrated value of the current i in the operational amplifier 1421 is changed to the reference charge amount Qref.
Is to be compared to. Also, capacitor 1424
Functions as a hold capacitor, and its voltage value is output as an error signal S via an operational amplifier 1425 constituting a voltage follower. Switches 1426 to 1428 are controlled by control pulses supplied to control terminals.
The states are controlled by P1 to P3, and are turned on at a high level H and turned off at a low level L.

Now, it is assumed that the scanning signal of the dummy scanning line Yj + 1 is as shown in FIG. As described above, the current detection resistor R is provided between the output terminal of the voltage V0 of the power supply circuit 130 and the input terminal of the dummy scanning line Yj + 1.
The current i flowing through the dummy scanning line Yj + 1 is detected during the period when the scanning signal of Yj + 1 becomes the voltage V0, that is, during the selection periods T1 and T2 on the positive side.

Therefore, it is necessary for the integration circuit 142 to calculate the moving charge amount Q by integrating the current i in the selection periods T1 and T2. Therefore, the drive control circuit 120 operates as shown in FIG.
A control pulse P1 shown in FIG.
1426. The switch 1426 is turned on while the control pulse P1 is at the high level.
At T1 and T2, the current i shown in FIG.
421 to be integrated.

Incidentally, since the integration operation in this case is performed to calculate the amount of moving charge Q in the positive-side selection periods T1 and T2, the capacitor 14 is provided for each integration operation.
It is necessary to reset the electric charge stored in 23 and calculate the moving electric charge amount Q for each selection period. The switch 1427 is provided for this purpose, and the charge accumulated in the capacitor 1423 is reset immediately before the start of each of the selection periods T1 and T2 by the control pulse P2 shown in FIG.

From the rise of the control pulse P2 to the control pulse
Since the period until the fall of P1 is a period in which the charge of the capacitor 1423 is reset and the charge is accumulated by a new integration operation, the output signal of the operational amplifier 1421 fluctuates.
Therefore, it is not appropriate to use the output signal of the operational amplifier 1421 as the error signal S. Therefore, switch 1428
And a capacitor 1424. Where switch 14
As shown in FIG. 16E, the 28 control pulse P3 is at the low level L at least during the period from the rise of the control pulse P2 to the fall of the control pulse P1. Therefore, the voltage of the capacitor 1424 does not fluctuate while the control pulse P3 is at the low level L. Then, the control pulse P3 becomes low level L
Rises to a high level H, the switch 1428 is turned on, and the voltage of the capacitor 1424 is changed to the operational amplifier 1421.
Output voltage. That is, the error signal S reflects the comparison result in each of the selection periods T1 and T2 at the rise of the control pulse P3.

When the error signal S generated as described above is supplied to the control signal generation circuit 144, the control signal generation circuit 144 controls the voltage values of the voltages V0 and V5 based on the error signal S. CTL is generated, and this is
It feeds back to 0. Therefore, according to the present embodiment, the dummy scanning line Yj provided on the liquid crystal display panel 10 is provided.
The feedback control can be performed so that the moving charge amount Q flowing to +1 becomes equal to the reference charge amount Qref. As a result, even if the electrical characteristics of the liquid crystal display panel 10 change with the temperature change, the selection voltages V0 and V5 of the scanning signal can be changed so as to follow the change, so that the temperature characteristics of the liquid crystal display panel 10 are compensated. It is possible to do.

<8-3: Temperature Compensation Operation> Next, the temperature compensation operation of the liquid crystal display device will be described with reference to FIGS. In this example, it is assumed that the maximum contrast is obtained when the voltage VLC applied to the liquid crystal layer 18 is equal to the threshold voltage Vth, and the reference charge amount Qref is 50
It is assumed that the charge amount is set such that the threshold voltage Vth can be obtained when a data signal corresponding to the% gradation is given.

FIG. 17A is a timing chart showing a scanning signal supplied to the dummy scanning line Yj + 1. As shown in the figure, the scanning signal has a waveform inverted for each field, and one horizontal scanning period in which the voltage V0 or V5 of the scanning signal is a selection period of the dummy scanning line Yj + 1. In addition, the voltage V0 of each frame is V01, V02, V03 and the voltage V
Assuming that 5 is expressed as V51 and V52, the voltage V0 gradually increases as V01 <V02 <V03, and the voltage V5 gradually decreases as V51> V52.

FIG. 11B shows a data line Xn (X1 ≦ Xn ≦
6 is a timing chart showing an example of a data signal via Xi). The data signal of this example has a duty ratio of 50% during the selection period of the dummy scanning line Yj + 1. This is because the reference charge amount Qref is set corresponding to the 50% gradation, so that the data signal for the selected period is generated based on the gradation data indicating the 50% gradation.

FIG. 9C shows a voltage applied to the pixel region 16 located at the intersection of the data line Xn and the scanning line Ym + 1, that is, a voltage applied to both ends of the TFD element 20 and the liquid crystal layer 18. 5 is a timing chart showing a voltage. Here, the combined waveform of the scanning signal and the data signal is indicated by a solid line, and the voltage VLC applied to the liquid crystal layer 18 is indicated by a hatched line. The transmittance of the liquid crystal layer 18 is determined by the effective value of the voltage VLC. In this example, the absolute value of the voltage VLC gradually increases, and finally becomes equal to the threshold voltage Vth.

FIG. 10D is a timing chart showing the error signal S output from the comparison circuit 143. As shown in this figure, it can be seen that the value of the error signal S gradually approaches “0” as time passes. This is because when the current detection circuit 141 detects the current i flowing through the dummy scanning line Yj + 1 in the positive-side selection periods T1, T2, T3, the current i
Charge amount Q and reference charge amount Qref calculated based on
The values of the voltages V0 and V5 generated by the power supply circuit 130 are adjusted based on the error signal S indicating the difference between the two, and the voltages V0 and V5 output from the power supply circuit 130 change as shown in FIG. Because. In this case, the power supply circuit 130
Based on CTL, voltage V0 and voltage V5 are simultaneously adjusted so that the absolute value of voltage V0 is equal to the absolute value of voltage V5. As a result, the voltage VLC applied to the liquid crystal layer 18 gradually approaches the threshold voltage Vth, and the two coincide by the compensation operation of the third frame. As a result, the maximum contrast can be obtained in the third and subsequent frames.

As described above, according to the liquid crystal display device of the present embodiment, the amount of mobile charge Q is calculated from the current i during the selection period, noting that the dielectric constant and the threshold voltage of the liquid crystal hardly change with temperature. This is compared with the reference charge amount Qref required to obtain the maximum contrast, and the effective voltage applied to the liquid crystal layer 18 is adjusted based on the comparison result. The temperature characteristics of the liquid crystal display panel 10 can be accurately compensated for without using any.

The object to be detected is the liquid crystal display panel 10.
Since the current i itself flows through the liquid crystal display panel, it is not theoretically possible that accurate temperature compensation cannot be performed due to the temperature difference between the liquid crystal display panel 10 and the thermosensitive element, as in the case of control using the thermosensitive element.

<9. Electronic Equipment: Part 1> Next, some examples in which the above-described liquid crystal display device is used in electronic equipment will be described.

First, a video projector using the liquid crystal display device as a light valve will be described. FIG.
FIG. 8 is a plan view showing a configuration example of a video projector.

As shown in this figure, a lamp unit 1102 including a white light source such as a halogen lamp is provided inside a video projector 1100. The projection light emitted from the lamp unit 1102 is transmitted to a plurality of mirrors 1106, 1 arranged in a light guide 1104.
.., And two dichroic mirrors 110
8 are separated into three primary colors of RGB, and liquid crystal panels 1110R and 111 serving as light valves corresponding to the respective primary colors.
OB and 1110G.

The configuration of the liquid crystal panels 1110R, 1110B, and 1110G is the above-described liquid crystal display panel 10, which is driven by R, G, and B primary color signals supplied from a circuit (not shown). Now, the light modulated by these liquid crystal panels is transmitted to the dichroic prism 111.
2 is incident from three directions. In the dichroic prism 1112, the R and B lights are refracted at 90 degrees, while the G light travels straight. Therefore, as a result of combining the images of each color, a color image is projected on a screen or the like via the projection lens 1114.

Note that the liquid crystal panels 1110R, 1110B
And 1110G have a dichroic mirror 1108
Accordingly, light corresponding to each of the primary colors of R, G, and B enters, so that it is not necessary to provide a color filter on the counter substrate 32.

<10. Electronic Device: Part 2> An example in which the liquid crystal display device is applied to a personal computer will be described. FIG. 19 is a front view showing the configuration of this personal computer. In the figure, a personal computer 1200 includes a main body 1204 having a keyboard 1202 and a liquid crystal display 1206. The liquid crystal display 1206 is configured by adding a color filter and a backlight to the liquid crystal display panel 10 described above.

<11. Electronic device: Part 3> Next, an example in which a liquid crystal display panel is applied to a pager will be described. FIG. 20 is an exploded perspective view showing the structure of this pager.
As shown in the figure, the pager 1300 includes a liquid crystal display panel 10 in a metal frame 1302, a light guide 1306 including a backlight 1306a, a circuit board 1308, and first and second shield plates 1310 and 1312.
It is configured to be accommodated together. The liquid crystal display panel 10 and the circuit board 10 are electrically connected to each other by the two elastic conductors 1314 and 1316 for the opposite substrate 32 and the film tape 13 for the element array substrate 30.
18, respectively.

In addition to the electronic devices described with reference to FIGS. 17 and 18, a liquid crystal television, a viewfinder type, a monitor direct-view type video tape recorder, a car navigation device, an electronic organizer, a calculator, a word processor, Workstations, mobile phones, video phones, POS terminals,
A device including a touch panel and the like are examples of the electronic device. It goes without saying that the present invention can be applied to these various electronic devices.

<12. Modifications> The present invention is not limited to the above-described embodiment, and various modifications described below are possible.

(1) In the above-described embodiment, the dummy scanning line Yj + 1 is selected during the positive selection period on the positive side.
Although the current i flowing through Yj + 1 is detected, it may be detected during the negative selection period. In this case, FIG.
In the current detection circuit 141 shown in FIG. 3, the current detection resistor R may be provided on the voltage V5 line.

In both the positive and negative selection periods, the current i is detected, and the voltages V0, V5
May be adjusted. In this case, in the current detection circuit 141 shown in FIG. 13, in addition to the resistor R provided on the line of the voltage V0, another resistor R 'is provided on the line of the voltage V5, and each resistor R, R' The flowing current may be detected and supplied to the integrating circuit 142 and the comparing circuit 143. In this case, the control pulses P1 to P3 may be supplied for each field. When the current i is detected by using the current detection circuit 141 shown in FIG. 14, there is no need to newly provide a resistor R ', and the same resistor R
Is used to detect both currents i, so that a DC voltage is prevented from being applied to the liquid crystal layer 18 due to variations in the resistance value.

As described above, when the current i is detected during the positive and negative selection periods, the control operation per time can be doubled as compared with the case where the current i is detected during only one selection period. , The compensation operation can be completed in a shorter time.

(2) In the above embodiment, the voltages V0 and V5 in the scanning signal selection period are adjusted based on the control signal. However, the voltage applied to the liquid crystal layer 18 is Since it is determined by the potential difference between the data signal and the data signal, the voltages V1 and V4 of the data signal may be adjusted based on the control signal CTL. Also, the voltages V0, V5
And the voltages V1 and V4 may be adjusted. In short, any configuration may be used as long as the effective voltage applied to the liquid crystal layer 18 can be adjusted.

Here, when adjusting the voltages V0 and V5 and the voltages V1 and V4, the voltages V0 and V5 are adjusted in a certain frame, and the voltages V1 and V4 are adjusted in the next frame. Thus, the effective voltage applied to the liquid crystal layer 18 may be adjusted. That is, the voltages V0 and V5 and the voltages V1 and V4 may be adjusted in a time-division manner.

(3) In the above-described embodiment, the current i flowing through the dummy scanning line Yj + 1 is detected. The provision of the dummy scanning line Yj + 1 in this way is that 1) it is necessary to directly detect the amount of moving charge Q accompanying the temperature change by directly detecting the current i flowing through the liquid crystal display panel 10; 2) The main reason is that it is necessary to compare a predetermined reference charge amount Qref and a moving charge amount Q according to a data signal. The scanning lines Y1 to Yj used for normal display satisfy the condition 1), but do not satisfy the condition 2) because the pulse width of the data signal varies depending on the video signal. But some scan lines
In the selection period of Ym (1 ≦ m ≦ j), since the gradation data for driving each data line is known, an average value thereof is calculated, and the reference charge amount Qref is varied according to the average value. You may. In this case, the moving charge amount Q is calculated using the ordinary scanning lines Y1 to Yj, and the calculated moving charge amount Q is compared with the reference charge amount Qref corresponding to the average value of the gradation data. The voltage will be adjusted. Thereby, temperature compensation can be performed without using the dummy scanning line Yj + 1. That is, the present invention detects an electric current flowing in a certain scanning line constituting a liquid crystal display panel during a selection period, and applies an effective voltage applied to the liquid crystal layer based on a moving charge amount calculated from the detected electric current. Any device may be used as long as it can be adjusted.

(4) In the above-described embodiment, an example in which a quaternary voltage is used as a driving method of the liquid crystal display device has been described. However, the present invention is not limited to this. It is needless to say that the present invention can be applied to various driving methods for preventing crosstalk and display unevenness. For example,
There is a driving method in which the scanning signal is driven to be inverted in the adjacent scanning lines Yn and Yn + 1, but the above-described temperature compensation method may be applied thereto. In addition, there is a driving method in which an eight-level scanning signal is supplied in two modes such as a charging mode and a discharging mode, but the above-described temperature compensation method may be applied thereto.

(5) In the above embodiment, since the temperature characteristic of the threshold voltage Vth of the liquid crystal is as small as 0.4% / degree, this was ignored, but the voltages V0 and V5 generated by the power supply circuit 130 were ignored.
May have a temperature characteristic of 0.4% / degree.
Further, a material having almost no temperature characteristic of the threshold voltage Vth may be used as the material of the liquid crystal layer 18. In these cases, better results can be obtained.

(6) In the above embodiment, noting that the permittivity of the liquid crystal hardly changes with temperature and that the temperature characteristic of the threshold voltage Vth is very small,
The moving charge amount Q is calculated from the current i flowing through the dummy scanning line Yj + 1, and the temperature compensation is performed based on the calculated moving charge amount Q. However, the present invention is not limited to this. It can also be grasped as a method of detecting the voltage that is applied. That is, it is impossible to directly detect the voltage applied to the liquid crystal layer 18 due to the structure of the liquid crystal display panel 10. However, during the selection period of one scanning line constituting the liquid crystal display panel 10, Detect the current flowing through the wire,
The voltage of the liquid crystal layer 18 can be obtained based on the amount of charge obtained by integrating the detected current during the selection period. The voltage thus obtained may be used not only for temperature compensation but also for correcting the imbalance between the positive-side selection voltage (V0) and the negative-side selection voltage (V5).

In the liquid crystal display device according to the present embodiment, the configuration of the switching element for driving each liquid crystal pixel has been briefly described mainly by taking a TFD element as an example.
The present invention may be applied to a liquid crystal display device in which liquid crystal pixels are driven by a three-terminal TFT element such as a thin film transistor (TFT).

[0123]

As described above, according to the present invention,
Since the current flowing in the scanning line is directly detected and the effective voltage applied to the liquid crystal layer is adjusted based on the detected current, changes in the characteristics of the liquid crystal are directly reflected as the temperature of the liquid crystal display panel changes. The temperature compensation control can be performed based on the current flowing. Thus, accurate temperature compensation can be performed, so that the maximum contrast can always be maintained even when the environmental temperature changes.

[Brief description of the drawings]

FIG. 1A is a plan view illustrating a layout for one pixel of a liquid crystal panel substrate to which a TFD element is applied, and FIG. 1B is a cross-sectional view taken along line AA.

FIG. 2 is a cross-sectional view showing the structure of another TFD element.

3A is a plan view showing a layout for one pixel of a liquid crystal panel substrate to which another TFD element is applied, and FIG. 3B is a cross-sectional view taken along the line BB.

FIG. 4 is a block diagram illustrating a main configuration of a liquid crystal display device according to an embodiment of the present invention.

FIG. 5 is a partially cutaway perspective view showing the configuration of the liquid crystal display panel.

FIG. 6 is a block diagram illustrating a detailed configuration of a scanning signal driving circuit.

FIG. 7 is a timing chart showing a data fetching operation in the scanning signal driving circuit.

FIG. 8 is a diagram showing a relationship between parallel data D0 and D1 supplied to the scanning signal drive circuit and an output voltage.

FIG. 9 is a diagram showing a magnitude relationship between output voltages.

FIG. 10 is a block diagram illustrating a detailed configuration of a data signal driving circuit.

FIG. 11 is a block diagram illustrating a detailed configuration of a drive control circuit.

FIG. 12 is a block diagram illustrating a detailed configuration of a liquid crystal drive voltage control circuit.

FIG. 13 is a circuit diagram showing an example of a current detection circuit and its peripheral configuration.

FIG. 14 is a circuit diagram showing another example of the current detection circuit and its peripheral configuration.

FIG. 15 is a circuit diagram of an integrating circuit and a comparing circuit.

FIG. 16 is a timing chart showing the operation of the integration circuit and the comparison circuit.

FIG. 17 is a timing chart illustrating a driving operation of the liquid crystal display device.

FIG. 18 is a cross-sectional view illustrating a configuration of a liquid crystal projector as an example of an electronic apparatus to which the liquid crystal display panel is applied.

FIG. 19 is a front view illustrating a configuration of a personal computer as an example of an electronic apparatus to which a liquid crystal display panel is applied.

FIG. 20 is an exploded perspective view illustrating a configuration of a pager as an example of an electronic apparatus to which the liquid crystal display panel is applied.

[Explanation of symbols]

10 ... Liquid crystal display panel X1-Xi ... Data line Y1-Yj ... Scan line Yj + 1 ... Dummy scan line 16 ... Pixel area (pixel) 18 ... Liquid crystal layer 20,40 ... TFD element 22 ... first metal film (first metal) 24 ... oxide film (insulator) 26 ... second metal film (second metal) 30 ... element array substrate 32 ..Counter substrate 36, 45 ... Pixel electrode 100 ... Scan signal drive circuit 110 ... Data signal drive circuit 120 ... Drive control circuit 130 ... Power supply circuit 140 ... Liquid crystal drive voltage adjustment circuit (Effective voltage adjustment means) 141 ... Current detection circuit (Current detection means) 142 ... Integration circuit (Integration value generation means) 143 ... Comparison circuit (Comparison means) 144 ... Control signal generation circuit (Adjustment) means)

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H093 NA16 NA36 NA45 NA80 NC02 NC22 NC23 NC25 NC26 NC28 NC38 NC39 NC47 NC57 NC58 NC63 ND02 ND45 ND52 ND58 NE03 NG02 5C006 AA15 AA22 AC11 AF13 AF42 AF46 AF51 AF53 AF64 AF71 AF81 BB17 BC BC13 BF03 BF04 BF14 BF16 BF24 BF25 BF26 BF37 BF43 BF46 EC11 FA19 FA54 FA56

Claims (11)

[Claims] 1. A method for compensating a liquid crystal applied voltage of a liquid crystal display device having a liquid crystal display panel for performing a desired display by controlling an effective voltage applied to a liquid crystal layer with a plurality of scanning signals and a plurality of data signals. A detecting step of detecting a current flowing through the one scanning line during a selection period of one scanning line configuring the liquid crystal display panel; and adjusting an effective voltage applied to the liquid crystal layer based on the detected current. And adjusting the liquid crystal applied voltage of the liquid crystal display device. 2. The liquid crystal display panel has a dummy scanning line for temperature compensation, detects a current flowing through the dummy scanning line at a predetermined temperature in the detecting step, and detects the detected current in the adjusting step. 2. The liquid crystal device according to claim 1, wherein an effective voltage applied to the liquid crystal layer is adjusted based on a charge amount obtained by integrating a current and a reference value set in advance at the predetermined temperature. How to compensate the applied voltage. 3. A plurality of scanning lines and dummy scanning lines, a plurality of data lines, and pixel electrodes formed in a matrix corresponding to an intersection area between each of the scanning lines and dummy scanning lines and each of the data lines. A liquid crystal display panel having a switching element and a liquid crystal layer connected in series to the pixel electrode; current detection means for detecting a current flowing through the dummy scanning line during a selection period of the dummy scanning line; Based on the current detected by the means,
A liquid crystal display device comprising: an effective voltage adjusting means for adjusting an effective voltage applied to the liquid crystal layer. 4. An effective voltage adjusting unit includes: an integral value generating unit that generates an integral value from a current detected by the current detecting unit; and a comparing unit that compares the integral value with a predetermined reference value. 4. The liquid crystal display device according to claim 3, further comprising adjusting means for adjusting an effective voltage applied to the liquid crystal layer based on a comparison result of the comparing means. 5. The liquid crystal display device according to claim 3, wherein said effective voltage adjusting means adjusts a selection voltage of a scanning signal. 6. The liquid crystal display device according to claim 3, wherein the effective voltage adjusting means adjusts a voltage of the data signal. 7. A plurality of scanning lines and dummy scanning lines, a plurality of data lines, and pixel electrodes formed in a matrix corresponding to an intersection area between each of the scanning lines and dummy scanning lines and each of the data lines. A liquid crystal display panel having a switching element and a liquid crystal layer connected in series to the pixel electrode; a scan signal drive circuit for supplying a scan signal to each of the scan lines and the dummy scan line; and a selection period of the dummy scan line A data signal driving circuit that supplies a predetermined data signal to each of the data lines; a current detection circuit that detects a current flowing through the dummy scanning line during a period in which the dummy scanning line is selected; An integration circuit for integrating the current detected by the dummy scanning line during the selection period of the dummy scanning line to obtain a charge amount; A comparison circuit that compares the reference signal amount with a predetermined reference charge amount according to the signal, and based on a comparison result of the comparison circuit, the scan signal or the data signal of the scan signal or the data signal is set to be equal to the reference charge amount. A liquid crystal display device comprising: a voltage adjustment circuit for adjusting at least one of the voltages. 8. The liquid crystal display device according to claim 3, wherein the switching element is a two-terminal non-linear element. 9. The liquid crystal display device according to claim 8, wherein the two-terminal nonlinear element is a TFD element including a first conductor, an insulator, and a second conductor. 10. An electronic apparatus comprising the liquid crystal display device according to claim 3. Description: 11. A plurality of scanning lines and dummy scanning lines;
A liquid crystal comprising a plurality of data lines, pixel electrodes and switching elements formed in a matrix corresponding to the intersections of the respective scanning lines and the dummy scanning lines and the respective data lines, and connected in series to the pixel electrodes A method for detecting a voltage applied to the liquid crystal layer in a liquid crystal display panel having a liquid crystal display panel, the method comprising the steps of: A voltage detecting method for a liquid crystal layer, comprising: detecting a flowing current; and calculating a voltage of the liquid crystal layer based on a charge amount obtained by integrating the detected current during the selection period.