JP2000082650A - Projection exposure method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the scattering of the line width of a resist pattern by using a Cr mask for a line and space in a memory cell and a half tone phase shift mask for its peripheral part. SOLUTION: A Cr mask 1 is used for a line and space part in a memory cell where the pitch of a resist pattern is narrow, and a half tone phase shift mask 2 is used for the other peripheral parts where the pitch of the resist pattern is wide. In this manner, by using the half tone phase shift mask for the parts where the pattern pitch is wide, the thin-line of the line width of a pattern at the peripheral part where the pitch of the pattern caused by the light proximity effect is wide can be suppressed, thus reducing the scattering of the line width of the pattern.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a projection exposure method in a manufacturing process of a semiconductor device, and more particularly, to a projection exposure method capable of transferring a fine resist pattern onto a semiconductor substrate.

[0002]

2. Description of the Related Art Conventionally, in a projection exposure method in a manufacturing process of a semiconductor device, a resist pattern formed on a semiconductor substrate includes a narrow portion such as a line and space in a memory cell and a peripheral portion other than the memory cell. In this method, a resist pattern is formed using a Cr mask having a portion with a wide pitch such as a portion and having Cr as a light shielding film.

FIG. 3 is a schematic diagram showing a photomask formed by a conventional projection exposure method. FIG. 4 is a graph showing the dependence of the pitch on the pattern line width in the resist pattern transferred on the semiconductor substrate by the conventional projection exposure method, and the horizontal axis represents the resist pattern transferred on the semiconductor substrate. The vertical axis indicates the line width of the pattern.

As shown in FIG. 3, a photomask formed by a conventional projection exposure method uses a Cr mask 11 in which all light-shielding films are made of Cr, even if the pattern pitch is different. Further, as shown in FIG. 4, the resist pattern of the semiconductor substrate transferred by the conventional photomask of the Cr mask has a variation in the line width of the pattern depending on the pitch. Specifically, when the pattern pitch is about 0.6 μm, the minimum value of the line width of the pattern is about 140 nm, and when the pitch is about 0.4 μm, the maximum value of the line width of the pattern is about 200 μm. . Therefore, the variation width of the line width of the pattern is about 60 nm.

[0005]

However, as described above, there is a problem that the line width of the resist pattern transferred to the semiconductor substrate by the conventional projection exposure method has a variation of about 60 nm, which is large. .

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide a projection exposure method for reducing variations in the line width of a resist pattern on a semiconductor substrate.

[0007]

A first projection exposure method according to the present invention is directed to a projection exposure method for forming a device pattern on a resist by exposing the resist through a mask pattern. It is characterized in that a Cr mask is used for the AND space, and a halftone phase shift mask is used for the peripheral portion.

A second projection exposure method according to the present invention is directed to a projection exposure method for forming a device pattern on a resist by exposing the resist through a mask pattern, wherein the line and space pitch is 0.44 μm or more. Is characterized in that a halftone phase shift mask is used for a portion and a Cr mask is used for a line and space portion having a pitch of less than 0.44 μm.

According to the present invention, the variation width of the line width of the resist pattern transferred to the semiconductor substrate can be reduced.

The line-and-space portion where the pitch is 0.44 μm or more preferably has a line width of 0.2 μm, and the variation width of the line width of the resist pattern on the semiconductor substrate can be reduced to about 40 nm.

[0011] The mask pattern may be exposed with excimer laser light.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A photomask by a projection exposure method according to an embodiment of the present invention will be specifically described below with reference to the accompanying drawings.

FIG. 1 is a schematic diagram showing a photomask by a projection exposure method according to an embodiment of the present invention. The present embodiment is a projection exposure method for forming a device pattern on a resist applied to a semiconductor substrate by exposing a mask pattern with excimer laser light.

As shown in FIG. 1, in the projection exposure method of this embodiment, a Cr mask 1 is used for a line and space (L / S) portion in a memory cell having a narrow resist pattern pitch. The halftone phase shift mask 2 is used for the peripheral portion where the pitch of the resist pattern other than the above is wide.

FIG. 2 is a graph showing the dependence of the pitch on the pattern line width in the resist pattern transferred on the semiconductor substrate by the projection exposure method according to the embodiment of the present invention. The vertical axis indicates the line width of the pattern. FIG. 2 shows that the target value of the line width of the resist pattern formed on the semiconductor substrate is 0.2 μm (200 n
m). In addition, FIG. 2 shows, as an example, a halftone phase mask 2 for a pattern having a pitch of 0.44 μm or more, and a pitch dependency of a line width when a Cr mask 1 is used for a pattern of less than 0.44 μm. Is shown. As shown in FIG. 2, in the projection exposure method according to the present embodiment, the line width of the resist pattern shows a minimum value of about 170 nm of the line width of the pattern when the pattern pitch is about 0.6 μm. When the pitch is about 0.45 μm, the maximum value of the line width of the pattern is about 210 nm. Therefore, in this embodiment,
In all the pitches, the variation width of the line width is about 40 nm. As described above, in the present invention, the variation width of the line width of the resist pattern on the semiconductor substrate is about 40 nm, so that the variation width of the line width of the resist pattern by the conventional photolithography method using a photomask is about 60 nm. , Variation can be reduced by about 20 nm.

As described above, the line width of the resist pattern of the semiconductor substrate formed by using the photomask by the projection exposure method of the present embodiment is such that the halftone phase shift mask is used for a portion having a large pattern pitch. Accordingly, the line width of the pattern in the peripheral portion having a large pattern pitch due to the optical proximity effect can be suppressed from being thinned, so that the variation in the line width of the pattern can be reduced. The use of the halftone phase shift mask is not limited to the line and space around the memory cell, but the halftone phase shift mask can be used for a pattern having a pitch of 0.44 μm or more.

[0017]

As described in detail above, according to the present invention,
By using a halftone phase shift mask for a wide pitch portion, it is possible to suppress the line width of a pattern in a peripheral portion having a wide pitch of the pattern due to the optical proximity effect, thereby reducing variations in the line width of the pattern. can do.

Further, since the halftone phase shift mask is used, the light intensity contrast is improved.
The depth of focus of the resist pattern in the peripheral portion can be increased, and the accuracy of forming the resist pattern can be improved. Further, since the area is different between the memory cell portion and the peripheral portion, the inspection of the photomask can be performed separately for the memory cell portion and the peripheral portion.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a photomask by a projection exposure method according to an embodiment of the present invention.

FIG. 2 is a graph showing a dependence of a pitch on a pattern line width in a resist pattern on a semiconductor substrate transferred by a projection exposure method according to an embodiment of the present invention, wherein a horizontal axis indicates a transfer to the semiconductor substrate; The vertical axis indicates the line width of the pattern.

FIG. 3 is a schematic view showing a photomask formed by a conventional projection exposure method.

FIG. 4 is a graph showing the dependence of the pitch on the pattern line width in a resist pattern on a semiconductor substrate transferred by a conventional projection exposure method, wherein the horizontal axis represents the resist pattern transferred to the semiconductor substrate. The pitch is the pitch, and the vertical axis indicates the line width of the pattern.

[Explanation of symbols]

 1, 11, 12; Cr mask 2: Halftone phase shift mask

Claims (4)

[Claims] In a projection exposure method for forming a device pattern on a resist by exposing the resist through a mask pattern, a Cr mask is used for a line and space in a memory cell, and a half is used for a peripheral portion thereof. A projection exposure method using a tone phase shift mask. 2. A projection exposure method for forming a device pattern on a resist by exposing the resist through a mask pattern, wherein a halftone phase shift mask is provided on a line and space portion having a pitch of 0.44 μm or more. A projection exposure method, wherein a Cr mask is used for a line and space portion having a pitch of less than 0.44 μm. 3. The projection exposure method according to claim 2, wherein the line and space portion having the pitch of 0.44 μm or more has a line width of 0.2 μm. 4. The projection exposure method according to claim 1, wherein the mask pattern is exposed with excimer laser light.