JP2000071167A - Abrasive pad - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve polishing rate and reduce a scratch by providing a groove in a polishing surface of a polishing layer and increasing the width of the shallowest part of the groove than the width of the deepest part of the groove. SOLUTION: For width of a groove formed in polishing layer of the abrasive pad, the width of the shallowest part is longer than the width of the deepest part. When the width of the shallowest part of the groove is shorter than or equal to the width of the deepest part of the groove, retaining ability or fluidity of a polishing slurry on the surface of the abrasive pad and removing efficiency from the surface of the abrasive pad of a threatening attitude figure become insufficient, improvement of polishing rate or reduction of scratch notches cannot be performed, and therefore, this case is not preferable. When the abrasive pad is used for flatting a semiconductor wafer with a CMP, a multilayered abrasive pad having the polishing layer having a polishing surface whose micro rubber A hardness is higher than 70 degrees and a cushion layer whose micro rubber A hardness is lower by more than 10 degrees than the polishing surface is used.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing pad, and more particularly to a polishing pad used in connection with a step of mechanically flattening a surface of an insulating layer formed on a semiconductor substrate such as silicon or a surface of a metal wiring. Polishing pad that can be used.

[0002]

2. Description of the Related Art Large-scale integrated circuits (LSI) typified by semiconductor memories have been increasingly integrated year by year, and accordingly, the technology for manufacturing large-scale integrated circuits has been increasing. Further, with the increase in the density, the number of stacked semiconductor device manufacturing locations has also increased. Due to the increase in the number of layers, unevenness of the main surface of the semiconductor wafer caused by stacking, which has not been a problem in the past, has become a problem. As a result, for example, Nikkei Microdevice July 1994 Issue 50
As described on page 57, chemical mechanical polishing (CMP) is performed for the purpose of compensating for a lack of depth of focus at the time of exposure due to unevenness caused by laminating, or for improving wiring density by flattening through holes. : Chemical
The planarization of a semiconductor wafer using a mechanical polishing technique has been studied.

In general, a CMP apparatus includes a polishing head for holding a semiconductor wafer as an object to be processed, a polishing pad for performing a polishing process on the object to be processed, and a polishing platen for holding the polishing pad. Then, in the polishing process of the semiconductor wafer, a protruding portion of the layer on the surface of the semiconductor wafer is removed by relatively moving the semiconductor wafer and the polishing pad using a slurry composed of an abrasive and a chemical solution, and the layer on the wafer surface is smoothed. It is to be.

The polishing characteristics of CMP are various, such as ensuring local flatness of a wafer, global flatness (uniformity within a wafer surface), preventing scratches, and ensuring a high polishing rate. There are required characteristics. for that reason,
To achieve these, various measures have been devised for the configuration of the polishing pad, which is one of the major factors affecting the polishing characteristics. For example, by forming the polishing pad into a two-layer structure of a hard polishing layer and a soft cushion layer, a hard polishing layer acts on local irregularities, and a soft cushion layer acts on the undulation of the entire wafer. It has a function to follow and, as a result, secure both local flatness and global flatness. In addition, by processing grooves and holes on the surface of the polishing pad, the retention and fluidity of the polishing slurry on the surface of the polishing pad and the removal efficiency of polishing debris from the surface of the polishing pad are improved, and the polishing rate is improved. And scratches are reduced.

[0005]

However, in the conventional groove processed on the surface of the polishing pad, the width of the shallowest portion of the groove and the width of the deepest portion of the groove are the same. This has insufficient retention and fluidity and the efficiency of removal of polishing debris from the polishing pad surface, and limits the improvement of the polishing rate and reduction of scratches.

SUMMARY OF THE INVENTION The object of the present invention is to provide, among other polishing characteristics,
An object of the present invention is to provide a polishing pad capable of achieving a high polishing rate and a reduction in scratches.

[0007]

Means for Solving the Problems As means for solving the problems, the present invention has the following constitution. "A polishing pad having at least a polishing layer, wherein the polishing layer has a groove on its polishing surface, and the width of the shallowest part of the groove is wider than the width of the deepest part of the groove. And a multi-layer polishing pad having at least the following two layers. (1) A polishing layer having the above characteristics and having a micro rubber A hardness of 70 degrees or more. (2) Micro rubber A A cushion layer having a hardness of at least 10 degrees lower than that of the polishing layer. "
A method of manufacturing a semiconductor device, comprising: flattening using the polishing pad or the multilayer polishing pad. ".

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, it is essential that the width of a groove formed in a polishing layer of a polishing pad is wider at a shallowest portion than at a deepest portion. If the width of the shallowest part of the groove is smaller than or equal to the width of the deepest part of the groove, the retention and fluidity of the polishing slurry on the polishing pad surface and the efficiency of removal of polishing debris from the polishing pad surface are reduced. This is unsatisfactory and cannot improve the polishing rate and reduce scratches, which is not preferable. The width of the shallowest part of the groove is 1.5 times the width of the deepest part of the groove.
It is preferably at least twice, more preferably at least twice. The width of the shallowest part of the groove should be determined from the viewpoint of the amount of the abrasive, the size of the semiconductor chip (die), the required flatness and the polishing rate, but is usually 0.1 to 100 mm, Preferably, it is determined from the range of 0.5 to 50 mm.

The shape of the groove is not particularly limited.
For example, the surface shape viewed from the polished surface includes a lattice shape, a concentric shape, a spiral shape, and the like, and the cross-sectional shape includes a V shape, a U shape, a step shape, and the like. Since the depth of the groove affects the polishing rate and the flatness, it should be determined from the required characteristics of polishing a semiconductor chip (also called a die). However, the depth is usually 0.05 to 3 mm, preferably 0 to 3 mm. .
It is determined from the range of 1 to 1 mm.

[0010] The method of forming grooves in the polishing layer is not particularly limited. Specifically, a method for forming a groove by cutting the surface of a polishing pad, a method for forming a groove by contacting a heated mold, a hot wire or the like with the surface of the polishing pad and melting a contact portion, a method for forming a groove, Method of forming a polishing pad with grooves formed from the beginning using a mold formed with a mold, by partially swelling the polymerizable compound on the surface of the polymer sheet and polymerizing and hardening, to remove the unswelled portion There is a method of forming a groove.

The polishing pad in the present invention is not particularly limited to a single layer or a plurality of layers. However, when the polishing pad is used for flattening a semiconductor wafer by CMP, at least a polishing surface having a micro rubber A hardness of 70 degrees or more is used. And a multi-layer polishing pad having a cushion layer having a micro rubber A hardness of at least 10 degrees lower than the polishing layer.

The micro rubber hardness in the present invention means a value measured by a micro rubber hardness meter MD-1 manufactured by Kobunshi Keiki Co., Ltd. The micro rubber hardness tester MD-1 is for measuring the hardness of thin and small samples which were difficult to measure with a conventional hardness tester. Also, since it is designed and manufactured as a reduced model of about 1/5 of the spring type rubber hardness meter (durometer) type A, its measured value is assumed to be the same as the measured value of the spring type rubber hardness meter type A. You can think. Note that a normal polishing pad cannot be evaluated with a spring-type rubber hardness meter because the thickness of the polishing layer or the hard layer is too thin, 5 mm or less, but can be evaluated with the micro rubber hardness meter MD-1.

The micro rubber A hardness of the polishing layer is preferably 70 degrees or more. If the value is less than this value, the local flatness when polishing the unevenness of the semiconductor surface becomes poor, which is not preferable. Preferably 80 degrees or more, and more preferably 90 degrees
Degree or more is preferable from the viewpoint of flatness.

The micro rubber A hardness of the cushion layer is preferably lower than the micro rubber A hardness of the polishing layer by 10 degrees or more, since it is excellent in following the undulation of the wafer and excellent in global flatness.

In the multilayer polishing pad of the present invention, the polishing layer and the cushion layer have closed cells having a diameter of 1000 μm or less, and the expansion ratio is in the range of 1.01 to 3 times. It is preferable in that the liquid retention of the polishing slurry on the pad surface is good, and the cushion layer is excellent in cushioning and excellent in following the undulation of the wafer. If all the cell diameters are larger than 1000 μm or the expansion ratio exceeds 3, the resulting cells become open cells, and the above-mentioned advantages are undesirably lost.

In the present invention, the material of the polishing layer is not particularly limited. Specifically, polyethylene, polypropylene, polyester, polyurethane, polymethyl methacrylate, polyvinyl chloride, polycarbonate, polystyrene, polyamide, epoxy resin, ABS resin,
Neoprene rubber, butadiene rubber, styrene-butadiene rubber, ethylene propylene rubber, silicone rubber, and the like are included. These preferably have closed cells as described above.

Of these, polyurethane is preferred because the diameter of the closed cells can be easily controlled. Polyurethane is a polymer synthesized based on a polyaddition reaction or polymerization reaction of polyisocyanate, the compound used as the symmetric of polyisocyanate is an active hydrogen compound,
That is, it is a compound containing two or more polyhydroxy groups or amino groups. Examples of the polyisocyanate include tolylene diisocyanate, diphenylmethane diisocyanate, naphthalene diisocyanate, hexamethylene diisocyanate, and isophorone diisocyanate. In addition, typical examples of the polyhydroxy group-containing compound include polyols, such as polyether polyol, polytetramethylene glycol, epoxy resin-modified polyol, polyester polyol, acrylic polyol, and silicone polyol. It is necessary to determine the combination and optimum amount of the polyisocyanate and the polyol, the catalyst, the foaming agent and the foam stabilizer depending on the hardness, the cell diameter and the expansion ratio.

It is also preferable that the polishing layer is composed of a composite of polyurethane and another polymer. As a method of forming a composite of polyurethane and another polymer, a method of swelling a polymerizable compound in polyurethane and polymerizing and curing it is preferable because it is easy.

The other polymer is not particularly limited, but a polymer obtained from a vinyl compound is preferred in view of swelling of the polymerizable compound, ease of polymerization, and high hardness obtained. Specifically, methyl methacrylate, ethyl methacrylate, n-butyl methacrylate, isobutyl methacrylate, 2-ethylhexyl methacrylate, isodecyl methacrylate, n-lauryl methacrylate, 2-hydroxyethyl methacrylate, 2-hydroxypropyl methacrylate, 2-hydroxyethyl acrylate, 2-hydroxypropyl acrylate, 2-hydroxybutyl methacrylate, dimethylaminoethyl methacrylate, diethylaminoethyl methacrylate, methacrylic acid, glycidyl methacrylate, ethylene glycol dimethacrylate, fumaric acid,
Examples include polymers obtained from dimethyl fumarate, diethyl fumarate, dipropyl fumarate, maleic acid, dimethyl maleate, diethyl maleate, dipropyl maleate, acrylonitrile, acrylamide, vinyl chloride, styrene, α-methylstyrene, and the like.

In the present invention, the material of the cushion layer is not particularly limited. The same material as that of the polishing layer can be used. Among them, polyurethane is preferable because the closed cell diameter can be easily controlled and the cushioning property required for the cushion layer can be easily obtained.

Also, the cushion layer is preferably made of a composite of polyurethane and another polymer. Specifically, a method of impregnating a non-woven fabric such as polyethylene or polypropylene with polyurethane and wet-foaming is preferred in that the cushioning property required for the cushion layer can be easily obtained.

In the multilayer polishing pad of the present invention, it is preferable that the polishing layer and the cushion layer are adjacent to each other. In this case, the polishing layer and the cushion layer may be adjacent to each other via an adhesive layer or may be adjacent to each other without an adhesive layer. But it is good. Specifically, as a method of adjoining via an adhesive layer, a method of adhering a polishing layer and a cushion layer with a double-sided adhesive tape via an adhesive, and a method of adjoining without an adhesive layer include: A method of thermally fusing the polishing layer and the cushion layer, and a method of forming a polishing layer on the surface of the cushion layer by swelling a polymerizable compound on the surface of the cushion layer and partially polymerizing and curing the compound. In the latter case, the polishing layer formed on the surface of the cushion layer contains at least 30% by weight or more of the same polymer as that of the cushion layer, and swells with the polymer constituting the cushion layer. Polymer obtained from a hydrophilic compound is an interpenetrating polymer (Interpen
ETHERTING POLYMER NETWORK
Since it is considered that s) is formed, a strong adhesive strength can be obtained between the polishing layer and the cushion layer. When a polishing pad is prepared by this method, the polymerizable compound may be swollen on the entire surface of the cushion layer. However, by partially swelling and polymerizing and curing, the polishing layer is partially formed on the surface of the cushion layer. This is preferable because the portion without the polishing layer functions as a groove, and it is not necessary to form the groove.

According to the present invention, it is possible to provide a polishing pad capable of achieving a high polishing rate and a reduction in scratches, among other polishing characteristics, and particularly to flatten the surface of a semiconductor substrate, particularly a wafer whose surface has been processed. It is suitable to do. Using this flattening step, a semiconductor device can be manufactured by an ordinary method.

[0024]

The present invention will be described below in further detail with reference to examples. In this example, each characteristic was measured by the following method.

Micro rubber A hardness: Measured with a micro rubber hardness meter MD-1 manufactured by Kobunshi Keiki Co., Ltd.

Polishing rate: The thickness of the wafer per unit time (polishing rate) was calculated by measuring the wafer thickness before and after polishing with a digital film thickness meter ZC-101 manufactured by Nikon Corporation.

Scratch scratches: The presence or absence of scratches was determined by observing the polished wafer at a magnification of 40 using an optical microscope.

Example 1 A foamed polyurethane having a micro rubber A hardness of 98 degrees as a polishing layer, and a micro rubber A hardness of 50 as a cushion layer.
Groove pitch 15 on the surface of a commercially available polishing pad for semiconductors (product without surface grooving) using wet polyurethane
A groove having a trapezoidal cross section with a width of 3 mm and a groove width of 3 mm and a groove depth of 1 mm was formed in a lattice shape by cutting to prepare a polishing pad of the present invention.

Also, 0.2-inch on a 6-inch silicon wafer
Al wirings having a width of 5 μm and a height of 1.2 μm are formed at intervals of 0.5 mm, and tetraethoxysilane is further deposited on top thereof.
An insulating film was formed by VD so as to have a thickness of 3 μm to obtain a polished sample. The unevenness of the surface of the insulating film was 11,000 angstroms at the center of the wafer and 11,200 angstroms at the periphery of the wafer.

The polishing sample was attached to a polishing head of a polishing machine and rotated at 60 rpm, a polishing pad was fixed to a platen of the polishing machine, and the polishing pad was rotated at 60 rpm in the same direction as the rotation direction of the polishing head.
Polishing was performed at a polishing pressure of 0.05 MPa for 5 minutes while supplying -1 (10% aqueous solution, pH = 10.5) at a rate of 10 ml / min. The polishing rate was 10 μm / h. No scratch was found.

Example 2 70 parts by weight of methyl methacrylate, triethylamine 1
A solution consisting of 5 parts by weight, 15 parts by weight of n-decane and 0.1 part by weight of azobisisobutylnitrile was applied to a brass thickness 1
A mold having a 15 mm square concave portion (non-through hole) with a 15 mm side and a 20 mm pitch (repeated distance) on the surface of a 0 mm plate was poured into all the concave portions.
A 3 mm-thick polyurethane rubber sheet (micro rubber A hardness = 50 degrees) immersed in ethylene glycol for 1 hour at 80 ° C. was placed on a mold filled with this solution, and the ethylene glycol adhered to the surface was wiped off and then contacted. Then, a brass plate (non-porous product) having a thickness of 10 mm was further covered thereon, and the mold and the brass plate (non-porous product) were sandwiched between large clips. After confirming that the solution does not leak, put it in a 90 ° C. oven and heat it for one hour, then take it out and release it from the mold to remove the polishing pad with the island-like polishing layer formed on the polyurethane. Obtained.
The size of each of the island-shaped polishing layers was a square of 15 mm as viewed from the vertical direction of the pad, and the height was 300 μm. The shallowest groove width is 40 mm, and the deepest groove width is 20 m.
m. Micro rubber A hardness of the island-shaped polished part is 97
The micro rubber A hardness of the cushion layer on the back surface was 50 degrees. Polishing and evaluation were performed in the same manner as in Example 1 except that this polishing pad was used. Polishing rate is 1
It was 0 μm / h. No scratch was found.

Comparative Example 1 On the surface of a polishing pad having the same material and composition as in Example 1, a groove width of 1 mm, a groove depth of 1 mm, and a groove depth of 0.5 mm were formed.
Polishing and evaluation were performed in the same manner as in Example 1 except that a commercially available polishing pad for semiconductors in which a groove having a rectangular cross section was machined was used. The polishing rate was 7 μm / h. In addition, two scratches were confirmed.

[0033]

According to the polishing pad of the present invention, it is possible to provide a polishing pad capable of achieving a high polishing rate and a reduction in scratches, among other polishing characteristics.

Claims (12)

[Claims] 1. A polishing pad having at least a polishing layer, wherein the polishing layer has a groove on its polishing surface, and the width of the shallowest part of the groove is wider than the width of the deepest part of the groove. Characteristic polishing pad. 2. The polishing pad according to claim 1, wherein the polishing layer is made of polyurethane. 3. The polishing pad according to claim 1, wherein the polishing layer comprises a composite of polyurethane and another polymer. 4. The polishing pad according to claim 3, wherein the other polymer is a polymer obtainable from a vinyl compound. 5. A multi-layer polishing pad having at least the following two layers. (1) A polishing layer having the features of any one of claims 1 to 4, and having a micro rubber A hardness of 70 degrees or more. (2) A cushion layer having a micro rubber A hardness lower than the polishing layer by 10 degrees or more. 6. A polishing layer and a cushioning layer having a diameter of 100
Having closed cells of 0 μm or less and an expansion ratio of 1.01
The multi-layer polishing pad according to claim 5, wherein the range is up to three times. 7. The multilayer polishing pad according to claim 5, wherein the cushion layer is made of polyurethane. 8. The cushion layer according to claim 5, wherein the cushion layer is composed of a composite of polyurethane and another polymer.
The polishing pad according to claim 6. 9. The polishing pad according to claim 5, wherein the polishing layer and the cushion layer are adjacent to each other via an adhesive layer. 10. The polishing layer and the cushion layer are adjacent to each other without the interposition of an adhesive layer.
The polishing pad according to any one of the above. 11. The polishing pad according to claim 1, wherein the polishing pad is for polishing a semiconductor substrate. 12. A method of manufacturing a semiconductor device, comprising the step of flattening the surface of a processed wafer by using the polishing pad according to any one of claims 1 to 10.