HK205496A - Circuit for the dicrete cosine transform - Google Patents
Circuit for the dicrete cosine transformInfo
- Publication number
- HK205496A HK205496A HK205496A HK205496A HK205496A HK 205496 A HK205496 A HK 205496A HK 205496 A HK205496 A HK 205496A HK 205496 A HK205496 A HK 205496A HK 205496 A HK205496 A HK 205496A
- Authority
- HK
- Hong Kong
- Prior art keywords
- circuit
- dicrete
- cosine transform
- line
- column
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
- G06F17/147—Discrete orthonormal transforms, e.g. discrete cosine transform, discrete sine transform, and variations therefrom, e.g. modified discrete cosine transform, integer transforms approximating the discrete cosine transform
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
Abstract
A circuit for the line-by-line or column-by-column transformation of digital video signals. <IMAGE>
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/914,732 US4807033A (en) | 1985-10-02 | 1986-10-01 | Method for correcting television signals |
DE19863642664 DE3642664A1 (en) | 1986-10-01 | 1986-12-13 | Transformation circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
HK205496A true HK205496A (en) | 1996-11-22 |
Family
ID=25850324
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK205496A HK205496A (en) | 1986-10-01 | 1996-11-14 | Circuit for the dicrete cosine transform |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0262555B1 (en) |
JP (1) | JP2583524B2 (en) |
KR (1) | KR910008454B1 (en) |
AT (1) | ATE130689T1 (en) |
ES (1) | ES2081798T3 (en) |
HK (1) | HK205496A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4113505A1 (en) * | 1991-04-25 | 1992-10-29 | Thomson Brandt Gmbh | METHOD FOR IMAGE SIGNAL CODING |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3662161A (en) * | 1969-11-03 | 1972-05-09 | Bell Telephone Labor Inc | Global highly parallel fast fourier transform processor |
JPS519347A (en) * | 1974-07-12 | 1976-01-26 | Shindengen Electric Mfg | 2 jigenfuuriehenkansochi |
US4189748A (en) * | 1977-08-23 | 1980-02-19 | Northrop Corporation | Video bandwidth reduction system using a two-dimensional transformation, and an adaptive filter with error correction |
US4293920A (en) * | 1979-09-04 | 1981-10-06 | Merola Pasquale A | Two-dimensional transform processor |
JPS57204966A (en) * | 1981-06-12 | 1982-12-15 | Hitachi Ltd | Digital picture processing method |
JPS60211543A (en) * | 1984-04-05 | 1985-10-23 | Nec Corp | Coordinate converting system |
-
1987
- 1987-09-22 EP EP87113807A patent/EP0262555B1/en not_active Expired - Lifetime
- 1987-09-22 AT AT87113807T patent/ATE130689T1/en not_active IP Right Cessation
- 1987-09-22 ES ES87113807T patent/ES2081798T3/en not_active Expired - Lifetime
- 1987-09-30 KR KR1019870010935A patent/KR910008454B1/en not_active IP Right Cessation
- 1987-10-01 JP JP62245949A patent/JP2583524B2/en not_active Expired - Lifetime
-
1996
- 1996-11-14 HK HK205496A patent/HK205496A/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR910008454B1 (en) | 1991-10-15 |
EP0262555A2 (en) | 1988-04-06 |
ES2081798T3 (en) | 1996-03-16 |
JP2583524B2 (en) | 1997-02-19 |
ATE130689T1 (en) | 1995-12-15 |
JPS63107326A (en) | 1988-05-12 |
EP0262555B1 (en) | 1995-11-22 |
EP0262555A3 (en) | 1990-01-31 |
KR880005514A (en) | 1988-06-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PC | Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee) |