GB8911381D0 - Apparatus for rapidly clearing the output display of a computer system - Google Patents

Apparatus for rapidly clearing the output display of a computer system

Info

Publication number
GB8911381D0
GB8911381D0 GB898911381A GB8911381A GB8911381D0 GB 8911381 D0 GB8911381 D0 GB 8911381D0 GB 898911381 A GB898911381 A GB 898911381A GB 8911381 A GB8911381 A GB 8911381A GB 8911381 D0 GB8911381 D0 GB 8911381D0
Authority
GB
United Kingdom
Prior art keywords
computer system
output display
rapidly clearing
clearing
rapidly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB898911381A
Other versions
GB2223651A (en
GB2223651B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of GB8911381D0 publication Critical patent/GB8911381D0/en
Publication of GB2223651A publication Critical patent/GB2223651A/en
Application granted granted Critical
Publication of GB2223651B publication Critical patent/GB2223651B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/395Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/024Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using colour registers, e.g. to control background, foreground, surface filling
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/14Display of multiple viewports
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/393Arrangements for updating the contents of the bit-mapped memory
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/399Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00Aspects of display data processing
    • G09G2340/12Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)
  • Image Generation (AREA)
  • User Interface Of Digital Computer (AREA)
GB8911381A 1988-10-07 1989-05-18 Apparatus for rapidly clearing the output display of a computer sytem Expired - Fee Related GB2223651B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US25495788A 1988-10-07 1988-10-07

Publications (3)

Publication Number Publication Date
GB8911381D0 true GB8911381D0 (en) 1989-07-05
GB2223651A GB2223651A (en) 1990-04-11
GB2223651B GB2223651B (en) 1993-03-31

Family

ID=22966239

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8911381A Expired - Fee Related GB2223651B (en) 1988-10-07 1989-05-18 Apparatus for rapidly clearing the output display of a computer sytem

Country Status (6)

Country Link
JP (1) JP2858137B2 (en)
KR (1) KR960003073B1 (en)
CA (1) CA1316271C (en)
FR (1) FR2637706B1 (en)
GB (1) GB2223651B (en)
HK (1) HK98793A (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5061919A (en) * 1987-06-29 1991-10-29 Evans & Sutherland Computer Corp. Computer graphics dynamic control system
US5050102A (en) * 1989-04-28 1991-09-17 Sun Microsystems, Inc. Apparatus for rapidly switching between output display frames using a shared frame gentification memory
US5493637A (en) * 1992-12-04 1996-02-20 Network Computing Devices, Inc. Video buffer recycling method and apparatus
US5519825A (en) * 1993-11-16 1996-05-21 Sun Microsystems, Inc. Method and apparatus for NTSC display of full range animation
US5537156A (en) * 1994-03-24 1996-07-16 Eastman Kodak Company Frame buffer address generator for the mulitple format display of multiple format source video
US6288722B1 (en) * 1996-10-17 2001-09-11 International Business Machines Corporation Frame buffer reconfiguration during graphics processing based upon image attributes
JP2976945B2 (en) * 1997-09-11 1999-11-10 日本電気株式会社 Image drawing device
US7038689B2 (en) * 2002-02-19 2006-05-02 Intel Corporation Sparse refresh double-buffering

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2113950B (en) * 1982-01-15 1986-10-01 Quantel Ltd Image composition system
US4533910A (en) * 1982-11-02 1985-08-06 Cadtrak Corporation Graphics display system with viewports of arbitrary location and content
US4554538A (en) * 1983-05-25 1985-11-19 Westinghouse Electric Corp. Multi-level raster scan display system
GB8320357D0 (en) * 1983-07-28 1983-09-01 Quantel Ltd Video graphic simulator systems
US4559533A (en) * 1983-11-03 1985-12-17 Burroughs Corporation Method of electronically moving portions of several different images on a CRT screen
US4642626A (en) * 1984-09-17 1987-02-10 Honeywell Information Systems Inc. Graphic display scan line blanking capability
JPS61151592A (en) * 1984-12-20 1986-07-10 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Display unit
US4755810A (en) * 1985-04-05 1988-07-05 Tektronix, Inc. Frame buffer memory
GB2181928B (en) * 1985-10-16 1989-10-25 Philips Electronic Associated Teletext television receivers
GB2191917A (en) * 1986-06-16 1987-12-23 Ibm A multiple window display system
JPS63118787A (en) * 1986-11-07 1988-05-23 株式会社日立製作所 Superimposition display system
GB2214038B (en) * 1987-10-05 1991-07-03 Int Computers Ltd Image display system

Also Published As

Publication number Publication date
FR2637706A1 (en) 1990-04-13
KR960003073B1 (en) 1996-03-04
JPH02123422A (en) 1990-05-10
GB2223651A (en) 1990-04-11
HK98793A (en) 1993-09-30
FR2637706B1 (en) 1994-03-18
CA1316271C (en) 1993-04-13
KR900007186A (en) 1990-05-09
AU3458189A (en) 1990-04-12
JP2858137B2 (en) 1999-02-17
GB2223651B (en) 1993-03-31
AU616966B2 (en) 1991-11-14

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20060518