GB2377350A

GB2377350A - OFDM Receiving system for efficiently estimating symbol timing offset without being influenced by jitter

Info

Publication number: GB2377350A
Application number: GB0130902A
Authority: GB
Inventors: Yong-Sik Kwon
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Electronics Co Ltd
Priority date: 2001-07-06
Filing date: 2001-12-24
Publication date: 2003-01-08
Anticipated expiration: 2021-12-24
Also published as: CN1173537C; CN1396749A; KR100750105B1; GB2377350B; KR20030004798A; GB0130902D0

Abstract

An orthogonal frequency division multiplex (OFDM) receiving system for estimating a symbol timing offset without being influenced by jitter, and a method for the same are provided. The method includes extracting scattered pilots, which are inserted into a symbol at regular sample intervals, from a received OFDM signal and estimating a symbol timing offset, calculating an integer part from the value of the estimated symbol timing offset and setting a threshold value for the integer part, selecting values as an integer part and a fraction part of the value of a symbol timing offset according to the result of comparing the calculated integer part with the threshold value, and correcting a fast Fourier transform (FFT) start point based on the value selected as an integer part and correcting a sampling point based on the value selected as a fraction part. Accordingly, by setting a threshold value for the integer part of a symbol timing offset to prevent the influence of jitter, symbol timing can be restored even when a channel state is poor and a signal to noise ratio (SNR) is low.

Description

OFDM RECEIVING SYSTEM FOR EFFICIENTLY ESTIMATING SYMBOL TIMING OFFSET WITHOUT BEING INFLUENCED BY JITTER AND METHOD FOR THE SAME The present invention relates to an orthogonal frequency division multiplex (OFDM) receiving system, and more particularly, to an OFDM receiving system for estimating a symbol timing offset without being influenced by jitter, and a method for the same.

Generally, OFDM transmitting systems transmit information over a subcarrier using fast Fourier transform (FFT) and add a guard interval to the front portion of a useful symbol in order to reduce the influence of a multipath. Since OFDM receiving systems use FFT, it is important to find an exact FFT start point. When an FFT start point is not exact, the result of FFT has phase deviation, which results in wrong FFT operation. OFDM receiving systems find the boundary between a guard interval and a useful symbol interval in a received OFDM signal and perform FFT window timing synchronization in order to perform FFT with respect to only a useful symbol.

Figure 1 is a block diagram of an entire typical OFDM receiving system estimating a symbol timing offset. The OFDM receiving system of Figure 1 includes an analog-todigital converter (ADC) 110 for converting an OFDM signal into a digital complex sample, an FFT window controller 120 for correcting an integer part of an offset value, an FFT operation unit 130 for performing FFT, a symbol timing offset estimator 140 for detecting a symbol timing offset from a scattered pilot, an offset divider 150 for dividing

the value of a detected offset into an integer part and a fraction part, and a digital phase locked loop (DPLL) 160 for controlling the frequency and phase of the ADC 110 using the fraction part of the offset value.

Referring to Figure 1, the FFT window controller 120 receives an integer part of a symbol timing offset value and controls an FFT start point. The symbol timing offset estimator 140 estimates a symbol timing offset using the phase rotation of a scattered pilot. The offset divider 150 outputs only the integer part of the value of the detected symbol timing offset when the integer part is not zero and outputs only the fraction part thereof when the integer part is zero.

When a channel state is poor as in a Rayleigh channel and a signal to noise ratio (SNR) is low, the value of a symbol timing offset detected by the symbol timing offset estimator 140 contains much jitter, so that the offset value cannot become zero and maintains an integer part.

In this case, since the FFT window controller 120 is controlled by the integer part of an offset value influenced by jitter, channel distortion occurs in each symbol. Accordingly, an equalizer (not shown) cannot estimate a correct channel state, thereby outputting wrong data.

It is an aim of the present invention to provide an orthogonal frequency division multiplex (OFDM) receiving method able to restore symbol timing even if a channel state is poor and a signal to noise ratio is low.

Another aim of the present invention to provide an orthogonal frequency division multiplex (OFDM) receiving system able to restore symbol timing even if a channel state is poor and a signal to noise ratio is low.

According to a first aspect of the present invention there is provided a method of estimating a symbol timing offset in an OFDM receiving system. The method includes extracting scattered pilots, which are inserted into a symbol at regular sample intervals, from a received OFDM signal and estimating a symbol timing offset, calculating an integer part from the value of the estimated symbol timing offset and setting a threshold value for the integer part, selecting values as an integer part and a fraction part of the value of a symbol timing offset according to the result of comparing the calculated integer part with the threshold value, and correcting a fast Fourier transform (FFT) start point based on the value selected as an integer part and correcting a sampling point based on the value selected as a fraction part.

Preferably, the selecting step comprises: comparing a difference between the current integer of the estimated symbol timing offset and a previous integer with the predetermined threshold value; and selecting the current integer as the integer part and zero as the fraction part when the difference exceeds the threshold value and selecting zero as the integer part and a fraction of the estimated symbol timing offset as the fraction part when the difference is less than the threshold value.

Preferably, the fraction part is calculated by performing a subtraction with respect to the value of the estimated symbol timing offset and an integer obtained by truncating a fraction part of the value of the estimated symbol timing offset.

Preferably, the integer part is calculated by rounding off the value of the estimated symbol timing offset.

According to a second aspect of the present invention there is provided an OFDM receiving system performing FFT on a symbol composed of a useful data sample and a guard interval. The OFDM receiving system includes an analogto-digital converter for converting an OFDM signal into digital complex samples, an FFT window controller for removing a guard interval from each of the digital complex samples output from the analog-to-digital converter to output useful data samples corresponding to a useful symbol interval, an FFT operation unit for performing FFT on the useful data samples output from the FFT window controller, a symbol timing offset estimator for detecting scattered pilots from samples output from the FFT operating unit and estimating a symbol timing offset using the scattered pilots, and an offset processor for comparing an integer part calculated from the value of the symbol timing offset estimated by the symbol timing offset estimator with a threshold value and selectively outputting an integer part and a fraction part to the FFT window controller and the analog-to-digital converter, respectively, according to the result of comparison.

Preferably, the offset processor comprises: an integer calculator for calculating an integer by rounding off the

value of the symbol timing offset; a previous integer storage unit for storing the integer of a previous symbol timing offset; and an offset calculator for comparing a difference between the integer calculated by the integer calculator and the integer stored in the previous integer storage unit with the threshold value, updating the integer in the previous integer storage unit and outputting the integer of the value of the estimated symbol timing offset as an integer part and zero as a fraction part when the difference exceeds the threshold value, and outputting zero as an integer part and the fraction of the value of the estimated symbol timing offset as a fraction part when the difference does not exceed the threshold value.

Preferably, the offset calculator comprises: a comparator for comparing the difference between the integer calculated by the integer calculator and the integer stored in the previous integer storage unit with the threshold value; a truncator for truncating the fraction of the estimated symbol timing offset to generate an integer; a subtractor for subtracting the integer generated by the truncator from the value of the estimated symbol timing offset to calculate a fraction; a rounding unit for rounding off the value of the estimated symbol timing offset to extract an integer; and a multiplexer for selectively outputting the integer from the rounding unit and the fraction from the subtractor according to the result of comparison performed by the comparator.

Preferably, the integer part is used for controlling an FFT start point, and the fraction part is used for

controlling the frequency and phase of a sampling clock signal.

For a better understanding of the invention, and to show how embodiments of the same may be carried into effect, reference will now be made, by way of example, to the accompanying diagrammatic drawings in which: Figure 1 is a block diagram of an entire typical orthogonal frequency division multiplex (OFDM) receiving system estimating a symbol timing offset; Figure 2 is a block diagram of an entire OFDM receiving system according to the present invention; Figure 3 is a detailed diagram of the offset calculator of Figure 2; and Figure 4 is a flowchart of a method of estimating a symbol timing offset without being influenced by jitter in an OFDM receiving system according to the present invention.

Figure 2 is a block diagram of an entire orthogonal frequency division multiplex (OFDM) receiving system according to the present invention. The OFDM receiving system of Figure 2 includes an analog-to-digital converter (ADC) 210, an FFT window controller 220, an FFT operation unit 230, a symbol timing offset estimator 240, an offset processor 250, and a digital phase locked loop (DPLL) 260. The offset processor 250 includes an integer calculator 252, a previous integer storage unit 254, a subtractor 256, and an offset calculator 258.

The ADC 210 converts an OFDM signal into digital complex samples having a sample rate such as 9.14 MHz.

The FFT window controller 220 receives digital complex samples output from the ADC 210, identifies two types of transmission mode and four types of guard interval mode using the guard interval, and finds the boundary between the guard interval and a useful symbol interval. Also, the FFT window controller 220 receives the integer part of a symbol timing offset and adjusts an FFT start point to input only the useful symbol interval to the FFT operation unit 230.

The FFT operation unit 230 performs FFT with respect to samples corresponding to the useful symbol interval output from the FFT window controller 220 to output a frequency domain signal. This frequency domain signal includes a scattered pilot signal containing information necessary for OFDM transmission in addition to general data. Scattered pilot signals which have been inserted into each symbol of the frequency domain signal at intervals of 12 samples are necessary for symbol timing synchronization.

The symbol timing offset estimator 240 estimates a scattered pilot from the sample output from the FFT operation unit 230 and estimates a symbol timing offset using the scattered pilot.

The offset processor 250 compares a threshold value with the integer part of the value of the symbol timing offset detected by the symbol timing offset estimator 240

and selectively outputs an integer and a fraction to the FFT window controller 220 and the DPLL 260, respectively.

More specifically in the offset processor 250, the integer calculator 252 rounds the value of a symbol timing offset to calculate an integer. The previous integer storage unit 254 stores a previous integer. The subtractor 256 performs a subtraction with respect to the integer calculated by the integer calculator 252 and the previous integer stored in the previous integer storage unit 254. The offset calculator 258 compares a value calculated by the subtractor 256 with a predetermined threshold value. The offset calculator 258 updates the previous integer of the previous integer storage unit 254 and outputs only the integer from the integer calculator 252 when the value calculated by the subtractor 256 exceeds the threshold value, and outputs only the fraction of the detected symbol timing offset when the value calculated by the subtractor 256 is less than the threshold value.

The DPLL 260 changes the frequency and phase of a sampling clock signal of the ADC 110 using the fraction of a symbol timing offset output from the offset processor 250.

Figure 3 is a detailed diagram of the offset calculator 258 of Figure 2. Referring to Figure 3, a comparator 370 compares the difference between an integer calculated by the integer calculator 252 and a previous integer stored in the previous integer storage unit 254 with the threshold value.

A rounding unit 310 rounds off a symbol timing offset value to calculate an integer.

A truncator 320 truncates the fraction part of the symbol timing offset value to calculate an integer.

A subtractor 330 subtracts the integer calculated by the truncator 320 from the symbol timing offset value to calculate a fraction.

First and second multiplexers 340 and 350 selectively output an integer and a fraction according to the result of comparison output from the comparator 370. In other words, when it is determined that the output of the subtractor 256 of Figure 2 exceeds the threshold value, the first multiplexer 340 outputs the integer calculated by the rounding unit 310, and the second multiplexer 350 outputs a fraction part as 0. When it is determined that the output of the subtractor 256 of Figure 2 is less than the threshold value, the first multiplexer 340 outputs an integer part as zero, and the second multiplexer 350 outputs the fraction calculated by the subtractor 330.

Figure 4 is a flowchart of a method of estimating a symbol timing offset without being influenced by jitter in an OFDM receiving system according to the present invention. In step 410, scattered pilots which are inserted into each symbol at predetermined sample intervals are extracted from a received OFDM signal to estimate a symbol timing offset.

In step 420, the absolute value of the symbol timing offset is calculated.

In step 430, the absolute value is rounded off to calculate an integer.

In step 450, the absolute value of the difference between the current integer and a previous integer is calculated.

In step 470, the absolute value of the difference is compared with a predetermined threshold value.

In step 480, when the absolute value of the difference exceeds the threshold value, the previous integer is updated with a current integer, and the current integer and zero are output as an integer part and a fraction part, respectively. In step 490, when the absolute value of the difference is less than the threshold value, zero and a fraction are output as an integer part and a fraction part, respectively.

As described above, the present invention sets a threshold value for the integer part of a symbol timing offset to prevent the influence of jitter, thereby restoring symbol timing even when a channel state is poor and a signal to noise ratio (SNR) is low.

The present invention is not restricted to the embodiments described above, and it will be understood by those skilled in the art that various changes in form and details may be made therein. For example, the present invention can be applied to European type digital TV, wireless LANs according to IEEE 802. 11a and other systems using OFDM.

The reader's attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.

All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive.

Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.

The invention is not restricted to the details of the foregoing embodiment (s). The invention extend to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.

Claims

Claims 1. A method of estimating a symbol timing offset in an orthogonal frequency division multiplex OFDM receiving system, the method comprising the steps of: extracting scattered pilots, which are inserted into a symbol at regular sample intervals, from a received OFDM signal and estimating a symbol timing offset; calculating an integer part from the value of the estimated symbol timing offset and setting a threshold value for the integer part; selecting values as an integer part and a fraction part of the value of a symbol timing offset according to the result of comparing the calculated integer part with the threshold value; and correcting a fast Fourier transform (FFT) start point based on the value selected as an integer part and correcting a sampling point based on the value selected as a fraction part.
2. The method of claim 1, wherein the selecting step comprises : comparing a difference between the current integer of the estimated symbol timing offset and a previous integer with the predetermined threshold value; and selecting the current integer as the integer part and zero as the fraction part when the difference exceeds the

<Desc/Clms Page number 13>

threshold value and selecting zero as the integer part and a fraction of the estimated symbol timing offset as the fraction part when the difference is less than the threshold value.
3. The method of claim 1 or 2, wherein the fraction part is calculated by performing a subtraction with respect to the value of the estimated symbol timing offset and an integer obtained by truncating a fraction part of the value of the estimated symbol timing offset.
4. The method of claim 1,2 or 3 wherein the integer part is calculated by rounding off the value of the estimated symbol timing offset.
5. An orthogonal frequency division multiplex OFDM receiving system performing fast Fourier transform FFT on a symbol composed of a useful data sample and a guard interval, the OFDM receiving system comprising: an analog-to-digital converter for converting an OFDM signal into digital complex samples; an FFT window controller for removing a guard interval from each of the digital complex samples output from the analog-to-digital converter to output useful data samples corresponding to a useful symbol interval; FFT operation means for performing FFT on the useful data samples output from the FFT window controller; a symbol timing offset estimator for detecting scattered pilots from samples output from the FFT

<Desc/Clms Page number 14>

operating means and estimating a symbol timing offset using the scattered pilots; and an offset processor for comparing an integer part calculated from the value of the symbol timing offset estimated by the symbol timing offset estimator with a threshold value and selectively outputting an integer part and a fraction part to the FFT window controller and the analog-to-digital converter, respectively, according to the result of comparison.
6. The OFDM receiving system of claim 5, wherein the offset processor comprises: an integer calculator for calculating an integer by rounding off the value of the symbol timing offset; a previous integer storage unit for storing the integer of a previous symbol timing offset; and an offset calculator for comparing a difference between the integer calculated by the integer calculator and the integer stored in the previous integer storage unit with the threshold value, updating the integer in the previous integer storage unit and outputting the integer of the value of the estimated symbol timing offset as an integer part and zero as a fraction part when the difference exceeds the threshold value, and outputting zero as an integer part and the fraction of the value of the estimated symbol timing offset as a fraction part when the difference does not exceed the threshold value.

<Desc/Clms Page number 15>
7. The OFDM receiving system of claim 6, wherein the offset calculator comprises: a comparator for comparing the difference between the integer calculated by the integer calculator and the integer stored in the previous integer storage unit with the threshold value; a truncator for truncating the fraction of the estimated symbol timing offset to generate an integer; a subtractor for subtracting the integer generated by the truncator from the value of the estimated symbol timing offset to calculate a fraction; a rounding unit for rounding off the value of the estimated symbol timing offset to extract an integer; and a multiplexer for selectively outputting the integer from the rounding unit and the fraction from the subtractor according to the result of comparison performed by the comparator.
8. The OFDM receiving system of claim 5,6 or 7, wherein the integer part is used for controlling an FFT start point, and the fraction part is used for controlling the frequency and phase of a sampling clock signal.
9. A method of estimating a symbol timing offset in a OFDM receiving system, substantially as hereinbefore described with reference to Figure 4 of the accompanying drawings.

<Desc/Clms Page number 16>
10. An OFDM receiving system, substantially as hereinbefore described with reference to Figures 2 and 3 of the accompanying drawings.