GB2359709B - Data processing system with an adjustable data/address channel framework - Google Patents
Data processing system with an adjustable data/address channel frameworkInfo
- Publication number
- GB2359709B GB2359709B GB0025565A GB0025565A GB2359709B GB 2359709 B GB2359709 B GB 2359709B GB 0025565 A GB0025565 A GB 0025565A GB 0025565 A GB0025565 A GB 0025565A GB 2359709 B GB2359709 B GB 2359709B
- Authority
- GB
- United Kingdom
- Prior art keywords
- data
- processing system
- address channel
- adjustable
- data processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 99122057 CN1129072C (en) | 1999-10-27 | 1999-10-27 | Data processing system with formulatable data/address tunnel structure |
Publications (3)
Publication Number | Publication Date |
---|---|
GB0025565D0 GB0025565D0 (en) | 2000-12-06 |
GB2359709A GB2359709A (en) | 2001-08-29 |
GB2359709B true GB2359709B (en) | 2002-08-14 |
Family
ID=5282273
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0025565A Expired - Fee Related GB2359709B (en) | 1999-10-27 | 2000-10-18 | Data processing system with an adjustable data/address channel framework |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN1129072C (en) |
GB (1) | GB2359709B (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4405277B2 (en) | 2004-02-16 | 2010-01-27 | 株式会社日立製作所 | Disk controller |
JP4441286B2 (en) * | 2004-02-10 | 2010-03-31 | 株式会社日立製作所 | Storage system |
US7467238B2 (en) | 2004-02-10 | 2008-12-16 | Hitachi, Ltd. | Disk controller and storage system |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4075608A (en) * | 1976-01-19 | 1978-02-21 | The United States Of America As Represented By The Secretary Of The Navy | Multiple-channel data switch |
US4604743A (en) * | 1984-11-21 | 1986-08-05 | North American Philips Corporation | Bus structure for an image processor |
WO1996041274A1 (en) * | 1995-06-07 | 1996-12-19 | Advanced Micro Devices, Inc. | Dynamically reconfigurable data bus |
US5734843A (en) * | 1995-06-07 | 1998-03-31 | Advanced Micro Devices Inc. | Reverse data channel as a bandwidth modulator |
US5790815A (en) * | 1995-11-20 | 1998-08-04 | Advanced Micro Devices, Inc. | Computer system having a multimedia bus and comprising a centralized I/O processor which performs intelligent byte slicing |
US5991824A (en) * | 1997-02-06 | 1999-11-23 | Silicon Graphics, Inc. | Method and system for simultaneous high bandwidth input output |
-
1999
- 1999-10-27 CN CN 99122057 patent/CN1129072C/en not_active Expired - Fee Related
-
2000
- 2000-10-18 GB GB0025565A patent/GB2359709B/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4075608A (en) * | 1976-01-19 | 1978-02-21 | The United States Of America As Represented By The Secretary Of The Navy | Multiple-channel data switch |
US4604743A (en) * | 1984-11-21 | 1986-08-05 | North American Philips Corporation | Bus structure for an image processor |
WO1996041274A1 (en) * | 1995-06-07 | 1996-12-19 | Advanced Micro Devices, Inc. | Dynamically reconfigurable data bus |
US5734843A (en) * | 1995-06-07 | 1998-03-31 | Advanced Micro Devices Inc. | Reverse data channel as a bandwidth modulator |
US5790815A (en) * | 1995-11-20 | 1998-08-04 | Advanced Micro Devices, Inc. | Computer system having a multimedia bus and comprising a centralized I/O processor which performs intelligent byte slicing |
US5991824A (en) * | 1997-02-06 | 1999-11-23 | Silicon Graphics, Inc. | Method and system for simultaneous high bandwidth input output |
Also Published As
Publication number | Publication date |
---|---|
GB2359709A (en) | 2001-08-29 |
CN1247343A (en) | 2000-03-15 |
GB0025565D0 (en) | 2000-12-06 |
CN1129072C (en) | 2003-11-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20041018 |