GB2227896A

GB2227896A - Analog-to-digital converter

Info

Publication number: GB2227896A
Application number: GB9002039A
Authority: GB
Inventors: Evan John Stanbury; Roger Neil Barker
Original assignee: Standard Telephone and Cables PLC
Current assignee: STC PLC
Priority date: 1989-02-03
Filing date: 1990-01-30
Publication date: 1990-08-08
Anticipated expiration: 2010-01-30
Also published as: GB2227896B; AU4695489A; GB9002039D0; AU623462B2

Abstract

To reduce the effect of conversion error in analog-to-digital conversion of an analog signal AD3 an analog time-variable auxiliary signal AD1 is generated and added to the analog signal AD3 to produce a combined analog signal. The combined analog signal is converted, 8, to a first digital signal, and a second digital signal representative of the corresponding value of the auxiliary signal is subtracted from the first digital signal to produce a third digital signal approximately representative of the analog signal AD3. Analog signal AD3 may represent current in an electrical power meter, multiplexer input AD2 of converter 8 receiving a voltage signal and microprocessor 6 calculating, e.g., the power. <IMAGE>

Description

DIGITAL CONVERTER This invention relates to digital conversion and embraces methods of reducing conversion errors in analog-todigital converters (A/D) and to converters utilising such methods.

For the sake of clarity the invention will be described in the context of the measurement of electrical quantities, such as in static AC electricity meters (i.e.

electricity meters without moving parts). Such meters typically measure signals in a frequency range 48-62Hz.

Various forms of conversion error can affect the accuracy of a digital-to-analog conversion, and some have significant effects at low input signal levels. The sources of error include: a) Quantising error; b) Differential non-linearity; c) DC offset; d) Gain Error; e) Signal slew rate Quantising error arises because the conversion output produces discrete steps so that a small change in amplitude or offset of a small input signal may result in a complete digital bit difference which is quite out of proportion to the input signals. This is most significant at low levels of input signal.

Differential non-linearity (DNL) results from the fact that in a practical A/D converter the size of the steps is not uniform so that a change in the input signal much larger or smaller than the nominal value is required to move between steps affected by DNL.

DC offset results from the effects of temperature variation to effectively provide a DC shift to the level of the quantising steps.

Slew rate errors result from the input signal crossing a bit boundary after sampling. Each A/D conversion takes a finite time.

Gain Error occurs where amplifiers in different meters have different gains so they produce differing readings in response to the same input signals. This may be corrected by software calibration in the factory.

An article in EDN, 5 February 1987, discusses the Gatti sliding scale technique to reduce the effects of Differential Non-Linearity in A/D conversion using a random analog offset signal produced from a first digital signal.

The analog offset signal is added to the input analog signal and passed through an A/D converter. The first digital signal is then subtracted from the output of the A/D converter. As will hereinafter be appreciated, their technique differs from a preferred technique in accordance with the present invention in that 1) a predictable waveform is used as the auxiliary signal, and 2) the analog auxiliary signal is converted to a digital form in the present invention. This has the advantage that the accuracy and speed of the D/A converter is unimportant in the present system but is crucial to the Gatti technique. The article also states that sample and hold circuits are necessary for the Gatti technique whereas in a further embodiment of the present invention, using an alternating sequence sampling technique, the need for sample and hold circuits can be eliminated.

Electricity meters must measure a number o f parameters and perform calculations on the measurements.

The main parameters measured are voltage (V) and current (I). From the measurements, instantaneous power can be calculated and integrated over time to give the amount of energy consumed in a period of time.

With the rotating disc meter these calculations are performed on a continuous basis using mechanical analog techniques. Again, as will be apparent from the following description of the present invention, use is made of digital electronic techniques in static meters. One of the problems which must be addressed is that there can be a very large dynamic range for the current, with a lesser dynamic range for the voltage. Typically the allowable tolerance for power measurements may be + 1% over a current range of 750mA to 100A. This requires a resolution of better than + 7mA AC to measure 750mA, while to measure 100A requires a dynamic range of + 141A. Voltage may vary + 20% from nominal (eg.

240V + 20%).

To produce the required dynamic range and accuracy the equivalent of a 15 bit linear analog to digital converter is required for current measurement. One problem is that for economical A/D converters (8 or 10 bits) the quantising error can become significant at low currents.

This may be made worse by Differential Non-Linearity (DNL) which results in "partially-missing" codes in the A/D converter.

DNL can be reduced by the use of a variable offset voltage which averages any errors over a number of A/D steps.

One method proposed for improving the resolution of an analog-to-digital converter is disclosed in the specification of Australian patent application 68113/87 by Oliver J.Nilsen (Australia) Ltd. That specification suggests that resolution may be improved by allowing a random signal of between 1/2 to lLSB of noise to remain unfiltered on the measurement signal. An alternative suggestion is to provide 1/2 LSB offset to the input signal.

Australian Patent No. 526634 (equivalent to EP 80300056.1) by the South Eastern Electricity Board discloses a system in which the timing signal is synchronised in phase with the incoming AC supply frequency.

Australian Patent No. 549301 discloses the use of a ramp voltage and time measurement in which one sample is taken per cycle of the ramp. This requires a linear ramp to estimate the time (and thus derive the voltage). Analog switches are used to obtain the signals and a high-speed A/D converter and considerable processing power are required.

According to the present invention there is provided a method of reducing the effect of conversion error in analog-to-digital conversion of a first analog signal comprising the steps of generating an analog time-variable auxiliary signal, adding the first analog signal and the auxiliary signal to produce a combined analog signal, converting a momentary value of the combined analog signal to a first digital signal, and deducting from the first digital signal a second digital signal representative of the value of the auxiliary signal at a point of time proximate to or coincident with the momentary value of the combined analog signal to produce a third digital signal approximately representative of the first analog signal.

In a particular embodiment of the invention there is provided an analog-to-digital converter in which digitising errors are reduced by superimposing on an analog signal a time variable auxiliary waveform whose voltage-time characteristic is known or measured, sampling the combined signals, converting the samples to digital format and deducting from the digital signal a value corresponding to the amplitude of the offset waveform measured immediately before or after or at the same time the sample was taken.

This allows the use of cheaper circuitry than other "openloop" designs where the offset voltage is not measured.

Further embodiments may incorporate one or more of the following features: the offset voltage waveform may be variable to decrease in amplitude as the measured parameter increases, effectively increasing the dynamic range for large-amplitude signals; the offset waveform could be any continuous waveform, for example a triangular waveform; the sampling rate may be much higher than the frequency of the offset waveform; the amplitude of the offset waveform could be several times the equivalent of 1LSB.

the offset waveform allows an analog to digital converter controlled by a microprocessor to simulate a converter with much higher resolution, but at the expense of speed.

The present invention has advantages in relation to the prior art in that because of the improved accuracy of the cheaper A/D converter, no range changing circuitry is required, thus giving further cost advantages. This in turn simplifies calibration as only one range needs to be calibrated.

In a particular application of the invention the A/D converter is used to produce a signal representative of current consumption in an AC power meter. This is multiplied by a signal representing the voltage. The voltage wave is usually a good approximation of a sine wave but the current waveform may be noisy. However, when any signal is multiplied with a sine wave all signals not at the frequency of the sine wave are cancelled. Hence the noise on the current signal is cancelled.

By way of example, the present invention will now be described with reference to the accompanying drawings in which: Figure 1 shows a block schematic diagram of an electricity meter embodying the present invention; and Figure 2 is a more detailed circuit diagram of the meter shown schematically in Figure 1.

In Figure 1 an AC supply is applied through terminal 1 to load 9 connected to terminal 2 and neutral terminal 5 so that the load current flows through a first current sensor 3. Voltage sensor 4 produces a signal representative of the voltage between the AC input at terminal 1 and the neutral terminal 5. A microprocessor 6 includes a digital-to-analog converter 7 to produce an auxiliary waveform which is applied to A/D converter 8 and which is added to the output of current sensor 3. The analog-to-digital (A/D) converter 8 converts samples from the current sensor 3 and voltage sensor 4 to digital signals.

As shown in Figure 2, the voltage sensor 4 of Figure 1 comprises a potential divider consisting of resistors R1/R2/R3 having an output V1. The resistors are ohmically scaled so that output voltage V1 is at an appropriate level for the microprocessor 6 (e.g. 2.5V DC + 1.SVrms) at the specified maximum operating voltage (e.g.

240V + 20%). The resistor R1 is connected to the AC input terminal 1 while the resistors R2/R3 are connected to 5V DC to provide a DC offset voltage for the converter. Thus voltage V1 is representative of the line voltage and is applied to one multiplexer input AD2 of the A/D converter 8 contained in microprocessor 6. Reference voltage generator 10 provides a reference voltage for A/D conversion.

The current sensor 3 may comprise a current transformer whose output drives a resistor R4. One side of resistor R4 is connected to the auxiliary waveform derived from the converter 7 so the voltage across R4 comprises a component due to the line current on which is superimposed the auxiliary waveform. The voltage across resistor R4 is applied to a further multiplexer input AD3 of the A/D converter 8. The A/D converter may take in excess of 600 us to sample each input.

The auxiliary waveform is generated by the microprocessor 6 via the D/A converter 7. The offset voltage is controlled by the microprocessor 6 by manipulation of the D/A output value. The D/A converter arrangement may comprise an eight bit pulse width modulation output (PWM) with a filter. In the present embodiment the PWM may have an output in the KHz region.

The microprocessor may be programmed to vary the amplitude or frequency of the auxiliary waveform in accordance with the input signal representative of the load current.

The offset voltage must be compatible with the microprocessor input which generally will accept an input range of 0 to 5v. Thus the offset is centred around -2.5v and may have a frequency of 1/60 Hz but lower frequencies e.g. 1/500 Hz may be used. The median value for the offset is achieved by the potential divider made of equal resistors R8 and R9 between supply voltage (5v) and earth. The ratio of resistors R10 and R8 selects the peak amplitude of the offset voltage (+ 0.2v in one version).

Because the auxiliary waveform has a much lower frequency than the PWM output, a simple RC filter using resistor R10 capacitor C4 is sufficient to reduce PRvl noise on offset voltage to less than the PWM output step.

If an eight bit D/A converter 7 is used then the + 0.2v range of output voltages can be achieved in 256 steps.

The step size should be a non-integral multiple of the A/D step size, as this improves the effective accuracy, even for an ideal A/D converter with no DNL (Differential Non Linearity).

The auxiliary waveform is fed back to the microprocessor 6 via multiplexer input AD1 of the analog-todigital converter 8. Thus the microprocessor can monitor the auxiliary waveform and subtract it from the voltage and current samples so that it does not show up in the meter readings. Therefore stability of the PWM output, and resistors R8/R9/R10 is not critical despite temperature ranges of -400C to +700C.

In an alternative embodiment two voltage samples representing two voltages 1800 out of phase are measured utilising a common offset voltage, and multiplied by two corresponding currents. This type of supply arrangement is standard in the USA.

In a further embodiment, three voltage samples are taken, and multiplied by three corresponding currents measured using a common offset supply. This type of supply arrangement is standard for industrial and commercial premises.

The operation of the auxiliary waveform will now be described.

Suppose the input signal representing the current is I (the voltage across R4) and the instantaneous auxiliary waveform is F. Thus the instantaneous analog input signal to input AD3 is I + F. The converter 8 produces a digital output representing I + F approximated to ten bits in one embodiment. Similarly converter 8 produces in response to analog input F a digital output representing F approximated to ten bits. The processor 6 calculates the difference between the outputs of converter 8 in response to inputs AD3 and AD1 (i.e. (I + F) - F = 1).

However, in practice each A/D converter input has an undesirable DC offset which affects all readings. Let this offset be f (which may be temperature dependent).

Therefore input AD3 actually is I + F + f and input AD1 is F + f so that both F and f are cancelled by the processor 6.

Thus this technique also substantially eliminates the DC offset.

The auxiliary waveform improves low level readings in the following manner.

Consider an ideal A/D converter with no DNL. All A/D steps are identical in size e.g. 5mV. A sine wave of 2mV p-p would register as 0 amplitude if it fell between two steps or 5mV if it fell right on a bit boundary. Thus the error can range from -100% to +80%. If, however, an offset ramp is added to the sine wave then 40% of the time it will have an amplitude of 0, and 60% of the time it will have some amplitude up to a maximum of 5mV. If a large number of such samples are averaged the results can be made to approximate the correct reading within allowable tolerances.

If the offset voltage step is an exact sub-multiple of the A/D step (e.g. 1/4) there will be four different values to average. However, if it is not a sub-multiple a larger number of different values to average will result whereby a more accurate result is achieved.

For a real A/D converter with -0.5 to +2 LSB of DNL, if a signal of 30 mV P-P is being sampled and it falls mostly in a single bit which has a DNL of +2 (i.e. 15mV wide rather than 5mV), the amplitude may be read as 20mV P-P i.e.

30% error. By changing the offset voltage + 0.2v, the signal will sometimes fall in a bit with + 2 DNL and sometimes in a bit with -0.5 DNL. Thus the errors will tend to average out giving a more accurate result than meters which leave the input on the same bit. By averaging over sixty four LBS's DNL can be reduced by a factor of eight to twelve resulting in an improvement of three bits of resolution.

In one implementation, the analog-to-digital converters do not use sample/hold amplifiers. To reduce the effects of the delay between samples the sequence in which the current and voltage are sampled may be alternated on successive samples, as further discussed in Provisional Patent PJ 3471.

The A/D converter 8 may include a time multiplex switch so that the inputs can be sampled in sequence. The sequence can be alternated under the control of the processor 6 to reduce slew rate errors.

It is possible to extract the current signal by multiplying it with a sine and cosine function. However the voltage signal must also be extracted the same way to determine the phase and amplitude accurately. This gives the real and imaginary components of the current, which allows calculation of KWh (real power), KVAR (imaginary power) and VA (a measure relating to the cost of distribution).

However, the samples must be synchronised to the frequency of the AC signal, as sampling a partial waveform causes errors.

A more sophisticated scheme is to use a Fast Fourier Transform (FFT) which not only extracts fundamental, but also harmonic power.

Theoretically it is possible to reduce the number of voltage samples which need to be taken by taking one voltage sample for several cycles and then using sinusoidal function to calculate the instantaneous voltage corresponding to the several current samples taken per sample. However, this relies on several assumptions including the frequency stability of the mains supply and the purity of the mains waveform. In some areas the mains supply may have a significant harmonic content and there is the possibility that a voltage spike could corrupt the voltage sample and bias all readings calculated from it.

The frequency stability question may be resolved if the circuit incorporates a zero crossing detector to provide a reference point for the sinusoidal function.

The invention is applicable to A/D converters generally to reduce conversion errors particularly at the low amplitude input signals. However, a particularly useful field of interest as shown by the specific is in the area of current measurement in electricity power supply meters.

Claims

CLAIMS:

1. A method of reducing the effect of conversion error in analog-to-digital conversion of a first analog signal comprising the steps of generating an analog timevariable auxiliary signal, adding the first analog signal and the auxiliary signal to produce a combined analog signal, converting a momentary value of the combined analog signal to a first digital signal, and deducting from the first digital signal a second digital signal representative of the value of the auxiliary signal at a point of time proximate to or coincident with the momentary value of the combined analog signal to produce a third digital signal approximately representative of the first analog signal.

2. A method as claimed in claim 1, wherein the second digital signal is produced by an analog-to-digital conversion of the auxiliary signal.

3. A method as claimed in claim 1 or claim 2, wherein a plurality of values of the third digital signal are obtained and averaged.

4. A method as claimed in claim 3, wherein the value of the second digital signal is obtained on succeeding repetitions alternatively immediately before or immediately after the instantaneous value of the combined analog signal.

5. A method as claimed in any one of claims 1 to 4, including the step of varying the auxiliary signal in response to the third digital signal.

6. A method of reducing the effect of quantisation error in analog-to-digital conversion of a first analog signal as herein described with reference to the accompanying drawings.

7. A digital-to-analog converter employing the method of any one of claims 1 to 6.

8. An analog-to-digital converter comprising an auxiliary signal generator to generate an analog, timevariable auxiliary signal, analog adder means to add the auxiliary signal to an input signal to produce a combined analog signal, first A/D converter means connected to the output of the adder means to produce a first digital signal representative of the momentary value of the combined analog signal at a selected point in time, second A/D converter means to convert the auxiliary signal to a second digital signal at a point in time proximate to or coincident with the selected point in time and digital subtraction means to subtract the second digital signal from the first digital signal.

9. An analog-to-digital converter as claimed in claim 8, wherein the first and second A/D converter means are replaced by a single further A/D converter means and the combined analog signal and the auxiliary signal are applied to the further A/D converter in sequence via a time controlled switch.

10. An analog-to-digital converter as claimed in claim 9, wherein the sequence is alternated.

11. An analog-to-digital converter as claimed in any one of claims 8 to 10, wherein auxiliary signal is a continuous waveform and the generator is controlled by control means to vary the amplitude and/or frequency of the waveform in response to a third digital signal.

12. An analog-to-digital converter as claimed in claim 11, wherein the control means causes the amplitude of the offset waveform to increase for low values of the third digital signal.

13. An analog-to-digital converter as claimed in any one of claims 8 to 12, wherein the generator includes a pulse width modulator and a filer.

14. An analog-to-digital converter as claimed in any one of claims 8 to 13, including processing means to average a plurality of values of the third digital signal.

15. An analog-to-digital converter as herein described with reference to the accompanying drawing.

16. An electrical power meter in which the current is measured by the method of any one of the claims 1 to 6.

17. An electrical power meter including means to produce a signal representative of the line current and wherein this current signal is converted to a digital signal in a converter as claimed in any one of the claims 7 to 15.

18. A power meter as claimed in claim 17, including voltage measuring means to measure the line voltage and further processor means to calculate consumption information from the measured voltage and current.

19. A power meter as claimed in claim 18, wherein the voltage is sinusoidal and wherein the noise on the current signal is cancelled as a result of multiplication of the current signal by the voltage signal.

20. An electrical power meter substantially as herein described and as shown in the accompanying drawings.

20. An electrical power meter as herein described with reference to the accompanying drawings.

Amendments to the claims have been filed as follows

1. A method of reducing the effect of conversion error in analog-to-digital conversion of a first analog signal comprising the steps of generating an analog timevariable auxiliary signal, adding the first analog signal and the auxiliary signal to produce a combined analog signal, converting a momentary value of the combined analog signal to a first digital signal, and deducting from the first digital signal a second digital signal representative of the value of the auxiliary signal at a point of time proximate to or coincident with the momentary value of the combined analog signal to produce a third digital signal approximately representative of the first analog signal, the second digital signal being produced by an analog-todigital conversion of the auxiliary signal.

2. A method as claimed in claim 1, wherein the generation of the analog time-variable auxiliary signal includes the step of converting a digital signal to analog form in a D/A converter means in which the quantisation step size of the D/A converter means is a non-integral multiple of the quantisation step size of the analog-to-digital conversion of the auxiliary signal.

4. A method as claimed in claim -3, wherein the value of the second digital signal is obtained on succeeding repetitions alternatively immediately before or immediately after the instantaneous value of the combined analog signal.

6. A method of reducing the effect of quantisation error in analog-to-digital conversion of a first analog signal substantially as herein described with reference to the accompanying drawings.

7. A digital-to-analog converter employing the method of any of claims 1 to 6.

8. An analog-to-digital converter comprising an auxiliary signal generator to generate an analog, timevariable auxiliary signal, analog adder means to add the auxiliary signal to an input signal to produce a combined analog signal, an A/D converter means connected via a controlled switch means to the output of the adder means and to the output of the auxiliary signal generator to sequentially convert the combined analog signal into a first digital signal at a selected point in time, and to convert the auxiliary signal to a second digital signal at a point in time proximate to or coincident with the selected point in time and digital subtraction means to subtract the second digital signal from the first digital signal.

9. An analog-to-digital converter as claimed in claim 8 further including a digital-to-analog converter means wherein the quantisation step size is a non-integral multiple of the quantisation step size of the A/D converter means.

10. An analog-to-digital converter as claimed in claim 8 or 9, wherein the sequence is alternated.

11. An analog-to-digital converter as claimed in any one of claims 8 to 10, wherein the auxiliary signal is a continuous waveform and the generator is controlled by control means to vary the amplitude and/or frequency of the waveform in response to a third digital signal.

13. An analog-to-digital converter as claimed in any one of claims 8 to 12, wherein the generator includes a pulse width modulator and a filter.

14. An analog-to-digital converter as claimed in any one of claims 11,12, or 13 as dependent on claim 11 or claim 12, including processing means to average a plurality of values of the third digital signal.

15. An analog-to-digital converter substantially as herein described and as shown in the accompanying drawings.