GB2171544A - Switch reading circuit - Google Patents
Switch reading circuit Download PDFInfo
- Publication number
- GB2171544A GB2171544A GB08504342A GB8504342A GB2171544A GB 2171544 A GB2171544 A GB 2171544A GB 08504342 A GB08504342 A GB 08504342A GB 8504342 A GB8504342 A GB 8504342A GB 2171544 A GB2171544 A GB 2171544A
- Authority
- GB
- United Kingdom
- Prior art keywords
- switch
- outputs
- gates
- exclusive
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H9/00—Details of switching devices, not covered by groups H01H1/00 - H01H7/00
- H01H9/16—Indicators for switching condition, e.g. "on" or "off"
- H01H9/167—Circuits for remote indication
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/18—Modifications for indicating state of switch
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
- H03K5/1534—Transition or edge detectors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M11/00—Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
- H03M11/02—Details
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
A circuit for reading the position of a multichannel switch (1) has a detecting means made up of several exclusive-OR gates (6, 7, 8) which detects a change in the state of any one of the outputs (2, 3, 4, 5). The detecting means, upon detection of such a change, produces a signal indicative of such a change which is passed to a reading means (11) which then reads the position of the switch (1). <IMAGE>
Description
SPECIFICATION
Switch reading circuit
This invention relates to a circuit for reading the position of a switch. More particularly it relates to such a circuit for reading the position of a multichannel switch of the binary coded type. This type of switch has several outputs, normally four, each of which can be changed between either a high or a low state, the switch position being coded by the states of the outputs.
A problem which arises with this kind of switch is that the outputs of the switch do not change state simultaneously, indeed an appreciable delay may occur before a desired output changes state. If then, the position of the switch is read before all of the outputs have changed state, this can lead to misinterpretation of the switch status.
It is therefore, an object of the present invention to provide a circuit for reading the position of a switch, which will ensure that the switch position will be read after the final output has changed state, this position then being the final, desired position of the switch.
Accordingly, the invention provides a circuit for reading the position of a switch having a plurality of outputs each having one of a plurality of states, the circuit comprising means for detecting a change in the state of any one of the switch outputs and producing a signal indicative of such a change and means for reading the states of all the outputs and thus the position of the switch upon reception of the signal indicative of a change of state of one of the outputs.
Preferably, the detecting means comprises a logic circuit which is connected to the outputs of the switch and which provides a signal when any one of the outputs changes state, the logic circuit conveniently comprising one or more exclusive-OR gates.
In a preferred embodiment of the invention, the switch is a binary coded switch which preferably has a set of four outputs, the number of exclusive-OR gates in the logic circuit then being three.ln this case two of the switch outputs are connected to the respective inputs of one of the exclusive-OR gates, the other two outputs being connected to the respective inputs of another of the gates and the output from these two gates providing the inputs to the third gate whose output then gives a signal indicative of a change of state of any one of the switch outputs.
In an alternative embodiment, there may be more than one set of switch outputs, in which case the logic circuit will comprise more than one set of three exclusive-OR gates and one or more further exclusive-OR gates to combine the signals from the sets of exclusive-OR gates.
A still further exclusive-OR gate may be incorporated in the circuit between the logic circuit and the reading means when the circuit is used in a transceiver. This further gate then has one of its inputs connected to the output of the logic circuit and the other input connected to a receive/ transmit line. The signal indicating a change of state of one of the switch outputs is then produced by this further exclusive-OR gate as long as the receive/transmit line has remained constant and the signal is passed to the reading means. A similar signal is also produced by this gate if all of the switch outputs remain constant but if the receive/transmit line is changed from receive to transmit or vice versa. In this case, the reading means will again read the position of the switch.
One example of a circuit according to the invention will now be more fully described with reference to the drawing which shows a diagram of the circuit when used in a transceiver.
Thus, the drawing shows a circuit which reads the position of a switch every time the outputs of the switch are changed. The switch 1 is a binary-coded switch having four outputs 2, 3, 4, 5. Two of the outputs 2, 3 are connected to the inputs of one exclusive-OR gate 6 and the other two outputs 4, 5 form the inputs to a second exclusive-OR gate 7.
The outputs of these two gates 6, 7 provide the inputs to a third exclusive-OR gate 8 whose output forms one input to a final exclusive-OR gate 9. The other input to the final gate 9 is the receive-transmit line 10.
The output of the final gate 9 provides a signal to a reading means 11 which then reads the position of the switch 1 and provides a signal indicative of the position of the switch.
The action of each of the exclusive-OR gates is such that if one of its inputs changes state, then its output changes state. Therefore, when the switch position is changed, one or more of its outputs 2, 3, 4, 5 change state. When one of the outputs 2, 3, 4, 5 changes state, then either gate 6 or gate 7 will receive a changed input and thus produce a changed output. This will then produce a changed output from gate 8 and, providing the receive/transmit line 10 remains constant, the output from gate 9 produces a signal indicating that one of the outputs 2, 3, 4, 5 has changed. This signal is received by the reading means 11 and causes it to read the new position of the switch 1.
It will be apparent that if more than one of the outputs of the switch are changed, then the reading means will read the position of the switch more than once, since the outputs do not change simultaneously, and that the final reading will be the correct one.
Furthermore, if the position of the switch 1 has not been changed but the receive/transmit line 10 has been switched from receive to transmit or vice versa then one of the inputs to the gate 9 is changed and again the gate produces a signal which is received by the reading means 11 and causes it to read the position of the switch 1.
Claims (8)
1. A circuit for reading the position of a switch having a plurality of outputs each having one of a plurality of states, the circuit comprising means for detecting a change in the state of any one of the switch outputs and producing a signal indicative of such a change, and means for reading the states of all the outputs, and thus the position of the switch, upon reception of the signal indicative of a change of state of one of the outputs of the switch.
2. A circuit according to claim 1 wherein said detecting means comprises a logic circuit which is connected to the outputs of the switch and which provides a signal when any one of the outputs changes state.
3. A circuit according to any preceding claim wherein said switch is a binary coded switch.
4. A circuit according to any preceding claim wherein said logic circuit comprises one or more exclusive-OR gates.
5. A circuit according to claim 4 wherein said switch has a set of four outputs and the logic circuit comprise a set of three exclusive
OR gates, two of the switch outputs being connected to the respective inputs of one of the gates, the other two outputs being connected to the respective inputs of another of the gates and the outputs of these two gates forming the respective inputs to the third gate.
6. A circuit according to claim 5 wherein said switch has two or more such sets of outputs, the logic circuit comprises a set of three exclusive-OR gates for each set of four switch outputs and one or more further exclusive-OR gates combining the outputs from each set of three gates so as to provide a final output signal indicative of a change of state of any one of the switch outputs.
7. A circuit according to any one of claims 2 to 6 for use in a transceiver further comprising a further exclusive-OR gate between said logic circuit and said reading means, the inputs to the further exclusive-OR gate being the output from the logic circuit and a receive/ transmit line, the output from the further exclusive-OR gate providing said signal indicative of a change of state of one of the outputs of the switch, which signal is passed to the reading means.
8. A circuit for reading the position of a switch substantially as hereinbefore described with reference to the accompanying drawing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08504342A GB2171544A (en) | 1985-02-20 | 1985-02-20 | Switch reading circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08504342A GB2171544A (en) | 1985-02-20 | 1985-02-20 | Switch reading circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8504342D0 GB8504342D0 (en) | 1985-03-20 |
GB2171544A true GB2171544A (en) | 1986-08-28 |
Family
ID=10574786
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08504342A Withdrawn GB2171544A (en) | 1985-02-20 | 1985-02-20 | Switch reading circuit |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2171544A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997025729A1 (en) * | 1996-01-11 | 1997-07-17 | Fusion Meters Limited | Switch status sensor |
EP1703530B1 (en) * | 2005-03-16 | 2012-11-14 | Rockwell Automation Germany GmbH & Co. KG | Circuit arrangement and method for indicating the status of one of plurality of switches connected in series to a safety relay |
EP2775312A3 (en) * | 2013-03-04 | 2016-12-07 | Phoenix Contact GmbH & Co. KG | Switching assembly |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1038709A (en) * | 1963-04-04 | 1966-08-10 | Gen Signal Corp | Improvements in and relating to communication systems |
GB1312766A (en) * | 1970-04-08 | 1973-04-04 | Brookhurst Igranic Ltd | Information input apparatus for data utilization systems |
GB1508730A (en) * | 1975-12-22 | 1978-04-26 | Ericsson Telefon Ab L M | Transferring asynchronously altering data words |
GB1582614A (en) * | 1977-08-11 | 1981-01-14 | Caterpillar Tractor Co | Data transmission system |
-
1985
- 1985-02-20 GB GB08504342A patent/GB2171544A/en not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1038709A (en) * | 1963-04-04 | 1966-08-10 | Gen Signal Corp | Improvements in and relating to communication systems |
GB1312766A (en) * | 1970-04-08 | 1973-04-04 | Brookhurst Igranic Ltd | Information input apparatus for data utilization systems |
GB1508730A (en) * | 1975-12-22 | 1978-04-26 | Ericsson Telefon Ab L M | Transferring asynchronously altering data words |
GB1582614A (en) * | 1977-08-11 | 1981-01-14 | Caterpillar Tractor Co | Data transmission system |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997025729A1 (en) * | 1996-01-11 | 1997-07-17 | Fusion Meters Limited | Switch status sensor |
US6255748B1 (en) | 1996-01-11 | 2001-07-03 | Fusion Meters Limited | Switch status sensor |
EP1703530B1 (en) * | 2005-03-16 | 2012-11-14 | Rockwell Automation Germany GmbH & Co. KG | Circuit arrangement and method for indicating the status of one of plurality of switches connected in series to a safety relay |
EP2775312A3 (en) * | 2013-03-04 | 2016-12-07 | Phoenix Contact GmbH & Co. KG | Switching assembly |
Also Published As
Publication number | Publication date |
---|---|
GB8504342D0 (en) | 1985-03-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4542420A (en) | Manchester decoder | |
US3967062A (en) | Method and apparatus for encoding data and clock information in a self-clocking data stream | |
US5986590A (en) | Antenna system | |
EP0735685A3 (en) | Programmable power reduction circuit for programmable logic device | |
TW272344B (en) | System and method that provides simultaneous, bidirectional transfer of signals between integrated circuit devices | |
GB1380167A (en) | Code converters | |
GB1249364A (en) | Data transmission | |
KR870009296A (en) | Extended Bit Slice Processor Arithmetic Logic Unit | |
GB2171544A (en) | Switch reading circuit | |
US4631695A (en) | Detector of predetermined patterns of encoded data signals | |
US4439729A (en) | Evaluation circuit for a digital tachometer | |
JP3326137B2 (en) | Series communication interface circuit | |
KR930015432A (en) | moderator | |
US3349177A (en) | System for transmitting pulse code groups or complements thereof under conmtrol of inependent binary signal | |
US4231023A (en) | Binary to ternary converter | |
JPS56116349A (en) | Information transmission system | |
GB1115894A (en) | Digital transmission system | |
EP0294614B1 (en) | m bit to n bit code converting circuit | |
SU1272334A1 (en) | Device for coding edge one | |
KR920002745Y1 (en) | System for high-speed and rotation | |
KR930003415B1 (en) | Parallel data out-put circuit | |
JPH0332137A (en) | Signal transmitter | |
KR950014995B1 (en) | Data buffer enable circuit | |
SU1389008A2 (en) | Device for receiving bipulsed signal | |
SU902294A1 (en) | Device for shaping quasiternary sequence |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |