GB2116406A

GB2116406A - Pulse code-transmitting apparatus

Info

Publication number: GB2116406A
Application number: GB08302771A
Authority: GB
Inventors: Yutaka Mizuno; Hanzo Tsuzuki
Original assignee: Casio Computer Co Ltd
Current assignee: Casio Computer Co Ltd
Priority date: 1982-02-26
Filing date: 1983-02-01
Publication date: 1983-09-21
Also published as: JPS58147247A; GB2116406B; GB8302771D0; DE3305717C2; DE3305717A1

Abstract

A pulse code-transmitting apparatus wherein a switching circuit (27) has its operation controlled in accordance with the contents of binary series transmission data, and, when closed, allows for the passage of an output high frequency signal from an oscillator (28), the high frequency signal is superposed on an output A.C. signal from a commercial A.C. line in a transformer (15), and a pulse code is transmitted through the commercial A.C. line to various electronic devices. <IMAGE>

Description

SPECIFICATION Pulse code-transmitting apparatus This invention relates to a pulse code transmitting apparatus designed to convert binary data into pulse codes for transmission to another electronic device, and more particularly to a pulse code-transmitting apparatus which is designed to transmit binary series data in a state superposed on a commercial D.C. line for supplying power to an electronic device.

To date, electronic devices have been connected by a 2 or 3 line cable to transmit binary data converted into pulse codes across electronic devices by the inline system. As shown in Fig. 1, the plugs 2a, 2b, 2c of, for example, a plurality of electronic registers 1 a, 1 b, 1 c are connected to the corresponding plug sockets 3a, 3b, 3c connected to a commercial D.C. line L to receive power. The electronic registers 1 a, 1 b, 1 c are connected to a distributor 4 through the corresponding cables 11, 12, 13. The distributor 4 is connected to a host computer through a cable 10.

Output data from the electronic registers 1 a, 1 b, 1 c are supplied to the host computer through the cables 11, 12, 13, 10. As described above, transmission of binary data across electronic devices has to be effected by providing exclusive cables 11, 12, 13, 10, resulting in the drawbacks that the operation of a whose system must be delayed for the period required to lay said exclusive cables, and further, large expenses are incurred in the construction work and the procurement of materials.

It is accordingly the object of this invention to provide a novel pulse code-transmitting apparatus which is free from the aforementioned drawbacks accompanying the conventionai type and designed to transmit series binary data through a commercial D.C. line for supplying power to electronic devices.

To attain the above-mentioned object, this invention provides a pulse code-transmitting apparatus which comprises: means for oscillating a high frequency signal; switching means whose operation is controlled according to the contents of binary series data supplied, and which, when closed, allows for the passage of a high frequency signal issued from said oscillation means; and means for superposing a high frequency signal sent forth from said oscillation means through the switching means on an A.C. voltage signal supplied from a commercial A.C. source.

A pulse code-transmitting apparatus embodying this invention which is arranged as described above has the advantages that binary series data can be transmitted in a state superposed on a commercial A.C. voltage signal, thereby eliminating the necessity of laying a data transmission cable as has been the case in the past, and consequently saving wiring work; data can be transmitted as soon as an electronic device is installed; and appreciable saving is effected in the cost of construction and materials.

This invention can be more fully understood from the following detailed description when taken in conjunction with the accompanying drawings, in which: Fig. 1 shows the wiring arrangement of an inline system of the conventional electronic register; Fig. 2 indicates the wiring arrangement of an inline system of an electronic register embodying this invention; Fig. 3 is a schematic block circuit diagram of the pulse code-transmitting apparatus of the invention used with an electronic register; and Figs. 4A to 4H show waveforms illustrating the operation of the pulse code-transmitting apparatus of the invention.

Description will now be given with reference to Figs. 2, 3 and 4A to 4H of a pulse codetransmitting apparatus embodying this invention.

Fig. 2 illustrates an inline system by which data is transmitted between a host computel (not shown) and each of the aforesaid electronic registers 1 a, 1 b, 1 c. In this case, the electronic register 1 a, 1 b, 1 c are electrically connected to a commercial A.C.

line L by fitting the corresponding plugs 2a, 2b, 2c into the sockets 3a, 3b, 3c. The host computer is also electrically connected to the commercial A.C.

line L. This commercial A.C. line L allows for power supply to the electronic registers 1 a, 1 b, 1 c and host computer, and also transfer of data across said electronic registers 1 a, 1 b, 1 c and host computer.

Fig. 3 is a schematic block circuit diagram of each of the electronic registers 1 a, 1 b, 1 c. Output voltage from the commercial A.C. line is impressed on a primary coil of a transformer 11 through the corresponding plug and power supply cord 35. Output reduced voltage from a secondary coil of the transformer 11 is impressed on a regulated power supply circuit 12. This regulated power supply circuit 1 2 holds input voltage at a prescribed D.C. voltage to the electronic registers set on the left side of said regulated power supply circuit 12. The power supply cord 35 is also connected to a primary winding of a transformer 1 5 through capacitors 13, 14.Reference numeral 1 7 denotes a central processing unit (CPU), which is supplied with signals resulting from the operation of the various keys provided in an input section 18, and carries out processing in accordance with the contents of a key code received CPU 1 7 delivers data to a display section 19 and also to a printing section 20, thereby enabling display and printing to be effected by the corresponding sections 19, 20. Data is transferred across CPU 17 and memory section 21, causing required data to be written in the memory section 21. CPU 17 further supplies a data buffer 22 with operation data consisting of 4-bit or 8-bit parallel signals and transmission data, and reads data out of the data buffer 22.Operation data written in the data buffer 22 is transmitted to a control register 23 formed of a control buffer and decoder (neither shown). Transmission data is delivered to a transmission data resistor 24. Data stored in the transmission register 24 is supplied to a parallelseries changeover circuit 25. Output binary series data from the later described wave-shaping circuit 33 is delivered to series-parallel changeover circuit 26, and, after being converted into the parallel form, is stored in a received data register 34. Data stored in said register 34 is read out to CPU 17 through the data buffer 22.Depending on the contents of the operation data received, the control register 23 sends forth either a signal CSl for specifying the operation of the parallel series changeover circuit 25 or a signal CSII for specifying the operation of the series-parallel changeover circuit 26. While receiving the signal CSI, the parallel-series changeover circuit 25, converts parallel data received into series data, and issues binary series data.

An output high frequency signal from an oscillator 28 is supplied to an amplifier 29. A high frequency signal amplified by said amplifier 29 is delivered to a switch 27 formed of, for example, a transistor, whose gate is supplied with an output binary series signal from the parallel-series changeover circuit 25. Thus the switch 27 is rendered conducting or nonconducting according to whether the binary series signal has a logic level "1" or "O". The output terminal of the switch 27 is connected to the changeover circuit 1 6. This changeover circuit 1 6 is formed of switching means such as a transistor or relay and determines the transmission or reception of a signal according to the contents of a changeover signal CSW. At transmission, the contacts 16a, 1 6b of said changeover circuit 1 6 are connected.

The contact 1 6a is connected to one end of the secondary winding of the transformer 15, the other end of which is grounded.

A signal received through the secondary side of the transformer 1 5, that is, a signal formed of a high frequency signal superposed on a commercial low frequency signal is supplied to a filter 30 through the contacts 1 6a, 1 6c of the changeover circuit 1 6. The filter 30 eliminates the commercial iow frequency signal and allows for the passage of a high frequency signal to an amplifier 31. A high frequency signal amplified by the amplifier 31 is sent forth to a rectifier 32. A high frequency signal converted into a rectangular signal having a prescribed volage level by said rectifier 32 is sent forth to a wave shaper 33. This wave shaper 33 shapes an input rectangular signal, and supplies binary series data to the series-parallel changeover circuit 26.

Description will now be given with reference to Figs. 2 and 3 of the operation of a pulse codetransmitting apparatus embodying this invention.

The plugs 2a to 2c of the electronic registers 1 a to 1 c are connected to the corresponding sockets 3a to 3c of the commercial A.C. line L. For convenience, description will now be given with reference to Fig. 3 of the electronic register 1 alone. Commercial A.C. voltage is impressed on the circuits of the electronic register 1 through the regulated power supply circuit 12. Now let it be assumed that under this condition, data is supplied to the host computer connected to the commercial A.C. line L. When the operator actuates any of the keys provided in the input section 18, operation data is delivered from CPU 1 7 to the data buffer 22. The operation data is written in the control register 23.At this time, a changeover signal CSW is supplied from the control register 23 to the changover circuit 1 6. As a result, the contacts 1 6a, 1 6b of said changeover circuit 1 6 are electrically connected together, thereby bringing about a condition allowing for the transmission of a signal. Further, a signal CS is issued to specify the parallel-series changeover circuit 25, causing the electronic register 1 a to be set at a signal-transmitting condition. Later, CPU 1 7 issues parallel transmission data having a prescribed number of bits. This transmission data is delivered to the parallel-series changover circuit 25 through the data buffer 22 and transmission data register 24.The parallel-series changeover circuit 25 converts input parallel transmission data into binary series transmission data shown in Fig.

4A, and supplies said converted data to the switch 27. While the received transmission data retains a logic level "1", the switch 27 is rendered conducting. A high frequency signal issued from the oscillator 28 during the period of said conduction is supplied to the changeover circuit 1 6 (Fig. 4B) through the amplifier 29 and switch 27. After passing through the contacts 1 6b, 1 6a of the changeover circuit 1 6, the high frequency signal is supplied to the secondary coil of the transformer 1 5. The high frequency signal passing through the switch 27 is superposed as shown in Fig. 4D on the commercial A.C. voltage signal (Fig.

4C) supplied to the transformer 1 5 through the capacitors 13, 14 (Fig. 4D). The superposed high frequency signal is sent forth to the host computer through the power supply cord 35, plug and commercial A.C. line L.

Description will now be given of the case where a transmission signal (Fig. 4D) is received from the host computer through the commercial A.C. line.

In this case, output operation data issued from CPU 17 passes through the data buffer 22 and control register 23 to cause the changeover circuit 1 6 to be actuated through the contact 1 6c in place of the contact 1 6a, thereby specifying the series-parallel changeover circuit 26. As a result, a commercial A.C. signal on which a high frequency signal is superposed through the commercial A.C.

line is supplied to the filter 30 through the capacitors 1 3, 14 transformer 1 5 and changeover circuit 1 6. The filter 30 shuts off a commercial A.C. signal and supplies a high frequency signal (Fig. 4E) to the amplifier 31. The amplifier 31 amplifies a received high frequency signal as shown in Fig. 4F. The amplified high frequency signal is supplied to the rectifier 32, which rectifies the amplified high frequency signal as shown in Fig. 4G. The rectified signal is delivered to the wave shaper 33. A signal (Fig. 4H) whose shape has been defined by the wave shaper 33 is supplied to the series-parallel changeover circuit 26 in the form of binary series data. A prescribed amount of stored data is, sent forth to the data register 34, and then to CPU 17 through the data buffer 22 to be processed in the prescribed manner.

The foregoing description refers to the case where the pulse code-transmitting apparatus of this invention was used with an electronic register.

However, the invention need not be exclusively used for this purpose, but is applicable to an electronic device employed in the transmission of digital data.

Claims

1. A pulse code-transmitting apparatus which comprises: oscillation means for generating a high frequency signal; switching means which is controlled according to the contents of binary series transmission data and which, when closed, allows for the passage of the high frequency signal from the oscillation means; and means for superposing the high frequency signal issued from the oscillation means through the switching means on an A.C. signal in a commercial A.C. line.

2. The pulse code-transmitting apparatus according to claim 1, which further includes a central processing unit; and a parallel-series changoever circuit which is connected to said central processing unit through a data bus line and converts output binary parallel data from the central processing unit into binary series data.

3. The pulse code-transmitting apparatus according to claim 2, which further includes an input section, a display section, a printing section and a memory section.

4. The pulse code-transmitting apparatus according to claim 3, which further includes a regulated voltage circuit connected to the commercial A.C. line to supply D.C. voltage to said input section, said display section, said printing section and said memory section.

5. The pulse code-transmitting apparatus according to claim 2, wherein said superposing means is formed of transformer means which comprises a secondary coil supplied with the high frequency signal from the switching means and a primary coil which is electromagnetically connected to the secondary coil and also to the commercial A.C. line through a capacitor.

6. The pulse code-transmitting apparatus according to claim 5, wherein said secondary coil of the transformer means is connected to filter means which extracts the high frequency signal received in a stage superposed on said commercial A.C. line and said filter means is connected to rectifier means which rectifies said extracted high frequency signal and sends forth binary series data.

7. The pulse code-transmitting apparatus according to claim 6, wherein a transmissionreception changeover circuit is connected between said secondary coil of the transformer means and said filter means to selectively connect either of the switching means and filter means to the secondary coil.

8. The pulse code-transmitting apparatus according to claim 7, which further includes series-parallel changeover means for converting output binary series data from the rectifier means into parallel data, and said series-parallel changeover means being connected to the control processing unit for supplying said parallel data to said central processing unit.

9. The pulse code-transmitting apparatus according to claim 8, wherein said central processing unit produces a changeover instruction to the transmission-reception changeover means, as occasion needs.

10. The pulse code-transmitting apparatus according to claim 8, which further includes an input section, a display section, a printing section and a memory section.

11. The pulse code-transmitting apparatus according to claim 10, which further includes a regulated voltage circuit connected to the commercial A.C. line to supply D.C. voltage to said input section, said display section, said printing section and said memory section.

12. A pulse code-transmitting apparatus, substantially as hereinbefore described with reference to the accompanying drawings.