GB1508854A - Data handling system - Google Patents

Data handling system

Info

Publication number
GB1508854A
GB1508854A GB28183/75A GB2818375A GB1508854A GB 1508854 A GB1508854 A GB 1508854A GB 28183/75 A GB28183/75 A GB 28183/75A GB 2818375 A GB2818375 A GB 2818375A GB 1508854 A GB1508854 A GB 1508854A
Authority
GB
United Kingdom
Prior art keywords
bus
priority
controller
gating
interrupt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB28183/75A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Priority to GB28183/75A priority Critical patent/GB1508854A/en
Priority to FR7615579A priority patent/FR2316659A2/en
Priority to IT24374/76A priority patent/IT1063309B/en
Priority to SE7606928A priority patent/SE7606928L/en
Priority to JP51077957A priority patent/JPS529336A/en
Publication of GB1508854A publication Critical patent/GB1508854A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/374Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a self-select method with individual priority code comparator
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
  • Memory System (AREA)

Abstract

1508854 Data transmission INTERNATIONAL BUSINESS MACHINES CORP 4 July 1975 28183/75 Addition to 1365838 Heading H4P [Also in Division G4) A data handling system includes a number of data handling devices 3 each arranged to communicate with a common controller 1 on an interrupt basis by issuing requests for service over a common interrupt line 6 associated with a common parallel bus 2, each device having an assigned interrupt number 4 and being arranged, in response to an invitation from the controller, made in response to a detected request, to compete for service by presenting its interrupt number in parallel to a respective gating circuit 5, the gating circuits being connected to the bus and arranged to interact via the bus to place the highest priority interrupt number presented onto the bus. The arrangement applies the concept described in parent Specification, which uses a serial bus, to a parallel bus. As described any handling device 3 requiring service sets its latch 7 and applies a signal via line 6 to the central controller 1. When the controller is free it supplies an instruction via parallel bus 2 to the devices 3 in response to which each device requiring service supplies its priority number from a register 4 or from a hard wired arrangement to the corresponding gating network 5. The gating networks interact via bus 2 so that only the highest priority number is applied to the bus. After issuing the instruction the central controller waits for a period sufficient to allow the gating networks to stabilize and then services the highest priority device. The priority numbers may also form the addresses of the devices 3 which may be processors competing for a shared memory or peripherals communicating with a central processor. More than one priority order may be provided, each device 3 having two or more priority numbers, each number being associated with a respective line 6. The controller decides the priority order required and responds to the appropriate line 6 to issue an instruction to cause the appropriate priority number to be emitted. The specification describes two gating networks 5, Figs. 2 and 3 (not shown), one of which stabilizes quicker than the other.
GB28183/75A 1975-07-04 1975-07-04 Data handling system Expired GB1508854A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
GB28183/75A GB1508854A (en) 1975-07-04 1975-07-04 Data handling system
FR7615579A FR2316659A2 (en) 1975-07-04 1976-05-17 DATA MANIPULATION SYSTEM
IT24374/76A IT1063309B (en) 1975-07-04 1976-06-16 PERFECTED SYSTEM FOR DATA PROCESSING
SE7606928A SE7606928L (en) 1975-07-04 1976-06-17 DATA PROCESSING SYSTEM
JP51077957A JPS529336A (en) 1975-07-04 1976-07-02 Data processor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB28183/75A GB1508854A (en) 1975-07-04 1975-07-04 Data handling system

Publications (1)

Publication Number Publication Date
GB1508854A true GB1508854A (en) 1978-04-26

Family

ID=10271603

Family Applications (1)

Application Number Title Priority Date Filing Date
GB28183/75A Expired GB1508854A (en) 1975-07-04 1975-07-04 Data handling system

Country Status (5)

Country Link
JP (1) JPS529336A (en)
FR (1) FR2316659A2 (en)
GB (1) GB1508854A (en)
IT (1) IT1063309B (en)
SE (1) SE7606928L (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2177873A (en) * 1985-07-19 1987-01-28 Marconi Electronic Devices Communications system
GB2179225A (en) * 1985-08-14 1987-02-25 Apple Computer Peripheral bus
US4875158A (en) * 1985-08-14 1989-10-17 Apple Computer, Inc. Method for requesting service by a device which generates a service request signal successively until it is serviced
US4912627A (en) * 1985-08-14 1990-03-27 Apple Computer, Inc. Method for storing a second number as a command address of a first peripheral device and a third number as a command address of a second peripheral device
US4918598A (en) * 1985-08-14 1990-04-17 Apple Computer, Inc. Method for selectively activating and deactivating devices having same first address and different extended addresses

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54114049A (en) * 1978-02-24 1979-09-05 Toshiba Corp Optical pattern reading method
JPS58170613U (en) * 1982-05-12 1983-11-14 株式会社日立製作所 Optical system configuration
JPS6217878Y2 (en) * 1986-02-07 1987-05-08
EP0349905B1 (en) * 1988-07-07 1994-08-24 Siemens Aktiengesellschaft Priority selection device
US6707353B1 (en) 1999-11-02 2004-03-16 Matsushita Electric Industrial Co., Ltd. Dielectric filter

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1356269A (en) * 1971-09-25 1974-06-12 Ibm Digital data handling system
DE2210426C2 (en) * 1972-03-03 1973-11-08 Nixdorf Computer Ag, 4790 Paderborn Method for the priority-controlled selection of one of several functional units for connection to a device jointly assigned to them in data processing systems and circuit for carrying out the method

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2177873A (en) * 1985-07-19 1987-01-28 Marconi Electronic Devices Communications system
GB2177873B (en) * 1985-07-19 1989-11-22 Marconi Electronic Devices Communications system
GB2179225A (en) * 1985-08-14 1987-02-25 Apple Computer Peripheral bus
US4875158A (en) * 1985-08-14 1989-10-17 Apple Computer, Inc. Method for requesting service by a device which generates a service request signal successively until it is serviced
GB2179225B (en) * 1985-08-14 1990-02-21 Apple Computer Communication medium.
US4910655A (en) * 1985-08-14 1990-03-20 Apple Computer, Inc. Apparatus for transferring signals and data under the control of a host computer
US4912627A (en) * 1985-08-14 1990-03-27 Apple Computer, Inc. Method for storing a second number as a command address of a first peripheral device and a third number as a command address of a second peripheral device
US4918598A (en) * 1985-08-14 1990-04-17 Apple Computer, Inc. Method for selectively activating and deactivating devices having same first address and different extended addresses

Also Published As

Publication number Publication date
JPS529336A (en) 1977-01-24
FR2316659A2 (en) 1977-01-28
SE7606928L (en) 1977-01-05
IT1063309B (en) 1985-02-11
FR2316659B2 (en) 1979-04-06

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Legal Events

Date Code Title Description
CSNS Application of which complete specification have been accepted and published, but patent is not sealed