GB1255432A - An adapter - Google Patents

An adapter

Info

Publication number
GB1255432A
GB1255432A GB02649/70A GB1264970A GB1255432A GB 1255432 A GB1255432 A GB 1255432A GB 02649/70 A GB02649/70 A GB 02649/70A GB 1264970 A GB1264970 A GB 1264970A GB 1255432 A GB1255432 A GB 1255432A
Authority
GB
United Kingdom
Prior art keywords
bit
receiver
character
mark
stop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB02649/70A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1255432A publication Critical patent/GB1255432A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06QINFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00Payment architectures, schemes or protocols
    • G06Q20/08Payment architectures
    • G06Q20/20Point-of-sale [POS] network systems
    • G06Q20/203Inventory monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Business, Economics & Management (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Accounting & Taxation (AREA)
  • General Engineering & Computer Science (AREA)
  • Finance (AREA)
  • Strategic Management (AREA)
  • General Business, Economics & Management (AREA)
  • Communication Control (AREA)
  • Dc Digital Transmission (AREA)

Abstract

1,255,432. Telegraphy. INTERNATIONAL BUSINESS MACHINES CORP. 17 March, 1970 [2 April, 1969], No. 12649/70. Heading H4P. A telegraph receiver which can receive startstop-signals at various bit-rates tests for the presence of the stop bit in a received character at the time expected according to the bit-rate at which the receiver is set and if absent the receiver is reset to either an alternative bit-rate or in another arrangement to one of a number of bit-rates which the receiver successively tries. The receiver is under the control of a processor which initially puts the receiver into a receive state. The next received character start bit, identified by a mark/space transition, set to a count of 5 a 3-stage binary counter driven by clock pulses. Upon the count of 7, and subsequent counts of 7, the state of the received signal is sampled and signalled to the processor. After receiving the number of samples equal to the character bit-length corresponding to the character speed to which the receiver is set the processor instructs the receiver to sample what should then be a stop, indicated by a mark. Failure to detect a mark causes the receiver to be reset for the next character with the counter driven at a different clock rate corresponding to a slower bit rate. In one arrangement only two clock frequencies are available but in another arrangement a shift register is clocked on one stage to gate one of several frequencies to the counter. In a further arrangement a counter acting through a decoder selects the frequencies as the same character is successively tested for its stop at different possible stop times. In all arrangements a condition of the character coding is that no character may not have a bit at the mark level when it is time for the stop bit (mark) of a higher rate character.
GB02649/70A 1969-04-02 1970-03-17 An adapter Expired GB1255432A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US81281269A 1969-04-02 1969-04-02

Publications (1)

Publication Number Publication Date
GB1255432A true GB1255432A (en) 1971-12-01

Family

ID=25210698

Family Applications (1)

Application Number Title Priority Date Filing Date
GB02649/70A Expired GB1255432A (en) 1969-04-02 1970-03-17 An adapter

Country Status (3)

Country Link
US (1) US3569943A (en)
JP (1) JPS5014505B1 (en)
GB (1) GB1255432A (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3676858A (en) * 1970-09-30 1972-07-11 Honeywell Inf Systems Method, apparatus and computer program for determining the transmission rate and coding configuration of remote terminals
US3680057A (en) * 1970-11-02 1972-07-25 Honeywell Inf Systems Data communications subchannel
US3676859A (en) * 1970-12-23 1972-07-11 Ibm Data communication system incorporating device selection control
JPS5040932B1 (en) * 1970-12-26 1975-12-27
US3750107A (en) * 1971-10-27 1973-07-31 Sci Tek Inc Method and system for processing characters on a real time basis
US3836888A (en) * 1972-05-22 1974-09-17 C Boenke Variable message length data acquisition and retrieval system and method using two-way coaxial cable
JPS5212808U (en) * 1975-07-17 1977-01-29
US4258433A (en) * 1978-04-28 1981-03-24 L M Ericsson Pty. Ltd. Digital data communication network having differing data transmission rate capabilities
US4215243A (en) * 1978-11-17 1980-07-29 Racal-Vadic Inc. Automatic modem identification system
US4344132A (en) * 1979-12-14 1982-08-10 International Business Machines Corporation Serial storage interface apparatus for coupling a serial storage mechanism to a data processor input/output bus
US4467445A (en) * 1981-06-16 1984-08-21 International Business Machines Corporation Communication adapter circuit
US5842039A (en) * 1996-05-28 1998-11-24 Allen Bradley Company, Llc Most recent first dynamic protocol detection for use with a programmable controller

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL276308A (en) * 1961-03-24
US3302182A (en) * 1963-10-03 1967-01-31 Burroughs Corp Store and forward message switching system utilizing a modular data processor
US3390379A (en) * 1965-07-26 1968-06-25 Burroughs Corp Data communication system
US3434117A (en) * 1967-04-24 1969-03-18 Ibm Automatic transmission speed selection control for a data transmission system

Also Published As

Publication number Publication date
JPS5014505B1 (en) 1975-05-28
US3569943A (en) 1971-03-09

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