FR2866983B1 - Realisation d'une entite en materiau semiconducteur sur substrat - Google Patents
Realisation d'une entite en materiau semiconducteur sur substratInfo
- Publication number
- FR2866983B1 FR2866983B1 FR0402080A FR0402080A FR2866983B1 FR 2866983 B1 FR2866983 B1 FR 2866983B1 FR 0402080 A FR0402080 A FR 0402080A FR 0402080 A FR0402080 A FR 0402080A FR 2866983 B1 FR2866983 B1 FR 2866983B1
- Authority
- FR
- France
- Prior art keywords
- entity
- realizing
- substrate
- semiconductor material
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000463 material Substances 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/977—Thinning or removal of substrate
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0402080A FR2866983B1 (fr) | 2004-03-01 | 2004-03-01 | Realisation d'une entite en materiau semiconducteur sur substrat |
US10/863,193 US7176554B2 (en) | 2004-03-01 | 2004-06-07 | Methods for producing a semiconductor entity |
EP05290392A EP1571705A3 (fr) | 2004-03-01 | 2005-02-22 | Réalisation d'une entité en matériau semiconducteur sur substrat |
JP2005056052A JP4818618B2 (ja) | 2004-03-01 | 2005-03-01 | 基板上に半導体材料を備えた構造体の製造 |
US11/617,025 US7439160B2 (en) | 2004-03-01 | 2006-12-28 | Methods for producing a semiconductor entity |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0402080A FR2866983B1 (fr) | 2004-03-01 | 2004-03-01 | Realisation d'une entite en materiau semiconducteur sur substrat |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2866983A1 FR2866983A1 (fr) | 2005-09-02 |
FR2866983B1 true FR2866983B1 (fr) | 2006-05-26 |
Family
ID=34834151
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0402080A Expired - Lifetime FR2866983B1 (fr) | 2004-03-01 | 2004-03-01 | Realisation d'une entite en materiau semiconducteur sur substrat |
Country Status (2)
Country | Link |
---|---|
US (1) | US7176554B2 (fr) |
FR (1) | FR2866983B1 (fr) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2858461B1 (fr) * | 2003-07-30 | 2005-11-04 | Soitec Silicon On Insulator | Realisation d'une structure comprenant une couche protegeant contre des traitements chimiques |
FR2865574B1 (fr) * | 2004-01-26 | 2006-04-07 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat demontable |
US7713835B2 (en) * | 2006-10-06 | 2010-05-11 | Brewer Science Inc. | Thermally decomposable spin-on bonding compositions for temporary wafer bonding |
FR2911430B1 (fr) * | 2007-01-15 | 2009-04-17 | Soitec Silicon On Insulator | "procede de fabrication d'un substrat hybride" |
KR20080080833A (ko) * | 2007-03-02 | 2008-09-05 | 삼성전자주식회사 | 반도체 웨이퍼의 제조 방법 |
US7935780B2 (en) | 2007-06-25 | 2011-05-03 | Brewer Science Inc. | High-temperature spin-on temporary bonding compositions |
KR101096142B1 (ko) * | 2008-01-24 | 2011-12-19 | 브레우어 사이언스 인코포레이션 | 캐리어 기판에 디바이스 웨이퍼를 가역적으로 장착하는 방법 |
US8092628B2 (en) * | 2008-10-31 | 2012-01-10 | Brewer Science Inc. | Cyclic olefin compositions for temporary wafer bonding |
DE102009004559A1 (de) * | 2009-01-14 | 2010-07-22 | Institut Für Solarenergieforschung Gmbh | Verfahren zum Herstellen eines Halbleiterbauelementes, insbesondere einer Solarzelle, auf Basis einer Halbleiterdünnschicht mit einem direkten Halbleitermaterial |
US8771927B2 (en) * | 2009-04-15 | 2014-07-08 | Brewer Science Inc. | Acid-etch resistant, protective coatings |
US8852391B2 (en) | 2010-06-21 | 2014-10-07 | Brewer Science Inc. | Method and apparatus for removing a reversibly mounted device wafer from a carrier substrate |
US9263314B2 (en) | 2010-08-06 | 2016-02-16 | Brewer Science Inc. | Multiple bonding layers for thin-wafer handling |
US20180019169A1 (en) * | 2016-07-12 | 2018-01-18 | QMAT, Inc. | Backing substrate stabilizing donor substrate for implant or reclamation |
DE102016114949B4 (de) * | 2016-08-11 | 2023-08-24 | Infineon Technologies Ag | Verfahren zur Herstellung eines Halbleiterbauelements |
KR102596988B1 (ko) * | 2018-05-28 | 2023-10-31 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 방법 및 그에 의해 제조된 장치 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2715501B1 (fr) | 1994-01-26 | 1996-04-05 | Commissariat Energie Atomique | Procédé de dépôt de lames semiconductrices sur un support. |
KR100304161B1 (ko) | 1996-12-18 | 2001-11-30 | 미다라이 후지오 | 반도체부재의제조방법 |
DE19730975A1 (de) * | 1997-06-30 | 1999-01-07 | Max Planck Gesellschaft | Verfahren zur Herstellung von schichtartigen Gebilden auf einem Substrat, Substrat sowie mittels des Verfahrens hergestellte Halbleiterbauelemente |
WO1999001893A2 (fr) * | 1997-06-30 | 1999-01-14 | MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. | Procede pour produire des structures en couche sur un substrat, substrat et composants a semi-conducteur produits a l'aide dudit procede |
FR2809867B1 (fr) | 2000-05-30 | 2003-10-24 | Commissariat Energie Atomique | Substrat fragilise et procede de fabrication d'un tel substrat |
FR2810448B1 (fr) * | 2000-06-16 | 2003-09-19 | Soitec Silicon On Insulator | Procede de fabrication de substrats et substrats obtenus par ce procede |
JP3957038B2 (ja) | 2000-11-28 | 2007-08-08 | シャープ株式会社 | 半導体基板及びその作製方法 |
US6774010B2 (en) * | 2001-01-25 | 2004-08-10 | International Business Machines Corporation | Transferable device-containing layer for silicon-on-insulator applications |
FR2821697B1 (fr) | 2001-03-02 | 2004-06-25 | Commissariat Energie Atomique | Procede de fabrication de couches minces sur un support specifique et une application |
FR2823599B1 (fr) | 2001-04-13 | 2004-12-17 | Commissariat Energie Atomique | Substrat demomtable a tenue mecanique controlee et procede de realisation |
TW586231B (en) * | 2001-07-24 | 2004-05-01 | Seiko Epson Corp | Transfer method, methods of manufacturing thin film devices and integrated circuits, circuit board and manufacturing method thereof, electro-optical apparatus and manufacturing method thereof, manufacturing methods of IC card and electronic appliance |
FR2837620B1 (fr) * | 2002-03-25 | 2005-04-29 | Commissariat Energie Atomique | Procede de transfert d'elements de substrat a substrat |
US20050048736A1 (en) * | 2003-09-02 | 2005-03-03 | Sebastien Kerdiles | Methods for adhesive transfer of a layer |
-
2004
- 2004-03-01 FR FR0402080A patent/FR2866983B1/fr not_active Expired - Lifetime
- 2004-06-07 US US10/863,193 patent/US7176554B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20050191779A1 (en) | 2005-09-01 |
FR2866983A1 (fr) | 2005-09-02 |
US7176554B2 (en) | 2007-02-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2866983B1 (fr) | Realisation d'une entite en materiau semiconducteur sur substrat | |
FR2844364B1 (fr) | Substrat diffusant | |
EP1901123A4 (fr) | Composition adhésive photosensible et film adhésif, feuille adhésive, tranche de semi-conducteur avec couche adhésive, dispositif semi-conducteur et pièce électronique obtenus en utilisant cette composition | |
BR0312249B1 (pt) | substrato transparente. | |
DE60238361D1 (de) | Halbleitersubstratschablone | |
TWI319600B (en) | Substrate having silicon germanium material and stressed silicon nitride layer | |
AU2003231810A1 (en) | Microwave field effect transistor structure on silicon carbide substrate | |
JP2009545878A5 (fr) | ||
IL159707A0 (en) | Thermoelectric module with thin film substrate | |
DE50110873D1 (de) | Laterales Halbleiterbauelement in Dünnfilm-SOI-Technik | |
SG116648A1 (en) | Surface protecting film for semiconductor wafer and method of protecting semiconductor wafer using the same. | |
GB2429114B (en) | Semiconductor on insulator substrate and devices formed therefrom | |
TWI368675B (en) | Nitride-based semiconductor substrate and semiconductor device | |
DE60304225D1 (de) | NIickelsilizid mit verminderter Grenzflächenrauhigkeit | |
DE60205204D1 (de) | Barriereschicht für siliziumhaltiges Substrat | |
DE60315911D1 (de) | Kühlkörper mit Vielfachoberflächenvergrösserung | |
DE602005002346D1 (de) | Haftvermittelnde additive enthaltende substrate und damit hergestellte gegenstände | |
EP1720175A4 (fr) | Film conducteur transparent et mat riau de base conducteur transparent utilisant ledit film | |
DE10238843B8 (de) | Halbleiterbauelement | |
EP1732128A4 (fr) | Substrat pour dispositif a semiconducteur et dispositif a semiconducteur | |
FR2843481B1 (fr) | Memoire sur substrat du type silicium sur isolant | |
AU2003230702A1 (en) | Semiconductor device with components embedded in backside diamond layer | |
DE60301923D1 (de) | Geschlitzes Substrat | |
ATA10012003A (de) | Schichtwerkstoff | |
DE502004007108D1 (de) | Multifunktion-Substratsträger |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
CD | Change of name or company name |
Owner name: SOITEC, FR Effective date: 20120926 |
|
PLFP | Fee payment |
Year of fee payment: 13 |
|
PLFP | Fee payment |
Year of fee payment: 14 |
|
PLFP | Fee payment |
Year of fee payment: 15 |
|
PLFP | Fee payment |
Year of fee payment: 17 |
|
PLFP | Fee payment |
Year of fee payment: 18 |
|
PLFP | Fee payment |
Year of fee payment: 19 |
|
PLFP | Fee payment |
Year of fee payment: 20 |