FR2851848A1 - HIGH TEMPERATURE RELAXATION OF A THIN FILM AFTER TRANSFER - Google Patents

Abstract

The invention relates to a method of forming on a substrate a relaxed or pseudo-relaxed layer, the relaxed layer being made of a material selected from semiconductor materials, characterized in that it comprises the following steps: (a) growing on a donor substrate (1) an elastically strained layer (2) (2) consisting of the material chosen from among semiconductor materials; (b) forming on the strained layer (2) or on a receiving substrate (7), a vitreous layer ( 4) made of a viscous material from a viscosity temperature greater than about 900 ° C; (c) bonding the receiving substrate (7) to the strained layer (2) through the vitreous layer (4) ) formed in step (b); (d) removing the donor substrate (1), to form a structure (20) comprising the receiving substrate, the vitreous layer (4) and the strained layer (2); (e) heat treating the structure at a temperature close to or above the viscosity temperature.

Description

i

  The present invention relates to the formation on a substrate of a relaxed or pseudo-relaxed layer, the relaxed layer being of a material chosen from semiconductor materials, in order to form a final structure intended for electronics, optics or the optoelectronics such as for example a semiconductor-on-insulator structure.

  The present invention includes in particular the formation of a stressed layer on and by the relaxed layer.

  For example, a Si layer constrained by a relaxed or pseudo-relaxed SiGe layer can in this respect achieve advantageous properties such as a mobility of charge carriers of the order of 100% greater than that present within of a layer of relaxed Si.

  It is said here that a layer is "relaxed" if the crystalline material which constitutes it has a lattice parameter substantially identical to its nominal lattice parameter, that is to say the lattice parameter of the material in its massive form at 'balanced.

  Conversely, the term "stress" layer is used to refer to any layer of a crystalline material whose crystal structure is elastically stressed in tension or in compression during crystal growth, such as epitaxy, forcing its mesh parameter to be significantly different from the nominal mesh parameter of this material.

  It is known to form a relaxed layer on a substrate, in particular by implementing a method comprising the following steps: (1) epitaxy of a thin layer of semiconductor material on a donor substrate; (2) bonding of a receiving substrate at the thin layer; (3) removal of the donor substrate.

  It is thus possible to produce a semiconductor-on-insulator structure, in which the semiconductor thickness consists at least in part of said relaxed thin layer and the insulator layer usually being formed during an intermediate step in step (1). and in step (2).

  The relaxation of the thin layer can be achieved: ò during the implementation of step (1); or after further processing.

  In the first case, it is known to use a donor substrate consisting of a support substrate and a buffer layer, the buffer layer confining plastic deformations so that the thin overepitaxial layer is relaxed from any stress. Such methods are for example described in documents US 2002/0072130 and WO 99/53539.

  However, a buffer layer is often long and costly to produce.

  In the second case, the donor substrate does not include a buffer layer and step (1) then consists in growing the thin layer so that it is constrained by the donor substrate.

  Thus, for example, a layer of SiGe will be grown directly on a Si substrate, to a thickness such that the layer of SiGe is generally stressed.

  A first relaxation technique for the SiGe layer, notably described in the document by B. Hôllander et al. entitled "Strain relaxation of pseudomorphic Si1.xGe, / Si (100) heterostructures after hydrogen or helium ion 20 implantation for virtual substrate fabrication" (in Nuclear and Instruments and Methods in Physics Research B 175-177 (2001) 357 - 367) relaxing, before the implementation of step (2), the SiGe layer by implantation of hydrogen or helium ions in the Si substrate at a determined depth.

  However, the relaxation rates usually obtained by this first technique remain quite low compared to the other techniques.

  The study of a second technique is notably disclosed in the document entitled "Compliant Substrates: A comparative study of the relaxation mechanisms of strained films bonded to high and low viscosity" by Hobart et al. (Journal of electronic materials, vol.29, ni7, 2000).

  After removal of the donor substrate during step (3), a heat treatment is implemented to relax or pseudo-relax a layer of 5 constrained SiGe bonded during step (2) to a BPSG glass (abbreviation for "borophosphoro silicate glass").

  During the heat treatment, the stressed layer thus seems to relax through the glass layer which has become viscous at the temperature of the treatment.

  One advantage of this technique would be to use a BPSG layer which has a fairly low viscosity temperature TG (of the order of 6250C).

  However, for heat treatments implemented after the relaxation heat treatment and at temperatures higher than TG, the viscosity of the layer of BPSG obtained at these temperatures can have undesired effects, in particular on the structure of the wafer. treated.

  Thus, for example, if transistors are produced in the relaxed or pseudo-relaxed SiGe layer or in an epitaxial strained Si layer on the relaxed or pseudo-relaxed SiGe layer, at a temperature higher than TG, part of the stresses can relax through the layer of glass which has become viscous, removing stresses from the Si layer and adding stresses from the SiGe layer.

  This is contrary to the aim sought here which is to conserve the relaxations of the SiGe layer in order to best constrain the Si layer.

  The present invention attempts to overcome this difficulty by proposing a method for forming a relaxed or pseudorelaxed layer on a substrate, the relaxed layer being made of a material chosen from semiconductor materials, characterized in that it comprises the following steps: ( a) growing on a donor substrate an elastically constrained layer made of the material chosen from semiconductor materials; (b) forming on the constrained layer or on a receiving substrate, a vitreous layer made of a viscous material from a viscosity temperature above about 900 ° C; (c) bonding a receiving substrate to the stressed layer via the vitreous layer formed in step (b); (d) removing the donor substrate, to form a structure comprising the recipient substrate, the vitreous layer and the stressed layer; (e) heat treating the structure at a temperature close to or higher than the viscosity temperature.

  Other characteristics of the process for forming a relaxed or pseudo-relaxed layer on a substrate are: - a last stage of crystal growth, on the structure, of a material chosen from semiconductor materials, is implemented; - Step (b) comprises the two successive operations: (b1) growing a layer of semiconductor material on the constrained layer; (b2) carrying out a controlled treatment to transform at least part of the layer formed in step (b1), into viscous material from the viscosity temperature, thus forming the vitreous layer; - the donor substrate is made of Si and the constrained layer is made of Si1,, Ge ,; the growth layer of step (b1) is made of Si and the controlled treatment implemented during step (b2) is a controlled thermal oxidation treatment to transform at least part of the Si of the layer formed during step (b1) of SiO2, thus forming the vitreous layer (4) of SiO2; - step (e) comprises a heat treatment from approximately 9000G; - the material used for said growth on the structure is Si; the vitreous layer formed during step (b) is electrically insulating and the structure formed is therefore a semiconductor-over-insulating structure, the semiconductor thickness of which includes the strained layer having been relaxed or pseudo-relaxed during the 'step (e).

  Other aspects, aims and advantages of the present invention will appear better on reading the following detailed description of implementation of preferred methods thereof, given by way of non-limiting example and made with reference to the drawings appended to which: Figures la to li show the different steps of a first method according to the invention.

  Figures 2a to 2i show the different stages of a second method according to the invention.

  A first objective of the present invention consists in forming a useful relaxed or pseudo-relaxed layer on a substrate.

  A "useful layer" according to the invention is a layer intended to receive components for electronics, optics, or optoelectronics during treatments subsequent to the implementation of the method according to the invention.

  A second objective of the present invention consists in forming on the relaxed or pseudo-relaxed layer a useful layer of constrained material.

  A third objective of the present invention is to make it possible to maintain at least a relative resistance to relaxation of an initially stressed layer, during heat treatments at high temperature.

  This is in particular to be able to keep the resistance of the relaxation at least relative to a layer of Si1 "xGex adjacent to a vitreous layer 25 up to a temperature situated between approximately 9000C and approximately 12000C or even at a higher temperature.

  Such heat treatments can be implemented during epitaxies on the relaxed Si1 xGex layer, or during other processes, such as, for example, production of components in the Si1 xGe layer, or in a sus layer. -epitaxial, such as a strained Si layer.

  The method according to the invention comprises the three main stages (1), (2) and (3) previously mentioned.

  Referring to Figures la to li, a preferred method according to the invention is described.

  With reference to FIG. 1 a, a source plate 10 according to the invention is shown.

  The wafer 10 consists of a donor substrate 1 and a strained layer of Si1 xGex 2.

  In a first configuration of the donor substrate 1, the latter consists entirely of monocrystalline Si having the first lattice parameter.

  This donor substrate 1 is then advantageously produced by Czochralski growth.

  In a second configuration of the donor substrate 1, the latter is a pseudo-susbtrate comprising an upper Si layer (not shown in FIG. 1), having an interface with the constrained layer 2 and having a first lattice parameter at the level of its interface with the constrained layer 2.

  The first lattice parameter of the upper layer is advantageously the nominal lattice parameter of the Si, so that the latter is in a relaxed state.

  The upper layer also has a sufficiently large thickness to be able to impose its lattice parameter on the overlying constrained layer 2, without the latter significantly influencing the crystal structure of the upper layer of the donor substrate 1.

  Whatever the configuration chosen for the donor substrate 1, the latter has a crystal structure with a low density of structural defects, such as dislocations.

  Preferably, the constrained layer 2 only consists of a single thickness of Si, -, Ge ,.

  The concentration of Ge in this constrained layer 2 is preferably greater than 17%, ie a value of x greater than 0.17.

  Since Ge has a lattice parameter approximately 4.2% higher than Si, the material chosen to constitute this constrained layer 2 thus has a second nominal lattice parameter which is substantially greater than the first lattice parameter.

  The constrained layer 2 formed is then elastically constrained in compression by the donor substrate 1, that is to say that it is constrained to have a lattice parameter substantially lower than the second nominal lattice parameter 10 of the material constituting it, and therefore to have a mesh parameter close to the first mesh parameter.

  The constrained layer 2 also preferably has a substantially constant composition of atomic elements.

  The constrained layer 2 is advantageously formed on the donor substrate 1 by crystal growth, such as epitaxy using known techniques such as for example the LPD, CVD and MBE techniques (abbreviations of "Chemical Vapor Deposition" and "Molecular Beam respectively Epitaxy ").

  To obtain such a constrained layer 2 without too many crystallographic defects, such as for example point defects or extended defects such as dislocations, it is advantageous to choose the crystalline materials constituting the donor substrate 1 and the constrained layer 2 (in the vicinity of its interface with the support substrate 1) so that they have a sufficiently low difference between their first and their second nominal mesh parameters 25.

  For example, this difference in the mesh parameter is typically between approximately 0.5% and approximately 1.5%, but may also have larger values.

  For example, Si1.xGex with x = 0.3 has a nominal mesh parameter 30 approximately 1.15% higher than that of Si.

  On the other hand, it is preferable that the stressed layer 2 has a substantially constant thickness, so that it has substantially constant intrinsic properties and / or to facilitate future bonding with the receiving substrate 5 (as shown in FIG. 1 e).

  To avoid relaxation of the stressed layer 2 or the appearance of internal plastic deformations, the thickness of the latter must also remain below a critical thickness of elastic stress.

  This critical thickness of elastic stress depends mainly on the material chosen for the stress layer 2 and on said difference in mesh parameter with the donor substrate 1.

  But it also depends on growth parameters such as the temperature at which it was formed, the nucleation sites from which it was epitaxied, or the growth techniques used (for

example CVD or MBE).

  With regard to critical thickness values for layers of Si1-xGex, reference may in particular be made to the document entitled "Highmobility Si and Ge structures" by Friedrich Schaffler ("Semiconductor Science Technology" 12 (1997) 1515-1549) .

  For other materials, a person skilled in the art will refer to the state of the art in order to know the value of the critical thickness of elastic stress of the material which he chooses for the stress layer 2 formed on the donor substrate 1.

  Thus, for a layer of Si1 xGex having x between 0.10 and 0.30, a typical thickness will be chosen between approximately 200 and 2000, preferably between 200 A and 500, in particular by adapting the growth parameters.

  Once formed, the constrained layer 2 therefore has a mesh parameter substantially close to that of its growth substrate 1 and has internal elastic stresses in compression.

  With reference to FIG. 1c, a vitreous layer 4 is formed on the stressed layer 2 or on the receiving substrate 7.

  The material constituting the vitreous layer 4 is such that it becomes viscous from a viscosity temperature TG.

  In the context of this process according to the invention, a material having a high temperature TG, of the order of 900 ° C. minimum, is chosen for the composition of this vitreous layer 4.

  This high viscosity temperature will prevent the vitreous layer 4 from becoming viscous during heat treatments at high temperature, and thus avoid in particular the structure 30 or 40 (with reference to FIGS. 1 h and 1 i) formed at the end of the process does not see part of its crystallographic structure change with this vitreous layer 4 which has become viscous.

  A single heat treatment at a temperature around or higher than Tc, will however be implemented during the process according to the invention (with reference to FIG. 1 h), in order to relax the stressed layer 2.

  And it is in particular to be able to keep the resistance of the relaxation at least relative (which will be obtained during a step with reference to FIG. 1 h) of the layer of Si, -, Gex up to a temperature located around 900 ° C or even at a higher temperature.

  The material of the vitreous layer 4 is advantageously one of the following materials: SiO2, SiOxNy.

  During the formation of a vitreous layer 4 made of SiOxNy, it is advantageous to play on the value of y, in order to change the viscosity temperature 25 which is for this material substantially a function of the composition of nitrogen.

  Thus, with an increasing y composition, it is then possible to change the TG of the vitreous layer 4 typically between a TG of the order of that of SiO2 (which can vary around 11 50 ° C.) and a TG of 1 'order of 30 Si3N4 (which is higher than 1 5000C).

  By playing on y, we can thus cover a wide range of TG.

  The TG values of the vitreous layer 4, if they essentially depend on the material of the vitreous layer, can also fluctuate depending on the conditions under which it was formed.

  In an advantageous scenario, it will thus be possible to adapt the conditions for the formation of the vitreous layer 4 in a controlled manner so as to select a TG "à la carte".

  We can thus play on the deposition parameters, such as temperature, time, dosage and potential of the gaseous atmosphere, etc. Doping elements may thus be added to the main gaseous elements contained in the vitrification atmosphere, such as Boron and Phosphorus which may have the ability to reduce the TG.

  It is preferable for the vitreous layer 4 to be deposited before the germanium contained in the stressed layer 2 can diffuse into the atmosphere, or even into the receiving substrate 7, in particular when the assembly undergoes heat treatment at high temperature, such as than an RTA type annealing treatment, or a sacrificial oxidation treatment.

  In a preferred embodiment of the vitreous layer 4, the following steps are implemented: (bi) with reference to FIG. 1b, growth of a layer 3 of semiconductor material on the stressed layer 2; then (b2) with reference to FIG. 1c, implementation of a controlled treatment to transform at least part of the layer formed in step (bl), into viscous material from the viscosity temperature, forming thus the vitreous layer 4.

  The material chosen for layer 3 is advantageously made of Si so as not to modify the stress in the stressed layer 2.

  The thickness of the layer 3 formed is typically between approximately 5 and approximately 5000, more particularly between approximately 100 A and approximately 1000.

  For the same reasons as those explained above, the crystal growth during step (bl) of layer 3 is preferably carried out before diffusion of the Ge, that is to say in the short term after: the formation of the layer stress 2 if the temperature of formation of the stress layer 2 is maintained; * a rise in temperature after a fall to room temperature having been made immediately after the formation of the constrained layer 2.

  The preferred method for growing the layer 3 is in situ growth directly in continuation of the growth of the constrained layer 2.

  The growth technique used in step (bi) can be an LPD, CVD or MBE epitaxy technique.

  The vitreous layer 4 can be produced by heat treatment under an atmosphere of determined composition.

  Thus, a layer 3 of Si can undergo during step (b2) a controlled thermal oxidation treatment in order to transform this layer 3 into a vitreous layer 4 into SiO2.

  During this last step, it is important to precisely measure the parameters of the oxidizing treatment (such as temperature, duration, oxygen concentration, other gases of the oxidizing atmosphere, etc.) in order to control the thickness d oxide formed, and to stop the oxidation in the vicinity of the interface between the two layers 2 and 3.

  For such thermal oxidation, preferably an atmosphere of dry oxygen or water vapor is used, at a pressure equal to or greater than 1 atm.

  We will then prefer to play on the oxidation time to control the oxidation of layer 3.

  However, this control can be done by playing on one or more other parameters, in combination or not with the time parameter.

  Reference may in particular be made to document US Pat. No. 6,352,942 for more details as to this embodiment of such a vitreous layer 4 of SiC2 on a layer of SiGe.

  According to another embodiment of the vitreous layer 4, and in replacement of said two steps (b1) and (b2) referenced respectively in FIGS. 1b and 1c, is implemented, immediately after the growth of the constrained layer 2 (in order to avoid the diffusion of Ge), a deposit of atomic species made up of vitreous material by means of deposits of atomic species.

  Thus, one can for example deposit molecules of SiO2 on the constrained layer 2 in order to form the vitreous layer 4 in SiO2.

  In an alternative embodiment of the vitreous layer 4 to the previous one, one can: * deposit in the first place atomic species of amorphous Si to form a layer of amorphous Si on the strained layer of SiGe; then: * thermally oxidize this amorphous Si layer and thus produce a vitreous layer 4 in SiO2.

  With reference to FIGS. 1d, 1c and 1f, the steps for removing the constrained layer 2 and the vitreous layer 4 are represented from the donor substrate 1 in order to transfer them to a receiver substrate 7.

  To this end, the method according to the invention implements a technique composed of two successive main stages: bonding of the receiving substrate 7 with the donor substrate 1 - constrained layer 2 vitreous layer 4, at the vitreous layer 4; * removal of the donor substrate 1.

  Referring to Figure le, the bonding of the receiving substrate 7 and the glassy layer 4 is implemented.

  Before bonding, an optional step of forming a bonding layer on the surface of the receiving substrate 7 can be implemented, this bonding layer having binding properties, at room temperature or at higher temperatures, with the material. glass layer 4.

  Thus, for example, the formation of a layer of SiO2 on the receiving substrate 7 may improve the quality of the bonding, in particular if the vitreous layer 4 is made of SiO210. This bonding layer of SiO2 is then advantageously produced by depositing atomic species of SiO2 or by thermal oxidation of the surface of the receptor substrate 7 if the surface of the latter is made of Si.

  A step of preparing the surfaces to be bonded is advantageously carried out prior to bonding in order to make these surfaces as smooth and clean as possible.

  Appropriate chemical treatments for cleaning the surfaces to be bonded may be used, such as light chemical etching, RCA treatment, ozonated baths, rinses, etc. Mechanical or mechanical-chemical treatments can also be implemented, such as polishing, abrasion, CMP (English abbreviation for "Chemical Mechanical Planarization") or bombardment of atomic species.

  The bonding operation as such is carried out by bringing the surfaces to be bonded into contact.

  The bonding bonds are preferably molecular in nature by using hydrophilic properties of the surfaces to be bonded.

  To assign or accentuate the hydrophilic properties of the surfaces to be bonded, prior soaking of the two structures to be bonded in baths can be implemented, such as for example rinsing with deionized water.

  Annealing of the bonded assembly can also be used to reinforce the bonding bonds, for example by modifying the nature of the bonding bonds, such as covalent bonds or other bonds.

  Thus, in the case where the vitreous layer 4 is made of Sio2, annealing can 5 accentuate the bonding bonds, in particular if a bonding layer of SiO2 has been formed before bonding to the receiving substrate 7.

  For more details on bonding techniques, reference may be made in particular to the document entitled "Semiconductor Wafer Bonding" (Science and technology, Interscience Technology) by Q. Y. Tong, U. Gôsele 10 and Wiley.

  Once the assembly has been bonded, a preferred material removal according to the invention is carried out, which consists in detaching the donor substrate 1 at a weakening zone 6 present in the donor substrate 1, by supplying energy .

  With reference to FIGS. 1d and 1c, this weakening zone 6 is a zone substantially parallel to the bonding surface, and has brittleness of connections between the lower part 1A of the donor substrate 1 and the upper part 1 B of the donor substrate 1, these fragile bonds being capable of being broken under a supply of energy, such as thermal or mechanical energy.

  According to a first embodiment of the embrittlement zone 6, a technique called Smart-Cut is implemented, comprising firstly an implantation of atomic species in the donor substrate 1, at the embrittlement zone 6.

  The implanted species can be hydrogen, helium, a mixture of these two species or other light species.

  The implantation preferably takes place just before bonding.

  The implantation energy is chosen so that the species, implanted through the surface of the vitreous layer 4, pass through the thickness of the vitreous layer 4, the thickness of the constrained layer 2 and a determined thickness of the upper part. 1 B of the receiving substrate 1.

  It is preferable to implant in the donor substrate 1 deep enough so that the strained layer 2 does not suffer damage during the step of detaching the donor substrate 1.

  The implant depth in the donor substrate is therefore typically around 1000.

  The fragility of the connections in the embrittlement zone 6 is found mainly by the choice of the dosage of the implanted species, the dosage thus being typically between 1016 cm2 and 1017 cm2, and more precisely between approximately 2.1016 cm2 and approximately 7.1016 cm2.

  Detachment at this embrittlement zone 6 is then usually carried out by adding mechanical and / or thermal energy.

  For more details on the Smart-Cute process, reference is made in particular to the document entitled "Silicon-On-Insulator Technology: Materials to VLSI, 2nd Edition" by J.-P. Colinge published by "Kluwer Academic Publishers", p .50 and 51.

  According to a second embodiment of the weakening zone 6, a technique is notably used, described in document EP 20 0 849 788.

  The embrittlement layer 6 is here produced before the formation of the constrained layer 2, and during the formation of the donor substrate 1.

  The realization of the embrittlement layer comprises the following main operations: * formation of a porous layer on a support substrate 1A of Si e growth of a layer 1B of Si on the porous layer.

  The support substrate 1A - porous layer - Si layer 1B assembly then constitutes the donor substrate 1, and the porous layer then constitutes the embrittlement zone 6 of the donor substrate 1.

  An energy supply, such as a thermal and / or mechanical energy supply, at the porous embrittlement zone 6, then leads to a detachment of the support substrate 1A from the layer 1 B. The preferred technique according to the The invention for removing material from a weakening zone 6, produced according to one of the two nonlimiting embodiments above, thus makes it possible to quickly and en bloc remove a large part of the donor substrate 1.

  It also makes it possible to be able to reuse the withdrawn part 1A of the donor substrate 1 in another method, such as for example a method according to the invention.

  Thus, a reformation of a stressed layer 2 on the removed part 1A and of a possible other part of a donor substrate and / or other layers can be implemented, preferably after polishing the surface of the part removed 1A.

  With reference to FIG. 1f, after detaching the remaining part 1B from the removed part 1A from the donor substrate 1, a finishing material removal is carried out making it possible to remove the remaining part 1 B. Finishing techniques such as polishing, abrasion, CMP planarization, RTA thermal annealing, sacrificial oxidation, chemical etching, taken alone or in combination can be used to remove this part 1B and perfect the stacking (reinforcement of the bonding interface, elimination of roughness, healing of defects, etc.).

  Advantageously, the removal of finishing material uses at least at the end of the stage a selective chemical etching, taken in combination or not with mechanical means.

  Thus, solutions based on KOH, NH40H (ammonium hydroxide), TMAH, EDP or HNO3 or solutions currently under study combining agents such as HNO3, HN02H202 HF, H2SO4, H2SO2, CH3COOH, H202, and H20 (as explained in document WO 99/53539, page 9) could advantageously be used to selectively etch the part 1B in Si with respect to the constrained layer 2 in Sii-xGex.

  After the bonding step, another technique for removing material without detachment and without weakening zone, can be implemented according to the invention for removing the donor substrate 1.

  It consists in implementing chemical and / or mechanochemical etching.

  It is possible, for example, to use optionally selective etchings of the material (s) from the donor substrate 1 to be removed, according to a process of the "etch-back" type.

  This technique consists in etching the donor substrate 1 "from behind", that is to say from the free face of the donor substrate 1.

  Wet etching using etching solutions adapted to the materials to be removed can be used.

  Dry etching can also be used to remove material, such as plasma or spray etching.

  The etching (s) can also be only chemical or electrochemical or photoelectrochemical.

  The etching (s) can be preceded or followed by a mechanical attack on the donor substrate 1, such as running in, polishing, mechanical etching or spraying of atomic species.

  The etching (s) may be accompanied by a mechanical attack, such as a polishing optionally combined with an action of mechanical abrasives in a CMP process.

  All of the aforementioned techniques for removing material from the donor substrate 1 are proposed by way of example in the present document, but do not in any way constitute a limitation, the invention extending to all types of techniques capable of removing from the material of the donor substrate 1, in accordance with the method according to the invention.

  With reference to FIG. 1g, after removal of material, a structure is obtained comprising the receiving substrate 7, the vitreous layer 4 and the stressed layer 2.

  With reference to FIG. 1h, a heat treatment is then carried out at a temperature close to or higher than the viscosity temperature.

TG

  The main purpose of this heat treatment is to relax the stresses in the stress layer 2.

  Indeed, a heat treatment at a temperature above or around 10 the viscosity temperature of the vitreous layer 4, will cause a viscosity of this last layer, which will allow the constrained layer to relax at its interface with the vitreous layer 4, causing a decompression of at least part of its internal stresses.

  Thus, in the case where the vitreous layer 4 is made of SiO2 produced by thermal oxidation, a heat treatment at approximately 10500C minimum, preferably at approximately 12000C minimum, for a determined time will cause relaxation or pseudo-relaxation of the constrained layer 2.

  The heat treatment typically lasts between a few seconds and several hours.

  The constrained layer 2 therefore becomes a relaxed layer 2 ′.

  Other effects of the heat treatment on the structure can be sought, in addition to the relaxation of the stressed layer 2.

  A second aim sought after when the heat treatment is implemented, can also be to carry out an annealing to reinforce the bonding 25 between the receiving substrate 7 and the vitreous layer 4.

  In fact, the temperature chosen for the heat treatment being greater than or around the viscosity temperature of the vitreous layer 4, the latter, which has become temporarily viscous, can create particular and stronger adhesion bonds with the receptor substrate 7.

  A structure 30 consisting of Si, -, Ge, relaxed 2 '/ glassy layer 4 / receiving substrate 7 is then obtained in the end.

  This structure 30 is a SGOI structure (acronym for "Silicon Germanium On Insulator") in the case where the vitreous layer 4 is electrically insulating, such as for example a vitreous layer 4 made of SiO2.

  The layer of Si1 xGe, relaxed 2 ′ of this structure then has a surface having a surface roughness compatible with the growth of another crystalline material.

  A light surface treatment, such as polishing, suitable for SiixGex can optionally be used to improve the surface properties.

  Referring to Figure li, and in an optional step of the invention, a growth layer 11 of Si is then implemented on the layer of relaxed Si1 xGex 2 'with a thickness substantially less than the critical thickness of stress of the material which constitutes it, and that it is therefore constrained by the layer of relaxed SiixGex 2 ′.

  A structure 40 consisting of constrained Si / Si1 is then obtained in the end.

  xGex relaxed 2 '/ vitreous layer 4 / receiving substrate 7.

  This structure 40 is an Si / SGOI structure in the case where the glassy layer 4 is electrically insulating, such as for example a glassy layer 20 4 made of SiO2.

  A variant of this process is presented with reference to FIGS. 2a to 2i.

  With reference to FIGS. 2a to 2i, and more particularly to FIG. 2c, the method is generally the same as that described with reference to FIGS. 1a to 1i, with the exception of the step of transforming layer 3 into vitreous layer 4 which is implemented here so that the entire layer 3 is not transformed.

  Thus, there remains a part of the Si layer 3 interposed between the glassy layer 4 and the stressed layer 2, forming an interposed layer 5.

  This interposed layer 5 is produced so that it has a typical thickness around 10 nm, in any case much less than that of the constrained layer 2.

  During the stress relieving heat treatment of the stressed layer 5, the latter will want to reduce its internal energy of elastic stress by using the viscosity properties of the vitreous layer 4 which has become viscous, and, because the interposed layer 5 either thin compared to the overlying constrained layer 2, the constrained layer 2 will impose its need for relaxation on the interposed layer 5.

  The stressed layer 2 thus obliges the interposed layer 5 at least partially to the stress.

  The constrained layer 2 then becomes a relaxed layer 2 'at least partially.

  And the relaxed interposed layer 5 then becomes a constrained interposed layer 5 '.

  A discussion of this latter point is found in particular in document US 5,461,243, column 3, lines 28 to 42.

  With reference to FIG. 2h, this interposed constrained layer 5 ′ is retained after the relaxation heat treatment of the constrained layer 20 2.

  The structure formed is then a structure 30 consisting of relaxed Si1 xGex / stressed Si / vitreous layer 4 / receiving substrate 7.

  This structure 30 is an SG / SOI structure, in the case where the vitreous layer 4 is electrically insulating, such as for example a vitreous layer 25 4 made of SiO2On can then optionally be removed, for example by selective chemical etching based on HF: H202 : CH3COOH (selectivity of approximately 1: 1000), the relaxed Si1-xGex layer 2 ′, to ultimately have a constrained Si structure / glassy layer 4 / receptor substrate 7.

  This structure is a constrained SOI structure, in the case where the vitreous layer 4 is electrically insulating, such as for example a vitreous layer 4 made of SiO2.

  Instead of carrying out this chemical etching, one can achieve, with reference to FIG. 2i, a growth of a layer of Si taken up on the relaxed layer 2 ′ so as to form a layer of constrained Si i1, substantially identical to that of Figure 1 i.

  The structure formed is then a structure 40 consisting of strained Si I relaxed Sii-xGex / strained Si / vitreous layer 4 / receptor substrate 7.

  This structure 40 is an Si / SG / SOI structure, in the case where the vitreous layer 4 is electrically insulating, such as for example a vitreous layer 4 made of SiO2.

  In a particular case where the stress relieving heat treatment of the stressed layer 2 is carried out at a temperature and 15 for a duration greater than a temperature and a reference duration respectively from which the Ge diffuses in the Si, the Ge contained in the constrained layer 2 can diffuse in the interposed constrained layer 5 '.

  This is why it is preferable to implement the relaxation of the strained SiGe layer 2 before resuming the epitaxy of the strained Si layer 1 1.

  But, in certain other cases, this diffusion effect, if it is properly controlled, can be sought.

  Thus, the diffusion can be controlled so that the Ge species are distributed uniformly throughout the two layers 2 and 5, forming a single layer of Sii.xGex having a substantially uniform Ge concentration.

  A discussion of this latter point can be found in document US 5,461,243, column 3, lines 48 to 58.

  According to one or other of the two preferred methods according to the above invention, or according to an equivalent thereof, steps with a view to producing components can be integrated or succeed this method according to the invention.

  Thus, steps for preparing the production of components can be implemented during the process, and at a temperature of around 9000C minimum without altering the stress rate of the relaxed layer 2 ′ and of the stressed layer 11.

  They are implemented at the layer 2 of constrained SiGe 10 of the SGOI structure with reference to FIG. 1g, of the layer 2 ′ of relaxed or pseudo-relaxed SiGe of the SGOI structure with reference to FIG. 1h, or in the constrained Si layer 11 of the Si / SGOI structure with reference to FIG. 1 i.

  For example, local treatments intended to engrave patterns in the layers may be undertaken, for example by lithography, by photolithography, by reactive ion etching or by any other etching with pattern masking.

  In a particular case, patterns such as islands are thus etched in the constrained layer 2 in SiGe in order to aid in good relaxation of the constrained layer 2 during the subsequent implementation of the thermal relaxation treatment 20.

  One or more steps for producing components, such as transistors, in the strained Si layer 11 (or in the relaxed SiGe layer 2 ′ in the case where this is not covered with a strained Si layer 11) can in particular be implemented at a temperature of approximately 9000C minimum without altering the stress rate of the relaxed layer 2 ′ and of the stressed layer 11.

  In a particular method according to the invention, steps for producing components are implemented during or in continuity with the thermal relaxation treatment of the strained SiGe layer 2.

  In a particular method according to the invention, the epitaxy step of the constrained Si layer is implemented during or in continuity with the steps for producing components.

  The techniques described in the invention are proposed by way of example in the present document, but do not in any way constitute a limitation, the invention extending to all types of techniques capable of implementing a method according to the invention.

  One or more epitaxies of any kind can be implemented on the final structure (structure 30 or 40 taken with reference to FIG. 1 h. 1 i, 2 h, 2i), such as an epitaxy of a layer of SiGe or SiGeC, or an epitaxy of a layer of constrained Si or SiC, or successive epitaxies of layers SiGe or SiGeC and layers of Si or SiC constrained alternately to form a multilayer structure.

  Once the final structure has been completed, finishing treatments can optionally be carried out, including for example annealing.

  The present invention is not limited either to a strained layer 2 of SiGe, but also extends to a constitution of the strained layer 2 of other types of material, of the 111-V or Il-VI type, or to other semiconductor materials.

  In the semiconductor layers discussed in this document, other constituents can be added to it, such as carbon with a carbon concentration in the layer considered substantially less than or equal to 50% or, more particularly with a concentration less than or equal at 5 %.

Claims (17)

  1. Method for forming a relaxed or pseudorelaxed layer on a substrate, the relaxed layer (2 ′) being made of a material chosen from semiconductor materials, characterized in that it comprises the following steps: (a) growing on a donor substrate (1) an elastically constrained layer (2) made of the material chosen from semiconductor materials; (b) forming on the constrained layer (2) or on a receiving substrate (7), a vitreous layer (4) made of a viscous material from a viscosity temperature above about 9000C; (c) bonding the receiving substrate (7) to the constrained layer (2) via the vitreous layer (4) formed in step (b); (d) removing the donor substrate (1), to form a structure comprising the receiving substrate (7), the vitreous layer (4) and the stressed layer (2); (e) heat treating the structure at a temperature close to or higher than the viscosity temperature.   2. Method according to the preceding claim, characterized in that it further comprises a last stage of crystalline growth, on the structure, of a material chosen from semiconductor materials.   3. Method according to one of the preceding claims, characterized in that step (b) comprises the two successive operations: (bl) growing a layer of semiconductor material on the stressed layer (2); (b2) carrying out a controlled treatment to transform at least part of the layer formed in step (b1), into viscous material from the viscosity temperature, thus forming the vitreous layer (4).   4. Method according to one of the preceding claims, characterized in that, before step (c), a formation of a bonding layer on at least one of the two surfaces to be bonded.   5. Method according to the preceding claim, characterized in that the bonding layer is made of SiO2.   6. Method according to one of the preceding claims, characterized in that the removal of material from step (d) is essentially carried out by detachment at the level of a weakening zone present in the donor substrate (1) , at a depth close to the thickness of the surface layer, by energy supply.   7. Method according to the preceding claim, characterized in that it further comprises, before step (c), the formation of the embrittlement zone 20 by implantation of atomic species in the donor substrate (1).   8. Method according to claim 6, characterized in that it further comprises, before step (a), a step of forming the donor substrate (1) comprising the following operations: * forming a porous layer (6) on a crystalline support substrate (1A); e growing a crystalline layer (1 B) on the porous layer (6); the support substrate (lA) - porous layer (6) - crystal layer (l B) constituting the donor substrate (1), the porous layer constituting the embrittlement zone of the donor substrate (1).   9. Method according to one of the preceding claims, characterized in that the removal of material from step (d) comprises selective chemical etching.   10. Method according to one of the preceding claims, characterized in that the vitreous layer (4) formed in step (b) is electrically insulating.   11. Method according to the preceding claim, characterized in that the vitreous layer (4) formed in step (b) is made of SiO2.   12. Method according to one of the preceding claims, characterized in that: e the donor substrate (1) is made of Si; and * the constrained layer (2) is in Sii.xGex.   13. Method according to the two preceding claims and claim 2, characterized in that: * the growth layer of step (bl) is made of Si; * the controlled treatment implemented during step (b2) is a controlled thermal oxidation treatment to transform at least part of the Si of the layer formed during step (bl) into SiO2, thus forming the layer glassy (4) SiO2.   14. Method according to one of the three preceding claims, characterized in that step (e) comprises a heat treatment from about 9000C.   15. Method according to claim 2 combined with one of the four preceding claims, characterized in that the material used for growth on the structure is Si.   16. Method according to one of the preceding claims, characterized in that the vitreous layer (4) formed during step (b) is electrically insulating and that the structure formed is therefore a semiconductor-on-insulator structure, of which the semiconductor thickness comprises the strained layer (2) having been relaxed or pseudo-relaxed during step (e).   17. Method according to one of the preceding claims, characterized in that it further comprises stages of preparation for the production of components and / or stages of production of components in the constrained layer (2) or in a layer optionally above-epitaxial (11).