FR2437300A1 - Stored data checking technique - determines whether items are within page limits by using address calculator which performs addition or subtraction from origin - Google Patents

Stored data checking technique - determines whether items are within page limits by using address calculator which performs addition or subtraction from origin

Info

Publication number
FR2437300A1
FR2437300A1 FR7827486A FR7827486A FR2437300A1 FR 2437300 A1 FR2437300 A1 FR 2437300A1 FR 7827486 A FR7827486 A FR 7827486A FR 7827486 A FR7827486 A FR 7827486A FR 2437300 A1 FR2437300 A1 FR 2437300A1
Authority
FR
France
Prior art keywords
register
page
address
subtraction
origin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7827486A
Other languages
French (fr)
Inventor
Violette Cohen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SA
Original Assignee
Bull SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SA filed Critical Bull SA
Priority to FR7827486A priority Critical patent/FR2437300A1/en
Publication of FR2437300A1 publication Critical patent/FR2437300A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

The data processing system uses mass memories and contains a detector which senses if data will exceed a page of memory. This is performed by adding or subtracting address information depending on the direction in which addresses are evolving. The detector signals the CPU when a page will be exceeded. An address calculator in a CPU comprises a register for the logic address of the origina. A second register system indicates the direction of evolution of the addresses. The contents of these two register systems are added or subtracted depending on sense of evolution given by the sub register in the address evolution register. The resultant output is applied to a register to contain the calculated logic address. A comparator compares the line of the calculated page with the line of the current page. This allows the CPU to determine action required.
FR7827486A 1978-09-26 1978-09-26 Stored data checking technique - determines whether items are within page limits by using address calculator which performs addition or subtraction from origin Withdrawn FR2437300A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7827486A FR2437300A1 (en) 1978-09-26 1978-09-26 Stored data checking technique - determines whether items are within page limits by using address calculator which performs addition or subtraction from origin

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7827486A FR2437300A1 (en) 1978-09-26 1978-09-26 Stored data checking technique - determines whether items are within page limits by using address calculator which performs addition or subtraction from origin

Publications (1)

Publication Number Publication Date
FR2437300A1 true FR2437300A1 (en) 1980-04-25

Family

ID=9213031

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7827486A Withdrawn FR2437300A1 (en) 1978-09-26 1978-09-26 Stored data checking technique - determines whether items are within page limits by using address calculator which performs addition or subtraction from origin

Country Status (1)

Country Link
FR (1) FR2437300A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4671683A (en) * 1983-11-18 1987-06-09 Brother Industries, Ltd. Printer which determines whether the text in memory can fit on a sheet of paper

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3533075A (en) * 1967-10-19 1970-10-06 Ibm Dynamic address translation unit with look-ahead
FR2214923A1 (en) * 1973-01-18 1974-08-19 Siemens Ag
US4086629A (en) * 1975-07-09 1978-04-25 International Computers Limited Hierarchical data store with look-ahead action

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3533075A (en) * 1967-10-19 1970-10-06 Ibm Dynamic address translation unit with look-ahead
FR2214923A1 (en) * 1973-01-18 1974-08-19 Siemens Ag
US4086629A (en) * 1975-07-09 1978-04-25 International Computers Limited Hierarchical data store with look-ahead action

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4671683A (en) * 1983-11-18 1987-06-09 Brother Industries, Ltd. Printer which determines whether the text in memory can fit on a sheet of paper

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Legal Events

Date Code Title Description
RE Withdrawal of published application