FR2407521A1 - CALL INSTRUCTIONS FOR DATA PROCESSING SYSTEMS - Google Patents

CALL INSTRUCTIONS FOR DATA PROCESSING SYSTEMS

Info

Publication number
FR2407521A1
FR2407521A1 FR7830342A FR7830342A FR2407521A1 FR 2407521 A1 FR2407521 A1 FR 2407521A1 FR 7830342 A FR7830342 A FR 7830342A FR 7830342 A FR7830342 A FR 7830342A FR 2407521 A1 FR2407521 A1 FR 2407521A1
Authority
FR
France
Prior art keywords
operand
routine
data processing
instruction
central unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7830342A
Other languages
French (fr)
Other versions
FR2407521B1 (en
Inventor
William D Strecker
Richard F Lary
Steven F Rothman
Thomas N Hastings
David P Rodgers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of FR2407521A1 publication Critical patent/FR2407521A1/en
Application granted granted Critical
Publication of FR2407521B1 publication Critical patent/FR2407521B1/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30054—Unconditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482—Procedural
    • G06F9/4484—Executing subprograms
    • G06F9/4486—Formation of subprogram jump address

Abstract

A.SYSTEME DE TRAITEMENT DE DONNEES NUMERIQUES COMPRENANT UNE UNITE CENTRALE DESTINEE A REPONDRE A DIVERSES INSTRUCTIONS CARACTERISEES PAR LE FAIT D'AVOIR UNE LONGUEUR VARIABLE. B.CHAQUE INSTRUCTION COMPREND UN CODE D'OPERATIONS. CERTAINES INSTRUCTIONS COMPRENNENT EN OUTRE UN OU PLUSIEURS SPECIFICATEURS D'OPERANDES. CHAQUE SPECIFICATEUR D'OPERANDES PEUT COMPRENDRE UN OU PLUSIEURS OCTETS DE DONNEES. CHAQUE INSTRUCTION PASSE DANS UNE MEMOIRE TAMPON D'INSTRUCTIONS. DES CIRCUITS DE COMMANDE DANS L'UNITE CENTRALE DECODENT LE CODE D'OPERATIONS ET, EN SUCCESSION, CHAQUE OCTET DU SPECIFICATEUR D'OPERANDES. LES SPECIFICATEURS D'OPERANDES ET L'INFORMATION EXTRAITE DU CODE D'OPERATIONS CONCERNANT CHAQUE SPECIFICATEUR D'OPERANDES SONT COMBINES POUR OBTENIR L'ADRESSE DE LAQUELLE L'OPERANDE DOIT ETRE RECUPEREE OU A LAQUELLE UNE OPERANDE DOIT ETRE TRANSFEREE. LA REPONSE DE L'UNITE CENTRALE A UNE INSTRUCTION D'AJOUTER DEUX TERMES SITUES DANS DES PREMIER ET SECOND EMPLACEMENTS DE MEMOIRES ET DE STOCKER LA SOMME DANS UN TROISIEME EMPLACEMENT ET LES INSTRUCTIONS D'APPELER UNE SOUS-ROUTINE ET DE RENVOYER DE LA SOUS-ROUTINE A LA ROUTINE D'APPEL SONT DECRITES. C.APPLICATIONS: SYSTEMES DE TRAITEMENT DE DONNEES NUMERIQUES.A. DIGITAL DATA PROCESSING SYSTEM INCLUDING A CENTRAL UNIT INTENDED TO RESPOND TO VARIOUS INSTRUCTIONS CHARACTERIZED BY HAVING A VARIABLE LENGTH. B. EACH INSTRUCTION INCLUDES A CODE OF OPERATIONS. SOME INSTRUCTIONS ALSO INCLUDE ONE OR MORE OPERAND SPECIFIERS. EACH OPERAND SPECIFIER MAY INCLUDE ONE OR MORE BYTE OF DATA. EACH INSTRUCTION GOES INTO A BUFFER INSTRUCTION MEMORY. CONTROL CIRCUITS IN THE CENTRAL UNIT DECODE THE OPERATIONS CODE AND, IN SUCCESSION, EACH BYTE OF THE OPERAND SPECIFIER. THE OPERAND SPECIFICATORS AND THE INFORMATION EXTRACTED FROM THE OPERAND CODE CONCERNING EACH OPERAND SPECIFIER ARE COMBINED TO OBTAIN THE ADDRESS FROM WHICH THE OPERAND SHOULD BE COLLECTED OR TO WHICH AN OPERAND SHOULD BE TRANSFERRED. THE CENTRAL UNIT'S RESPONSE HAS AN INSTRUCTION TO ADD TWO TERMS LOCATED IN FIRST AND SECOND MEMORY SLOTS AND STORE THE SUM IN A THIRD LOCATION AND INSTRUCTIONS TO CALL A SUB-ROUTINE AND RESEND FROM THE SUB-ROUTINE. ROUTINE TO CALL ROUTINE ARE DESCRIBED. C. APPLICATIONS: DIGITAL DATA PROCESSING SYSTEMS.

FR7830342A 1977-10-25 1978-10-25 CALL INSTRUCTIONS FOR DATA PROCESSING SYSTEMS Expired FR2407521B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US84541677A 1977-10-25 1977-10-25

Publications (2)

Publication Number Publication Date
FR2407521A1 true FR2407521A1 (en) 1979-05-25
FR2407521B1 FR2407521B1 (en) 1988-02-05

Family

ID=25295191

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7830342A Expired FR2407521B1 (en) 1977-10-25 1978-10-25 CALL INSTRUCTIONS FOR DATA PROCESSING SYSTEMS

Country Status (7)

Country Link
JP (1) JPS5931735B2 (en)
AU (1) AU517948B2 (en)
CA (1) CA1112368A (en)
DE (1) DE2846521A1 (en)
FR (1) FR2407521B1 (en)
GB (1) GB2007891B (en)
IT (1) IT1192334B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU634781B2 (en) * 1990-04-27 1993-03-04 Digital Equipment Corporation Normalizer
WO1996008763A2 (en) * 1994-09-16 1996-03-21 Philips Electronics N.V. Method, apparatus and instruction for performing a double jump register indirect operation transfer in a microcontroller
DE10245367A1 (en) 2002-09-27 2004-04-15 Infineon Technologies Ag Processor with security instructions for sub-program jump command information, has command processing device formed in mother-program at occurrence of sub-program jump command

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3614740A (en) * 1970-03-23 1971-10-19 Digital Equipment Corp Data processing system with circuits for transferring between operating routines, interruption routines and subroutines
US4041462A (en) * 1976-04-30 1977-08-09 International Business Machines Corporation Data processing system featuring subroutine linkage operations using hardware controlled stacks

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3614741A (en) * 1970-03-23 1971-10-19 Digital Equipment Corp Data processing system with instruction addresses identifying one of a plurality of registers including the program counter
US3710324A (en) * 1970-04-01 1973-01-09 Digital Equipment Corp Data processing system
US3999163A (en) * 1974-01-10 1976-12-21 Digital Equipment Corporation Secondary storage facility for data processing systems

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3614740A (en) * 1970-03-23 1971-10-19 Digital Equipment Corp Data processing system with circuits for transferring between operating routines, interruption routines and subroutines
US4041462A (en) * 1976-04-30 1977-08-09 International Business Machines Corporation Data processing system featuring subroutine linkage operations using hardware controlled stacks

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/75 *

Also Published As

Publication number Publication date
GB2007891A (en) 1979-05-23
AU4103878A (en) 1980-05-01
JPS5484945A (en) 1979-07-06
AU517948B2 (en) 1981-09-03
JPS5931735B2 (en) 1984-08-03
CA1112368A (en) 1981-11-10
GB2007891B (en) 1982-09-08
DE2846521C2 (en) 1991-11-14
FR2407521B1 (en) 1988-02-05
IT7869442A0 (en) 1978-10-24
DE2846521A1 (en) 1979-04-26
IT1192334B (en) 1988-03-31

Similar Documents

Publication Publication Date Title
FR2407520A1 (en) CENTRAL PROCESSING UNIT FOR THE EXECUTION OF INSTRUCTIONS WITH A SPECIAL OPERAND SPECIFIER
EP0373291A3 (en) Digital signal processor
WO1993002414A3 (en) Data processing system with synchronization coprocessor for multiple threads
EP0901071A3 (en) Method and apparatus for interfacing a processor to a coprocessor
EP0782071A3 (en) Data processor
FR2407521A1 (en) CALL INSTRUCTIONS FOR DATA PROCESSING SYSTEMS
EP1457876A3 (en) A digital signal processor using a variable length instruction set
EP2267597A3 (en) Digital signal processor having a pipeline structure
EP1052873A3 (en) A memory management technique for maintaining packet order in a packet processing system
EP0104859A3 (en) Multiprocessor memory map
JPS57161943A (en) Data processing device
FR2407519A1 (en) CENTRAL PROCESSING UNIT CAPABLE OF EXECUTING VARIABLE LENGTH INSTRUCTIONS
FR2707118B1 (en) Processor system, in particular of image processing, comprising a memory bus of variable size.
JPS5481045A (en) Data processor
FR2666591B1 (en) METHOD AND DEVICE FOR THE SELECTIVE RECOVERY OF SILVER IONS IN SOLUTION, ELUOUS RECOVERY COMPOSITION AND USE OF SUCH A COMPOSITION.
Almási et al. Efficient implementation of allreduce on BlueGene/L collective network
FR2432737A1 (en) METHOD FOR PERFORMING A DELETE AND HOLD INSTRUCTION
JPH08212179A (en) Data communication device for multiprocessor system
JPS56135261A (en) Interprocessor information transfer system
EP0454050A2 (en) Integrated circuit device for processing signals
JPS526031A (en) Information processing unit
Hossain et al. Evaporation, Infiltration, And Rainfall-Runoff Processes In Urban Watersheds
JP2577452B2 (en) Digital signal processor
JPS54128638A (en) Control system for cash memory
GB2187577A (en) Sequence controller for digital computer systems