EP0368710A1 - Devices for discriminating between a number of simultaneous phenomena - Google Patents

Abstract

The invention resides in the fact that, in each transmitter 2 associated with a detector 1, the alarm signal is transmitted a first time without delay, via the connection 20, then a second time after a certain delay of a variable duration via the delay line 4. The delay depends on the relevant transmitter. Thus, when an alarm signal appears simultaneously in a number of detectors-transmitters, it is transmitted at different instants. The invention is applicable to security systems. <IMAGE>

Description

The invention relates to devices for discriminating between several phenomena which occur simultaneously; it relates more particularly to security systems in which the information from the danger sensors or detectors is transmitted to a single receiver and can therefore be received simultaneously.

In security systems, the devices which detect events such as break-ins, thefts, fires, gases are independent of each other but they are connected by wire or radio links to a single receiver. The greater the number of detectors, the greater the probability that two or more events will occur simultaneously. However, if two or more events occur simultaneously, there is a risk of accumulation, distortion, disturbance or conflict between the signals received by the receiver, which leads to either the loss of information or the generation of erroneous signals .

The object of the present invention is therefore to provide a device for discriminating several simultaneous phenomena, in particular in a security system comprising N detectors / transmitters associated with a single receiver.

The invention relates to a device for discriminating between several simultaneous phenomena in a security system which comprises a plurality of transmitters (number N) and a single receiver in which each transmitter comprises an activation circuit. form of a signal representative of the phenomenon detected and a circuit for transmitting said representative signal, characterized in that each transmitter further comprises a delay circuit of variable durations disposed between the shaping circuit and the transmission circuit and a circuit for controlling said variable delay circuit, provided so as to delay said signal representative of a duration which is different from one transmitter to another.

To increase the security of transmission of simultaneous phenomena, each transmitter further comprises a direct link between the shaping circuit and the transmission circuit so as to first transmit the representative signal as soon as said phenomenon appears.

• - la figure 1 est un schéma fonctionnel d'un détecteur émetteur d'un système de sécurité, l'émetteur étant réalisé conformément à l'invention,
• - les figures 2-a, 2-b et 2-c sont des diagrammes temporels donnant une représentation des retards qui peuvent être obtenus en cas de trois événements simultanés,
• - les figures 3-a, 3-b, 3-c et 3-d sont des diagrammes temporels donnant les instants d'émission des trains impulsions émis correspondant à trois phénomènes simultanés, et
• - la figure 4 est un schéma fonctionnel d'un récepteur selon la présente invention,

Other characteristics and advantages of the present invention will appear on reading the following description of a particular embodiment, said description being made in relation to the attached drawing in which:

• FIG. 1 is a functional diagram of a detector transmitter of a security system, the transmitter being produced in accordance with the invention,
• - the figures 2-a, 2-b and 2-c are time diagrams giving a representation of the delays which can be obtained in the event of three simultaneous events,
• FIGS. 3-a, 3-b, 3-c and 3-d are time diagrams giving the instants of emission of the pulse trains emitted corresponding to three simultaneous phenomena, and
• FIG. 4 is a functional diagram of a receiver according to the present invention,

The invention will be described in its application to a security system which comprises a number N of detectors / transmitters, each detector / transmitter comprising an alarm detection device 1 and a transmitter 2. The N detectors / transmitters are independent of each other and are connected to a single receiver by wired or radio links. The number N can vary from a few tens to a few thousand. Of course, the device of the invention is particularly advantageous when the number N is large because the probability that several events or alarms occur simultaneously, including nuisance alarms, is also high.

According to the invention, it is proposed either to systematically delay the transmission of the signal from the sensor by a variable duration for each sensor, or to systematically transmit two signals, one in real time and the other delayed by a variable duration for each sensor.

To achieve such a variable delay in each transmitter, the invention proposes a transmitter whose functional diagram is given in FIG. 1. In this FIG. 1, the detector 1 is associated with the transmitter 2 and provides it with an alarm signal. when it detects a danger: break-in, theft, smoke, gas etc ...

The transmitter 2 comprises a circuit 3 for shaping the signal received from the detector 1 so as to present it in an appropriate form, that provided for the security system, so that it can be identified by the single receiver of the security system. . It is a coded signal which contains a certain amount of information such as the identification of the detector / transmitter and the type of alarm. The coded signal is applied to a delay circuit 4 whose delay is variable according to criteria which will be explained below. The delayed signal is applied to a transmission circuit 5 which puts it into the form required to be transmitted over a wire link or a radio link.

Each transmitter also includes a clock circuit 6 which gives signals at a determined frequency, the same from one transmitter to another in a determined security system. The signals produced by the clock circuit 6 are applied to a time base circuit 7 whose output signals control the delay circuit 4 so as to obtain a variable delay as a function of the identification code of the transmitter contained in a memory 8.

As the delay circuit 4 is identical from one transmitter to another, the variable delay is obtained by controlling the delay circuit by signals of variable frequency. The frequency variation is obtained by using information from the transmitter identification code which is different from one transmitter to another.

More precisely, it will be assumed that the delay circuit 4 is designed to provide eight different delays, each of which is an integer multiple up to eight of an elementary delay ϑ.

The time base circuit 7 comprises for example a divider circuit 9 which divides the frequency of the clock signal by a factor which will be taken to be equal to the identification code, a factor which may vary from 1 to 4096 if there is 4096 transmitters in the security system. The signals supplied by the divider circuit 9, which therefore have a frequency which is significant for the transmitter concerned, are applied to a counter / decoder 10. The eight outputs of the counter / decoder 10 are connected to the delay circuit 4 so as to make the choice of a delay time among the eight possible.

The shaping circuit 3 provides a signal on the conductor 11 as soon as it receives an alarm signal; this signal is used to stop the counter / decoder 10 so that the delay line 4 remains at a determined delay position.

Figures 2-a, 2-b and 2-c represent diagrams which make it possible to include / understand the obtaining of a delay among eight different delays. The staircase curve 22, 23 or 24 represents, as a function of time, the delays obtained, each level corresponding to a decoding position and therefore to a determined delay. As the signals which are applied to the counter / decoder 10 (FIG. 1) have a different frequency from one transmitter to another, the duration of each stage is also different and the same is true of that of the complete cycle. In Figure 2, only one complete cycle has been shown for each transmitter plus the start of the next cycle.

For the sake of clarity, the diagram of figure 2-a corresponds to a transmitter E₁ (identification code 1), that of figure 2-b to a transmitter E _i (identification code i) and that of the figure 2-c to a transmitter E _N (identification code N - the last of the system). If we assume that three events occur simultaneously at time t _x in each of the emitters E₁, E _i and E _N , this time t _x corresponds to the fourth level for E₁, to the third level for E _i and to the second level for E _N . Consequently, in E₁, the delay will be 4 ϑ; in E _i , the delay will be 3 ϑ; in E _N the delay will be 2 ϑ.

The operation of the detector / transmitter of FIG. 1 which has just been described shows that the alarm signals of three simultaneous events are transmitted to three different moments. The diagrams of figures 3-a, 3-b and 3-c show the pulses 25, 26 and 27 of the emitters E₁, E _i and E _N in the case described in relation to figure 2. It will be noted that the signals E₁, E _i and E _N are coded signals and can each take the form of a train of pulses.

The elementary delay ϑ must be greater than the discrimination time of the receiver. Indeed, during this time ϑ, events can occur in any one of the detectors / transmitters and it is therefore necessary that the delays which will be applied to them be greater than ϑ so that the signals received by the receiver can be discriminated. Furthermore, the various events appearing during the duration ϑ must give rise to a different delay in transmission, which means that the delay duration which is selected must be different from one transmitter to another. For this to be so, it is necessary that, in each transmitter, the different delay times are selected in a time of less than ϑ, which means that the frequency of the signals supplied by the divider circuit 9 must be chosen accordingly. On the figures 2-a, 2-b and 2-c, that means that the duration of the curves in staircase 22, 23 and 24 must be lower than ϑ.

The device of FIG. 1, as described above, that is to say without the connection 20 between the shaping circuit 3 and the transmission circuit 5, is satisfactory in many security systems. However, it is understood that the probability of having the same delay on two transmitters is all the greater the smaller the number of possible delays and the greater the number of transmitters. As a result, for security systems having a very large number N, we are led to have a different number p of delays. also large, which is not always possible to achieve. In addition, this implies an equally high frequency of the counting signals since the p delays must be able to be selected for the duration ϑ.

Finally, as the signals of the various clock circuits 6 are not generally in phase, it may happen that an instant t _x (FIG. 2) of the appearance of simultaneous events corresponds to the same level on several stepped curves and therefore at the same delay.

In addition, it can happen that two or more events which occur at different times give rise to transmission pulses which are simultaneous because the delay times which are introduced by the device are different.

Under these conditions, it is proposed according to the invention to double the emission of the signal as soon as an event occurs. To this end, the device of FIG. 1 is modified by the addition of the link 20 mentioned above between the shaping circuit 3 and the transmission circuit 5. This link 20 makes it possible to control the circuit 5 so that '' it emits a first pulse or train of pulses at the onset of the event, this first pulse being followed by a second pulse which is delayed by the delay line 4 under the same conditions as what has been described above .

Consequently, the single receiver will receive for each transmitter two pulses and will thus only take account of the first pulse received referenced 28 on the figure 3-a. When several events take place simultaneously, for example three, the receiver will first receive simultaneously three pulses which it will not be able to discriminate, these are the pulses 28, 29 and 30 of FIG. 3. It will then receive the pulses 25, 26 and 27 which are shifted in time and which can therefore be discriminated.

If events occur such that the pulse trains 25, 26 and 27 are simultaneous, it is understood that the receiver would discriminate between the pulse trains 28, 29 and 30 which are not simultaneous.

It should be noted that in normal operation, that is to say in the absence of simultaneous events, the receiver receives two successive pulses which it can discriminate. It can take the second impulse into account to validate the first, which increases security.

In the two devices of the invention which have just been described, the receiver which is used is of the conventional type but it must include complementary logic circuits according to the chosen device, complementary circuits which are within the reach of the skilled person. .

We will only recall, in relation to FIG. 4, the main elements of a single receiver of a security system. It comprises a reception circuit 35 which receives and detects the signals transmitted by the detectors / transmitters. This reception circuit 35 is connected to a shaping circuit 36, the output signals of which are applied to a decoder 37. The logic signals supplied by the decoder 37 are applied to a logic circuit 38. At this stage of the description, such a receiver corresponds to detectors / transmitters operating according to the first device (FIG. 1).

With detectors / transmitters operating according to the second device, the receiver must be completed by a link 39 between the reception circuit 35 and the logic circuit 38, this link serving to supply a signal which indicates that several pulses are received simultaneously. In this case, the logic circuit 38 must be modified to include complementary circuits so that the receiver does not take into account the first pulses received.

Furthermore, this link 39 can also be used to validate the first train of pulses received by the second, as indicated above.

Claims (5)

1. Device for discriminating between several simultaneous phenomena in a security system which comprises a plurality of transmitters (number N) and a single receiver in which each transmitter comprises a circuit for shaping (3) a representative signal of the detected phenomenon and a transmission circuit (5) of said signal representative each transmitter sending asynchronously two time-shifted signals, characterized in that each transmitter comprises a direct link between the shaping circuit (3) and the circuit of transmission (5), so as to transmit first the first signal representative of the appearance of said phenomenon, each transmitter further comprising a delay circuit of variable duration (4) disposed between the shaping circuits (3) and the transmission circuit (5) and a control circuit (6,7,8) of said variable delay circuit, provided so as to control the emission of a second e representative signal with a delay correlated to an identification code of the transmitter which is different from one transmitter to another. 2. Device according to claim 1, characterized in that the delay circuit of variable durations comprises a determined number p of delay durations, each duration being an integer multiple of an elementary delay (e). 3. Device according to claim 2, characterized in that the duration (e) of the elementary delay is at least equal to the discrimination time of the receiver. 4. Device according to one of the preceding claims, characterized in that the control circuit of said delay circuit comprises a clock circuit (6) which supplies signals at fixed frequency, a divider circuit (9) to which the signals of the clock circuit (6) are applied and which supplies signals at a frequency which is significant of the transmitter concerned and a counter / decoder (10) to which the signals of significant frequency from the transmitter considered are applied and which supplies signals for selecting a delay in the delay circuit (4). 5. Device according to claim 4, characterized in that the division factor of the divider circuit (9) is obtained from the identification code of the transmitter considered which is contained in a memory (8).

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