EP0160066A1 - Systeme d'extraction de donnees - Google Patents

Systeme d'extraction de donnees

Info

Publication number
EP0160066A1
EP0160066A1 EP19840903972 EP84903972A EP0160066A1 EP 0160066 A1 EP0160066 A1 EP 0160066A1 EP 19840903972 EP19840903972 EP 19840903972 EP 84903972 A EP84903972 A EP 84903972A EP 0160066 A1 EP0160066 A1 EP 0160066A1
Authority
EP
European Patent Office
Prior art keywords
data
memory
teletext
order
page
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19840903972
Other languages
German (de)
English (en)
Inventor
Matania Jochanan Givertz
Philip Givertz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ELECTRON SYSTEMS (MARKETING) LIMITED
Original Assignee
ELECTRON SYSTEMS (MARKETING) Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ELECTRON SYSTEMS (MARKETING) Ltd filed Critical ELECTRON SYSTEMS (MARKETING) Ltd
Publication of EP0160066A1 publication Critical patent/EP0160066A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/08—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division
    • H04N7/087—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only
    • H04N7/088—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only the inserted signal being digital
    • H04N7/0882—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only the inserted signal being digital for the transmission of character code signals, e.g. for teletext
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/64—Circuits for processing colour signals
    • H04N9/641—Multi-purpose receivers, e.g. for auxiliary information

Definitions

  • This invention relates to a data retrieval system using information services such as teletext and viewdata whereby inform ⁇ ation is broadcast or is available through television and telephone networks in the form of pages of information comprising generally lines of text and figures.
  • a domestic television receiver equipped with a suitable decoder can be used to display written and pictorial information broadcast as a composite video signal comprising a digital signal interleaved with the standard analogue picture signal.
  • the digital signal comprises a string of 8-bit symbol codes (bytes) transmitted serially together with synchronisation bytes.
  • the decoder contains timing circuits to extract the digital signal from the received composite video
  • the teletext decoder provides control and select functions whereby, for example, commands from a handheld infra-red transmitter module are used to control data acquisition from the incoming serial signal so that only data corresponding to a required page of information is stored in the RAM prior to displaying it. Due to the effective bandwidth limitations imposed by the use of a composite video signal, acquisition of a complete page of information can take up to 24 seconds.
  • a similar system known as 'viewdata 1 has been developed for transmitting data in a corresponding format using a conventional telephone line.
  • a domestic television receiver in this case connected to telephone subscriber apparatus with a suitable - adaptor, is used to display the information.
  • the viewdata system
  • OMPI _ does not suffer from the same response time disadvantage as the teletext system, but has in common with the teletext system the disadvantage that information cannot be used to full potential.
  • This invention increases the versatility of teletext and viewdata systems by converting the received data to a form whereby it can be processed by computer equipment.
  • the invention provides a method of retrieving data from a data signal transmitted over a public transmission medium in the form of a serial data stream having a series of coded pulse groups corresponding to alphanumeric characters arranged in lines and in pages each having a plurality of lines, the method comprising the steps of: (i) receiving the signal from the medium; (ii) selecting portions of the signal corresponding " to a required page, said selection taking place in real time; (iii) writing the selected portions in real time to a memory as they -.
  • data transmitted by teletext or viewdata services can not only be displayed at a computer location remote from the interface unit, but it can also be manipu ⁇ lated and stored in ASCII format by the host computer to act as a part of a useful database.
  • a typical application for the inven ⁇ tion is in organisations where foreign currency transactions depend on accurate knowledge of exchange rates.
  • the teletext and viewdata services broadcast exchange rate data which is regularly and frequently updated. Apparatus used in accordance with this invention enables the exchange rates to be monitored and stored by manually or automatically selecting the relevant 'page' of information and extracting the required characters for entry into the database.
  • the host computer then has an up-to-date list of exchange rates which may be reported and used within the database in a manner determined by the user.
  • the method described above may be performed using a circuit arrangement for interfacing a teletext or viewdata decoder with a computer, the decoder having a selector device for selecting required portions of a received data stream corresponding to a selected page of alphanumeric characters in accordance with command signals applied to a control input, the arrangement comprising a memory coupled to the selector device for receiving and storing the selected data portions in a predetermined format, a data processor programmed to read data out of the memory in an order corresponding to the order of the characters in the page and to transmit the data to the computer in a form compatible with the computer.
  • Figure 1 is a block diagram of a data retrieval system in accordance with the invention for receiving data from a teletext service
  • Figure 2 is a diagram illustrating the arrangement of bytes of a page of teletext information when stored in a teletext decoder module prior to processing;
  • Figures 3A - 3D are a circuit diagram of part of the system of Figure 1;
  • Figure 3 is a diagram showing how Figures 3A - 3D are put together
  • Figure 4 is a simplified flow chart illustrating the operating sequence of the system of Figures 3A — 3D;
  • Figure ' 5 is a flow chart showing how the system is initialised;
  • Figure 6 is a flow chart showing how the memory of the system is updated with teletext data
  • Figure 7 is a flow* chart illustrating the operations needed to send a character to the host computer or to receive a character therefrom;
  • Figures 8A and 8B when laid side by side, are a flow chart illustrating how the system processes a command received from the host computer.
  • Figures 9A and 9B when laid side by side, are a flow chart showing the operations necessary for " reading out a page of data from the memory and sending it to the host computer.
  • a system for retrieving teletext data and converting it into a form suitable for use by a host computer has firstly a UHF tuner 10 and teletext decoder 12 which may be part of a conventional teletext decoder module such as that manufactured by Mullard Limited under the type number VM6101.
  • the decoder 12 receives a composite video signal from the tuner
  • RAM random access memory
  • a teletext decoder for displaying teletext data directly on a television screen in a known manner, the data is stored temporarily in a RAM in a format determined by the manner in which the television screen is scanned, so that each displayed character is built up on the screen as a series of dots which are produced by signals fed from the RAM in an order different from the order of the characters in each line.
  • the RAM 16 is filled in a different format so that within each line the characters or bytes are in an order corresponding to the order in which they are positioned in the displayed line.
  • the required order of characters within each line is determined by the scheme of interconnection of the decoder address lines to the RAM address inputs as will be described hereinafter.
  • the result of the address ⁇ ing scheme is that the data is stored in an interlaced line format as shown in Figure 2.
  • Each line of information is 40 characters long, each box in Figure 2 representing 8 bytes of data.
  • the RAM locations are filled in the interlaced line format in accordance with the sequence of address line connections between the RAM 16 and integrated circuits in the module 12, the filling of RAM locations continuing in the pattern shown until the RAM 16 is full and a complete page of 24 lines has been stored.
  • the tuner 10 and teletext decoder 12 are thus used in a similar manner to that in which they are used in a conventional teletext equipped television set for receiving teletext services.
  • the present system provides an interface including a microprocessor circuit 18 which controls the RAM 16 to store a complete page of data and re-orders and converts the data into a form which can be processed by a variety of different types of computer systems, ranging from personal computers to mainframe computers.
  • a microprocessor circuit 18 which controls the RAM 16 to store a complete page of data and re-orders and converts the data into a form which can be processed by a variety of different types of computer systems, ranging from personal computers to mainframe computers.
  • Operation of the mircroprocessor circuit 18 is controlled by a program responsive to commands received via a serial input port 20 from a remote host computer (not shown) .
  • this port is RS232 compatible.
  • the program enables the microprocessor circuit 18 to read out the stored teletext data from the RAM 16 in the line sequence in which it is to be displayed or stored by the host computer, to convert it into, for example, a serial data stream which is transmitted from an RS232 compatible output port 22. It will be appreciated that once the data has been transmitted to the host computer, selected parts of a page such as exchange rates can be extracted provided their location on the page is known.
  • the system allows the host computer to control page selection in the teletext decoder 12 and channel selection in the tuner 10.
  • the microprocessor circuit 18 is programmed to convert serial ASCII commands received via input port 20 into a parallel format for driving a function select controller 24 and a tuning voltage source 25.
  • Controller 24 drives a control interface 26 which generates an amplitude modulated serial data signal suitable for controlling the selector stage 12B in decoder 12, whilst source 25 produces a tuning voltage for adjusting the operating frequency of the tuner 10.
  • incoming UHF signals are demodulated in tuner 10, the resulting composite video signal being fed in the teletext decoder 12 to the stages 12A, 12B and 12C which are based on a series of integrated circuits manufactured by Mullard Limited under type Nos. SAA5030, SAA5040 and SAA5020. None of these i.c.'s are shown in the drawings since they form part of a known decoder module which is a commercially available unit, the manner of their inter ⁇ connection being described in literature relating to the unit.
  • Data and data clock information is extracted from the composite video signal in the extractor stage 12A (SAA5030) and fed as a serial data stream to the selector stage 12B (SAA5040) which selects data according to a page number set on its control input 14, this data being collected and transmitted as parallel bytes one byte after the other to the RAM 16 ( Figure 1) via 8 parallel data lines D0 to D7.
  • the necessary timing signals for the RAM 16 are derived from the timing stage 12C (SAA5020) which maintains synchronisation between the teletext system and the incoming composite video signal.
  • address lines A0 to A9 couple the RAM 16 to address pins on both the SAA5040 and the SAA5020, the order in which the bus lines are connected to the RAM 16 determining the locations in the RAM to which data bytes are written.
  • the RAM 16 is shown , as two IK RAM chips (type No.2114-L) IC8 and IC9, the data bus D0 to D7 referred to above is coupled via a first connected
  • Second and third connectors 36 and 38 couple chip select (CS), write enable (WE) and address lines (A0 to A9) from the decoder module 12 ( Figure 1) via multiple TTL transmission gates IC6 and IC7 to the address lines of the RAM chips IC8 and IC9 , each of which has 10 address lines. These connections serve for the writing of data bytes from the teletext decoder 12 via the gates IC10, IC6 and IC7 to the RAM chips IC8 and IC9 where a complete page can be stored in inter ⁇ laced line format as shown in Figure 2. For the reading of the data from the RAM chips to the microprocessor circuit, the data and address lines of the RAM chips and the write enable and chip select lines are also connected to a first input/output port
  • the microprocessor chip IC1 (type No.8085), the first I/O port IC3, a second I/O port IC2 (type No.8156), a programmable read only memory (PROM) IC5 (type No.2716/4802) , and address line buffer IC4 (type No. 74LS373) all form part of a microcomputer for (i) reading data out of the RAM chips IC8 and IC9 in a predetermined order and transmitting it in serial form to the host computer via line buffer IC17 (type No.1488) and RS232 compatible output port 22, and (ii) receiving serial commands at an input port 20 via a line buffer IC16
  • An 8-bit multiplexed data and address bus AD0 to AD7 interconnects the microprocessor IC1 with the two 1/0 ports IC2 and IC3, and with the PROM IC5 via buffer IC4.
  • the RS232 compatible ports 20 and 22 shown in Figure 3C may be replaced in a known manner by a USART (Universal Synchronous and Asynchronous Receiver/Transmitter) interface using a device such as the Intel 8251 to allow the use of modem control lines.
  • USART Universal Synchronous and Asynchronous Receiver/Transmitter
  • the second 1/0 port IC2 ( Figure 3A) couples the microprocessor to a dual-in-line switch array 46 whose settings determine (a) the required baud rate for the transmission and reception of data to and from the host computer, (b) whether the data link is a full duplex or half duplex one, (c) the type of handshake signals, and (d) the data format (depending on the facilities available in the host computer) .
  • Port IC2 also serves for the receipt of parallel setting-up bits for the function select controller comprising two parts.
  • the first part shown in Figure 3A, for channel selection, is a simple buffer IC18 (type No.ULN 2003) for selecting one of four tuning voltages .available on four present potentiometers 48A to 48D via relays RR1 to RR4.
  • Four lamps 50 indicate which channel is selected, and an LED bar graph display comprising two LED devices 52A and 52B (both type No.3914) indicates the tuning voltage level.
  • the second part of the function select controller (shown in Figure 3B), for page selection, is a series of gates IC11A, IC11B, IC12A, IC12B, IC13A, and IC13B on three CMOS chips (type No.4529B) which convert the parallel setting-up bits from the port IC2 into a command format suitable for control interface integrated circuits IC14 and IC15 (type Nos.SAA5000A and SAA5012 respectively, manufactured by Mullard Limited) which are interconnected in known manner to provide two control signals for the teletext decoder 12 ( Figure 1) at the DATA and DLIM output terminals of IC15.
  • CMOS chips type No.4529B
  • the DATA signal is a 7-bit amplitude modulated digital signal in which groups of data bits designate page numbers, whilst the DLIM signal is a clock signal used by the decoder 12 as a reference for receiving the DATA signal.
  • the overall function of the mircoprocessor, function select controller, and control interface with regard to the control of the decoder 12 is to convert serial ASCII commands, e.g. page "158" into the 7-bit serial DATA signal compatible with the decoder 12, specifically with the control inputs of the SAA 5040 integrated circuit in the decoder 12, as referred to earlier in this description.
  • the PROM IC5 ( Figure 3C) stores mainly the operating software for the microprocessor IC1, a look-up table governing the setting-up bits corresponding to ASCII command signals received from the host computer, and a look-up table determining the order in which data lines are read out of the RAM.
  • the operation of the mirco ⁇ processor as governed by the software will be described below with reference to the flow charts of Figures 4 to 93, but first it is convenient to summarise the operation of the system as a whole with reference to Figures 1 and 3A to 3D. Broadcast television signals are received in tuner 10 and the demodulated composite video signal is fed to the teletext decoder 12 where the teletext data is extracted.
  • the extracted data is supplied in serial form in the decoder to the SAA5050 selector stage 12B in the decoder, which, according to the control signals fed to its DATA input 14 from the control interface 26, selects particular pages of the incoming teletext data from the incoming stream and writes the selected data in real time byte by byte into the RAM 18 (IC8 and IC9 in Figure 3D) in an order governed by the address line connections between the RAM and the selector stage 12B.
  • the tuner 10 and demodulator part 12A of the decoder 12 are largely dispensed with, the signals being fed directly via a telephone line interface to a selector stage.
  • the RAM 16 is controlled by the microprocessor 18 to receive bytes from the selector stage 12B only during specific periods.
  • the microprocessor 18 interprets the command and. with the aid of the look-up table stored in PROM (IC5), it generates plurality of setting-up bits which are in turn converted by the function select controller 24 and the control interface 26 ( Figure 1) to.the appropriate DATA signals.
  • the RAM 16 is enabled so that over a period of about 12 seconds it stores the teletext, data corresponding to the selected pages as it is received from the teletext decoder 12. After 12 seconds the RAM updating is disabled and the stored page of data is read out character by character in the required order, each character being converted preferably to a serial ASCII byte for sending to the computer.
  • channel selection is performed in a similar manner to page selection in "that an incoming channel command from the host computer such as "BBC2" is interpreted using the look-up table, and the appropriate setting-up bits transmitted to the channel selection relays RR1 to RR4 ( Figure 3A) .
  • the appropriate tuning voltage is thus transmitted to varicap tuning diodes in the tuner 10 to tune the tuner to the required TV channel.
  • the basic operating sequence begins at switch on with the initialisation (step 100) of program variables such as the setting of internal flags and the defining of outputs.
  • step 101 the ports of the I/O device IC2 and IC3 are set up as inputs or outputs as appropriate and the settings on the dual-in ⁇ line switch 46 ( Figure 3A) are read, these settings then being examined in steps 102 to 105 to determine whether the host computer handshake type is the EN /ACK type or not, whether transmission to the host computer is to be full duplex or half duplex, and whether the host computer data format allows the use of graphics, colour, etc.
  • Step 106 is only necessary if the link between the host computer and the microprocessor is under modem control (USART) as referred to above.
  • USBART modem control
  • Step 107 enables the microoprocessor interrupts and selects the base channel (in this example BBC1) so that the tuner 10 is set accordingly. This completes the operations performed at switch-on. Thereafter in steps 108 to 114 the processor is waiting for a command, storing the command, processing the command, and trans ⁇ mitting received teletext data to the host computer. All of these steps are elaborated below.
  • step 113 updating of the RAM 16 is one of the operations required in processing a command, which is step 113 in Figure 4.
  • the processor 18 receives a command the RAM is updated with data from the selected page.
  • the processor reads the status of the ports on IC3 to determine whether the gates IC6, IC7 and IC10 ( Figure 3D) are open, and then in steps 116 and 117 it opens the gates if they are not already open.
  • a delay of 12 seconds is allowed by step 118 for updating the RAM from the teletext decoder 12, and then the stored data is sent to the host computer.
  • the exchange of characters between the microprocessor 18 and the host computer is governed by the flow charts of Figure 7.
  • the input of characters to the microprocessor 18 begins with the processor looking for an input in step 120. If the transmission link is a duplex link it transmits an echo character back to the host computer (step 121), and if it has received an ENQ handshake signal it transmits an acknowledgement signal ACK (step 122).
  • the end of a command or page number is signified by the characters DC2 and on recognising this the processor processes the command and/or gets the required page from the RAM 16 and sends it to the host computer (step 123). If there is no DC2 end of command terminator or carriage return,the character is either part of a command or a control code, and the processor either respectively stores the command character In the processor buffer or returns immediately to waiting for another character.
  • the sending of a character to the host computer begins with the disabling of the microprocessor interrupts In step 125, and, in the case of a USART modem controlled system, checks for modem control signals in steps 126 and 127. The character is then sent to the host computer in step 128. After a short delay and the re-enabling of the microprocessor interrupts, and if the system .is operating on a* duplex link, the processor determines in step 129 whether or not the character it has just sent was an echo of an incoming character from the host computer.
  • the processor returns to the routines for processing a command ( Figure 8 below) or for sending a page to the host computer ( Figure 9 below) .
  • the processor looks at the buffer (step 130) for a command, and then in steps 131 to 133 determines whether the command is a channel selection command, a reset command, or a oggle flag (i.e. the host computer will not control data transfer).
  • -the command is any of these it either respectively causes the selection of the required channel, initialises the system, or prepares itself to receive further characters from the host computer (step 134) . If the command is a page number, none of these tests are satisfied, and the processor checks that the first character is a number (step 135), stores the number, gets the next number, checks it, stores it and so on until it has stored three numbers (all pages must have
  • the processor checks whether, whilst it was waiting, the host computer tried to interrupt, and, if so, whether the interrupt was a handshake signal ENQ (in which case it sendsthe acknowledgement signal ACK), or whether it was a 'break' (steps 144 to 147).
  • a 'break' is a command from the host computer requiring that the data in the RAM be sent without waiting for further updating (step 148). If no handshake signal or break signal was received, the identity of the page in the RAM is checked and, if correct, the page is sent to the host computer (steps 149 and 148).
  • the purpose of B is to enable the system to try 5 times if necessary to obtain the required page before transmitting the contents of the RAM to the computer (step 150).
  • Step 151 clears the host computer input register and sets up a line count B to the number of lines expected (normally 24). Since the teletext data is not transmitted by the TV broadcasting organisations in the order in which it would normally appear on a TV screen, and since the data is first stored in the RAM in a interlaced line format, the mircroprocessor requires a look-up table to determine the order in which data is to be read out of the RAM so that the host computer receives it byte by byte in the correct line order for display.
  • the look-up table which forms part of the microprocessor program stored in -the PROM, is set up in step 152.
  • the line to the host computer is checked (if the. computer has a handshake system) by transmitting the ENQ signal and checking for receipt of the
  • step 158 the low and high RAM addresses are set up on the address bus so that the micro ⁇ processor can access the RAM, in step 159 the RAM is enabled, and in step 160 the first character is read out of the RAM. In step 161 the RAM is disabled whilst the received character is
  • step 163 15 to the character (step 163) before converting the character to serial form and sending it to the computer (step 164) .
  • the character is .examined for being either a normal character, in which case it is sent .out tp the computer immediately - 20 (steps 165 and 164), or a control " character, in which case it is examined to see whether it is an alphanumeric character, a graphics control character, or neither of these (steps 166 and 167) .
  • An alphanumeric code gives rise to the transmission of a "graphics off" signal to the host computer (step 168) followed
  • a graphics control code causes a "graphics on" signal to be fed to the computer (step 169). If it is neither an alphanumeric or a graphics control code, a space is transmitted (step 170).
  • a wait flag is detected (see step 133 in Figure 8) and the processor enters the character input routine of Figure 7 (steps 173 and 174) and waits for a 'break' command, handshake signal, or DC2 carriage return signal (steps 175 to 177).
  • the processor decrements the line count by 1 and -gets the next line address from the look-up table (153). In this manner the lines of teletext data are read off the RAM in the correct order.

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

Un système d'extraction de données, destiné principalement à permettre à un ordinateur d'utiliser des services d'informations du type "viewdata" ou "teletext", stocke des parties sélectionnées de données correspondant, par exemple, à l'une des pages d'informations transmises et envoie les données byte par byte à l'ordinateur dans l'ordre suivant lequel les caractères alphanumériques représentés par les bytes apparaissent dans la page. A cet effet, les données sélectionnées en temps réel par un décodeur de "teletext" ou "viewdata" (12) sont écrites dans une mémoire vive (RAM) (16) pendant un intervalle de temps prédéterminé suffisant pour accumuler une page d'informations dans la mémoire, et stockées en mémoire (16) en un format de lignes entrelacées. Après l'intervalle de temps, un microprocesseur (18), à l'aide d'une table de consultation, extrait byte par byte les lignes de données de la mémoire dans l'ordre suivant lequel les lignes apparaissent dans la page, et convertit ces bytes en un courant de données codées en ASCII en série et pouvant être destinées au stockage, au traitement ou à l'affichage dans un certain nombre de types différents d'ordinateurs. Le système permet également la conversion de commandes, tels des numéros de page, en une forme indiquée pour la commande de la sélection de données dans le décodeur (12).
EP19840903972 1983-10-26 1984-10-26 Systeme d'extraction de donnees Withdrawn EP0160066A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB838328601A GB8328601D0 (en) 1983-10-26 1983-10-26 Data retrieval system
GB8328601 1983-10-26

Publications (1)

Publication Number Publication Date
EP0160066A1 true EP0160066A1 (fr) 1985-11-06

Family

ID=10550759

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19840903972 Withdrawn EP0160066A1 (fr) 1983-10-26 1984-10-26 Systeme d'extraction de donnees

Country Status (5)

Country Link
EP (1) EP0160066A1 (fr)
JP (1) JPS61500246A (fr)
AU (1) AU577494B2 (fr)
GB (2) GB8328601D0 (fr)
WO (1) WO1985002082A1 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2172474A (en) * 1985-03-12 1986-09-17 Philips Electronic Associated Handling data packets
AU614330B2 (en) * 1988-02-27 1991-08-29 Alcatel N.V. User guide for data terminal
GB8909115D0 (en) * 1989-04-21 1989-06-07 Rca Licensing Corp Improvements in applications for information transmitted in the vertical retrace interval of a television signal
KR900017403A (ko) * 1989-04-28 1990-11-16 이헌조 텔리텍스트 수신 최적 포인트 자동 저장 방법
GB8922702D0 (en) * 1989-10-09 1989-11-22 Videologic Ltd Radio television receiver
GB9006415D0 (en) * 1990-03-22 1990-05-23 Rca Licensing Corp Providing tv program information
US5251909A (en) * 1991-05-28 1993-10-12 Reed Michael J Secured high throughput data channel for public broadcast system
IN187949B (fr) * 1992-11-27 2002-07-27 Io Res Pty Ltd
GB9404873D0 (en) * 1993-10-02 1994-04-27 Amulet Electronics Ltd Television broadcast distribution systems
JPH09247632A (ja) * 1996-03-04 1997-09-19 Sony Corp 抽出装置および抽出方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1585100A (en) * 1976-09-06 1981-02-25 Gen Electric Co Ltd Electronic display apparatus
GB2054328B (en) * 1979-07-20 1983-03-30 Technalogics Computing Ltd Teletext decoder
FI76893C (fi) * 1980-09-29 1988-12-12 Honeywell Inf Systems Kommunikationsmultiplexer med dubbla mikroprocessorer.
DE3114734A1 (de) * 1981-04-11 1982-10-28 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Einrichtung zur datenuebertragung zwischen einem rechner und externen teilnehmern
FR2514974B1 (fr) * 1981-10-15 1986-11-28 Telediffusion Fse Systeme de diffusion de donnees par paquets
DE3210893C2 (de) * 1982-03-25 1984-01-05 Standard Elektrik Lorenz Ag, 7000 Stuttgart Geräteanordnung mit einem Fernsehempfangsgerät und einem Videdoaufnahme- und/oder -wiedergabegerät

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO8502082A1 *

Also Published As

Publication number Publication date
AU3557784A (en) 1985-05-22
JPS61500246A (ja) 1986-02-06
WO1985002082A1 (fr) 1985-05-09
AU577494B2 (en) 1988-09-22
GB2149277A (en) 1985-06-05
GB8328601D0 (en) 1983-11-30
GB2149277B (en) 1987-07-08

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