DE102012016487B4 - Image module for a screen - Google Patents

Abstract

An image module (1) for a modular screen having a plurality of adjacent image modules sequentially connected in a chain, each image module comprising: a) an image signal input (2) for receiving an image signal (3), the captured image signal (3) a1 ) defines an overall image to be displayed on the screen, and a2) has an input clock, b) an image processing unit (5) which calculates the image detail of the entire image to be displayed from the input image signal (3) and an image display unit (6) for C) a signal generation unit (10), d) a signal distribution unit (11) which forwards the image signal (3) respectively to the image processing unit (5) and the signal generation unit (10), e) its own clock generator (9) which generates an output clock independent of the input clock, f) an image signal output (8) for outputting the image signal (3) to the n logical image module (1) in the chain of modules of the image screen, wherein the signal generating unit (10) generates the on the image signal output (8) output image signal from the image signal and the output clock newly generated.

Description

Field of the invention

The invention relates to an image module for a modular screen.

State of the art

Image walls, consisting of several individual image modules, are increasingly being used to present multimedia video content on large areas. The individual images of the individual image modules give a coherent overall picture. The number of image modules is arbitrary and depends on the size of the desired screen. In order to achieve a coherent overall picture on the screen, each image module must either have the corresponding subframe fed by its own image generator, or the image modules must have their own image processing in order to extract the required subframes from a high-resolution input image. The 1A - 1C show the principle of splitting a high-resolution input image onto a screen consisting of several individual modules. Here, the high-resolution input image must be distributed to all image modules. This can be done by distributing the image in a star shape to all image modules via an image distributor, as shown in 2 is shown. However, this principle has the disadvantage that on the one hand the signal distributor is required as an additional component and the star-shaped distribution makes a very high cabling effort necessary. For picture walls consisting of a large number of individual picture modules, therefore, a large number of signal distributors and connection cables is required.

As an alternative to this topology, it makes sense that each image module provides the input signal at a signal output again and thus "loopes through" to the next image module, as shown in FIG 3 is shown. This topology results in a significantly lower cabling effort. However, it must be ensured that the image signal has a consistent quality over the entire chain even with a high number of image modules and does not deteriorate from module to module.

The principle of looping through the high-resolution input image is known in media technology and is used in many devices. It is also known that the signal quality decreases over the number of image modules, so that after a certain number of image modules visible image errors occur. It is known that from five devices in a row can be expected with image errors. To reduce these errors, two types of technologies are known, namely the so-called "Reclocking" and the other, the so-called "Refreshing".

Thus, the input signal is transmitted over a plurality of signal lines, with some signal lines transmitting the color information, while other signal lines carry synchronization information. The information is transmitted with a system clock. The clock signal of the system clock system-conditioned has a certain variability (clock jitter). In order to be able to pass on the input image signal to a downstream image module, it must be received by an active component in the image module. Then it has to be distributed to the image processing electronics of the image module and to the active transmission electronics in order to pass it on to the downstream image module. The 4 and 5 show this basic structure for two different variants in which once the image signal is first processed with a receiving electronics and then distributed ( 4 ), or even before it is received, is distributed to the internal image processing electronics and the transmission electronics ( 5 ).

Both principles have the problem that already present in the input signal signal errors are passed on to the next image module. In order to prevent this or to reduce this effect, in the known principle of the so-called "Reclockings" the signal, before it is provided at the output, re-clocked with a new clock synchronously to the input signal (sampled). This will reduce problems caused by excessive clock jitter. However, the clock generator with which the signal is resampled must oscillate synchronously with the input clock so as not to lose image information. It is known that, despite this technology, the number of image modules which can be switched one after the other is limited. For large screens with a high number of individual image modules, this technology is therefore not a solution.

Another known problem with the signal distribution of high-frequency picture signals is the fact that the signal edges are increasingly being looped out. Although the image signal is to be transmitted in digital form (on / off), the image signal is technologically conditioned to filter out, which causes the signal to "loop out", which is shown schematically in FIG 6 is shown.

In the known principle of "Refreshing" trying to supplement the received signal with the help of electronic components for signal enhancement. Often special equalizer stages are used here to filter out disturbances or to get the original signal as well as possible restore. Again, it is known that this technique is an improvement, but also has a limit on the number of image modules that can be switched in succession. This is based on the fact that the technology is also trying to improve the already faulty or disturbed signal by filtering again.

Despite resampling or reclocking, each output signal still has a portion of the signal error of the input signal, to which then a system-related further portion of the transmission electronics and the cable connection is added. As a result, the errors add up over several stages until the signal from the receiving electronics can no longer be evaluated without error. Thus, the number of image modules that can be switched in succession is limited, despite the known methods. In the case of large image walls with a high number of individual image modules, this represents an increased amount of cabling since it is additionally necessary to work with image signal distributors in a star-shaped topology.

It is state of the art that the individual image modules have an image signal input at which the reproduced resolutions and frame rates are automatically detected. The resolution of the input image is detected on the basis of the input signal and used to calculate the necessary sub-image. It is known that when a change in the input signal or in the change of certain features of the input signal, the resolution is newly detected. This provides for non-constant signals or poor signal quality to short-term image failures due to the automatic re-detection.

US 2008/0143637 A1 discloses a screen which consists of a plurality of chain-shaped successively connected image modules. In this case, the image signal is looped along the chain from one image module to the next image module. In contrast, the clock signal is extracted from the image signal in the first image module of the chain and then transmitted along a separate clock line from the image signal along the chain of image modules. The clock signal thus bypasses the receiver / transmitter in the individual image modules and is therefore less distorted. However, this requires a separate clock line.

US 2002/0036708 A1 does not disclose a daisy-chain chain of image modules, but only a circuit for generating a synchronization signal.

US 2011/0050709 A1 Although discloses a screen consisting of several image modules. However, the individual image modules are controlled in parallel, thereby circumventing the problems described above. However, the parallel control of the individual image modules requires a much higher cabling effort.

US 6 646 645 B2 and US Pat. No. 7,499,044 B2 each disclose an image display system having a plurality of image modules, each of which generates and reproduces an independent image signal and is synchronized via a clock line. The image signal is not looped through the individual image modules.

Description of the invention

The invention is therefore based on the object to provide an image module that can be used in large numbers in a modular screen, without the problems described above when looping through the high-resolution input signal occur.

This object is achieved by an inventive image module according to the main claim.

The image module according to the invention is provided for a modular screen which has numerous adjacent and sequentially connected in a chain image modules.

In this case, the image module according to the invention has an image signal input for recording an image signal, wherein the image signal defines an overall image which is to be displayed on the screen,

In addition, the image module according to the invention has an image signal output for outputting the image signal to the next image module in the chain of image modules of the image wall.

Furthermore, the image module according to the invention has an image reproduction unit (eg a rear projection screen) for reproducing an image detail of the overall image.

Furthermore, the image module according to the invention contains an image processing unit. On the one hand, this image processing unit calculates the image detail of the overall image to be displayed from the image signal recorded on the input side and controls the image reproduction unit for reproducing the image detail. On the other hand, this image processing unit forwards the image signal to the image signal output.

According to the invention, it is now provided that the image processing unit regenerates the image signal recorded at the image signal input and then forward the newly generated image signal to the image signal output.

According to the invention, the image signal received at the image signal input has an input clock, just as the newly generated image signal output at the image signal output has an output clock. To generate the output clock, a first clock generator is provided, which is independent of the input clock, so that the output clock is independent of the input clock.

The image signal, consisting of the image data and the image clock, is preferably conducted by a receiving electronics to the image processing unit of the image module. There, in a signal distribution stage, the image signal is forwarded on one side to the further image processing for display, and on the other side the pure image data is forwarded to a signal generation stage. This signal generation stage then regenerates the output signal based on the image data and an external clock signal. This newly displayed image signal consisting of image data and image clock is then passed to the transmission electronics, to be passed on to the next image module.

Unlike the principle of "reclocking" described above, in which the clock signal must be synchronous to the clock of the input signal to regenerate the output signal, according to the invention a clock signal independent of the input signal is used in this principle. This clock signal is generated by an external clock generator and thus has no timing error of the input clock. As a result, the output signal has a "fresh" clock signal. The signal generation stage also ensures that an error-free binary image signal is sent to the transmission electronics, so that there is also a clean signal here. However, since the clock signal for regenerating the output signal is not synchronous with the input clock, it may happen that the number of clock cycles for one line or the entire output image differ from the input image. In order to compensate for this deviation, the method according to the invention allows a deviation in the number of clock cycles between input and output image. In order to compensate for this deviation, the actual image signal description is not used in the signal generation stage, but adapted to the clock cycles of the external clock generator.

The image signal taken on the input side usually has different signal components, such as a vertical synchronization signal, a horizontal synchronization signal, a vertical blanking interval, a horizontal blanking interval, an active image signal, which reproduces the overall image, and a specific frame rate. When the image signal is newly generated, the image processing unit preferably takes over the active image signal and the frame rate, whereas the image processing unit can change the horizontal blanking interval and / or the vertical blanking interval when the image signal is recreated.

The image signal usually consists of two areas: The active image content and the inactive image area, the so-called blanking intervals ( 9A ). In order to be able to distinguish these areas from one another, an additional image signal is transmitted in addition to the clock signal (PCLK) which signals each pixel and to the synchronization signals for the horizontal (HSYNC) and vertical (VSYNC) signal signals the active image area (DA -Signal). The image signal is described by a fixed number of pixels (pixels) for the active area, as well as for the size of the inactive area and the synchronization pulse lengths. The pixel clock signals each pixel. The horizontal synchronization signal indicates the end of the line and the active picture content is signaled by a DA signal ( 9B ). Each line of the image signal is characterized by the number of pixels in front of the active image area (A), the number of pixels in the active image area (B), the number of pixels from the end of the active image area to the beginning of the horizontal synchronization pulse (C) and Duration of the horizontal synchronization pulse described as the number of pixels (D). In order to compensate for the non-synchronous clock signal of the output image generation, the inventive method for generating the output signal uses the above-described characteristics A, B and C, but not the characteristic D. The system does not produce the output signal completely as described in the information of the input signal , but leaves the length of the horizontal synchronization pulse variable to compensate for differences between the clock frequencies can.

As a result, the total number of pixels per line of the output signal does not necessarily correspond to the number of pixels per line of the input signal and may vary across the individual lines of the image. The input and output signals differ only in the length of the horizontal synchronization pulse.

The method according to the invention is not fixed for the duration of the synchronization pulse for adaptation. The ranges before or after the synchronization pulse (characteristics A and C) can also be used for the adaptation.

This technique of regenerating the image signal provides a perfect image signal at the output of each image module as input to the next image module. This makes it possible to connect any number of image modules in succession and to be able to pass on the image signal without the generation of signal errors. According to the invention, the output signal of each image module has a frame rate identical to the original signal (frame rate), a size identical to the original signal of the active image content and a constant pixel clock (PCLK), but variable sizes of the blanking intervals. Another important prerequisite for this method is therefore the necessity that the image modules do not evaluate the length of the horizontal synchronization pulse and the total number of pixels per line at the input, since this is not constant due to the system. Therefore, the image processing electronics according to the invention are characterized in that only the pixel clock (PCLK) and the signal for the active image area (DA signal) and the vertical synchronization signal for the video end (VSYNC) are used for processing.

It should also be noted that the invention is not limited to a single image module but also includes a complete screen having a plurality of such image modules.

Brief description of the drawings

The 1A - 1C show a high-resolution input image ( 1A ), a screen with four image modules ( 1B ) and the representation of the input image on a screen ( 1C ).

2 shows the principle of signal distribution of a high-resolution input image on a screen with a signal distributor.

3 shows the principle of signal distribution of a high-resolution input image on a screen in the form of looping the signals through the individual image modules.

4 shows the principle of signal forwarding to another image module, wherein the received image signal is first processed with a receiving electronics.

5 shows the principle of signal forwarding to another image module, wherein the image signal received on the input side is passed directly to the next image module.

6 shows the grinding of the digital image signal (dashed line) due to the analog transmission from one image module to the next image module.

7 shows the basic principle of the invention of the regeneration of the original image in the image module.

8th schematically shows the principle of image generation in the image processing electronics of an image module.

9A shows an active image area and an inactive image area of the input image.

9B shows clock and synchronization signals for one picture line.

Detailed description of the drawings

7 shows an inventive image module 1 that is at an image signal input 2 an image signal 3 which represents a high-resolution input image.

The image signal 3 is in the image module 1 from a receiving electronics 4 received and sent to an image processing electronics 5 forwarded, with the image processing electronics 5 from the image signal 3 the image section calculated on the respective image module 1 the modular screen should be displayed. The image processing electronics controls with this image section 5 a picture display unit 6 which may, for example, have a rear projection screen.

In addition, the image processing electronics generated 5 the image signal recorded on the input side 3 new and gives the newly generated image signal to a transmission electronics 7 Next, the newly generated image signal then s.ein Bildsignalausgang 8th for the next image module in the chain of image modules.

8th shows a detailed representation of this image module 1 In order to avoid repetition, reference is made to the above description, wherein the same reference numerals are used for corresponding details.

It can also be seen from this detailed representation that a separate clock generator 9 is provided to the image signal 3 in a signal generation unit 10 to be able to regenerate independently of the input clock.

In addition, from this presentation is still a signal distributor 11 It can be seen that the input high-resolution image signal 3 to the image processing electronics 5 for controlling the image display unit 6 and to the signal generation unit 10 forwards.

The invention is not limited to the preferred embodiments described above. Rather, a variety of variants and modifications is possible, which also make use of the inventive concept and therefore fall within the scope. Furthermore, the invention also claims protection for the subject matter and the features of the subclaims independently of the features of the respective claims.

LIST OF REFERENCE NUMBERS

1

Imaging module

2

Image signal input

3

image signal

4

receiving electronics

5

Image processing electronics

6

Image reproduction unit

7

transmission electronics

8th

Image signal output

9

clock generator

10

Signal generation unit

11

signal distributor

Claims (4)

Image module ( 1 ) for a modular screen comprising a plurality of adjoining and sequentially connected image modules, each image module comprising: a) an image signal input ( 2 ) for receiving an image signal ( 3 ), wherein the recorded image signal ( 3 ) a1) defines an overall image to be displayed on the screen, and a2) has an input clock, b) an image processing unit ( 5 ), which from the input side recorded image signal ( 3 ) calculates the image detail of the overall image to be displayed, and an image display unit ( 6 ) drives to reproduce the image section, c) a signal generation unit ( 10 ), d) a signal distribution unit ( 11 ), which transmits the image signal ( 3 ) each to the image processing unit ( 5 ) and the signal generation unit ( 10 ), e) its own clock generator ( 9 ) which generates an output clock independent of the input clock, f) an image signal output ( 8th ) for outputting the image signal ( 3 ) to the next image module ( 1 ) in the chain of picture modules of the screen, the signal generating unit ( 10 ) at the image signal output ( 8th ) generated image signal from the image signal and the newly generated output clock generated. Image module ( 1 ) according to claim 1, characterized in that the image signal recorded on the input side ( 3 ) comprises the following signal components: a vertical synchronization signal, a horizontal synchronization signal, a vertical blanking interval, a horizontal blanking interval, an active picture signal, 3 ), which reproduces the overall image, - a frame rate, - a clock signal for each pixel (pixel clock) that the image processing unit ( 5 ) in the regeneration of the image signal ( 3 ) the active image signal ( 3 ) and the frame rate takes over that the horizontal blanking interval and / or the vertical blanking interval are variable with respect to the output signal. Image module ( 1 ) according to one of the preceding claims, characterized in that the image signal ( 3 ) is a serial signal, in particular a DVI signal or a DisplayPort signal that the image module ( 1 ) at the image signal input ( 2 ) has a serial / parallel converter, in particular a TMDS receiver, the serial image signal ( 3 ) into a parallel image signal ( 3 ) converts the image module ( 1 ) at the image signal output ( 8th ) has a parallel / serial converter, in particular a TMDS transmitter, the parallel image signal ( 3 ) back into the serial picture signal ( 3 ) converts. Screen for reproducing a large-scale overall image with a plurality of image modules adjoining one another in the screen and each reproducing an image section of the overall image, wherein the image modules are connected in series in the form of a chain, characterized in that the individual image modules according to one of the preceding claims are.

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