DE102006003835A1 - Fabrication method for semiconductor modules and components for substrates e.g. coils and antennas, involves pressing wafer on to substrate, with welding by ultrasound - Google Patents
Fabrication method for semiconductor modules and components for substrates e.g. coils and antennas, involves pressing wafer on to substrate, with welding by ultrasound Download PDFInfo
- Publication number
- DE102006003835A1 DE102006003835A1 DE102006003835A DE102006003835A DE102006003835A1 DE 102006003835 A1 DE102006003835 A1 DE 102006003835A1 DE 102006003835 A DE102006003835 A DE 102006003835A DE 102006003835 A DE102006003835 A DE 102006003835A DE 102006003835 A1 DE102006003835 A1 DE 102006003835A1
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- semiconductor wafer
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
- G06K19/07752—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna using an interposer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Die vorliegende Erfindung betrifft eine Verbindungstechnik zum Verbinden von Halbleiterwafern mit geöffneten Kontaktfenstern mit metallischen oder auf ihrer Oberseite metallische Strukturen aufweisenden Substraten wie z.B. Spulen/Antennen. Insbesondere betrifft die Erfindung eine kostengünstige Bumpingtechnik von Halbleiterwafern mit z.B. Abmessungen von 200 mm oder 300 mm im CMOS-Prozess der Halbleiterfabrik. Gut geeignet ist das erfindungsgemäße Verfahren zur Herstellung von impedanzkontrollierten elektronischen Schaltungen, z.B. Flip Chip Direktkontaktierungen an geätzten Aluminiumspulen für passive und aktive Transponder im Radiofrequenz- (13,56 MHz) oder UHF-Bereich (860–900 MHz).The The present invention relates to a connection technique for connection of semiconductor wafers with open Contact windows with metallic or metallic on their top Having structures such as e.g. Coil / antenna. Especially The invention relates to a low-cost bumping technique of semiconductor wafers with e.g. Dimensions of 200 mm or 300 mm in the CMOS process of Semiconductor factory. The process according to the invention is well suited for the production of impedance-controlled electronic circuits, e.g. Flip Chip direct contacts on etched aluminum coils for passive and active transponders in the radio frequency (13.56 MHz) or UHF range (860-900 MHz).
Der breite Einsatz der passiven Transpondertechnik zum Ersatz oder der Erweiterung von Barcodes zur Produktauszeichnung wird immer noch stark von den Aufbaukosten begrenzt. Die Chipkosten selbst sind durch extreme Miniaturisierung auf ca. 0,3 mm2 und die Herstellung der ICs auf 200 mm bzw. 300 mm schon stark verringert worden. Die Aufbautechnik selbst stellt derzeit einen großen Kostenfaktor dar, weil die ICs auf hochwertige, temperaturbeständige Zwischenträger mit Edelmetall-Deckschicht der Leiterbahnen montiert werden müssen, die erst nachfolgend mit den Antennen verbunden werden. Die Kontaktierung der ICs wird wegen der geringen Aufbauhöhe in der Regel als Flip Chip ausgeführt. Die eingesetzten Kontaktierungstechniken (leitfähiges Kleben, Presskontaktierung, Lötung) setzen alle eine Kontakterhebungsstruktur (Kontaktbump) auf den ICs voraus. Diese Kontaktbumps werden derzeit überwiegend von externen Dienstleistern aufgebracht, was Nachteile hinsichtlich der Transport- und anderer Kosten und der Verlagerung von Verantwortlichkeit auf Dritte nach sich zieht. Die Wafer müssen danach gedünnt und elektrisch getestet werden. Kontaktbumps aus galvanisch abgeschiedenen Edel- und Buntmetallen kommen ebenso zum Einsatz wie aufgeschweißte Goldkugeln (Stud Bumps) und außenstromlos abgeschiedene Nickelbumps mit Au- bzw. PdAu- Deckschicht. Es sind auch Lotbumps in unterschiedlichen Lotlegierungen im Einsatz. Alle Kontaktierungsverfahren streben flache Aufbauten an, mit zuverlässig niedrigem Kontaktwiderstand und Feuchtresistenz.The widespread use of passive transponder technology to replace or extend bar codes for product labeling is still severely limited by the cost of assembly. The chip costs themselves have been greatly reduced by extreme miniaturization to about 0.3 mm 2 and the production of the ICs to 200 mm and 300 mm. The construction technique itself is currently a major cost factor, because the ICs must be mounted on high-quality, temperature-resistant intermediate carrier with noble metal cover layer of the tracks, which are only subsequently connected to the antennas. The contacting of the ICs is usually performed as a flip chip because of the low height. The contacting techniques used (conductive bonding, press contacting, soldering) all require a contact bump structure (contact bump) on the ICs. These contact bumps are currently mostly sourced from external service providers, which entails disadvantages in terms of transportation and other costs and the transfer of responsibility to third parties. The wafers must then be thinned and electrically tested. Contact bumps made of electroplated precious and non-ferrous metals are also used, as are welded gold balls (stud bumps) and electrolessly deposited nickel bumps with Au or PdAu cover layers. There are also solder bumps in different solder alloys in use. All contacting methods aim at flat constructions with reliably low contact resistance and moisture resistance.
Der Markt wird auf einige Milliarden Transponder pro Jahr in Europa geschätzt. Die akzeptablen Aufbaukosten für das Bumping und die Chipkontaktierung liegen derzeit im Bereich von 2,3 Eurocent.Of the Market will be on several billion transponders per year in Europe estimated. The acceptable construction costs for Bumping and chip contacting are currently in the range from 2,3 eurocent.
Aufgabe der vorliegenden Erfindung ist es, ein Verfahren bereitzustellen, mit dem derartige Strukturen kostengünstig realisiert werden können. Vorzugsweise bietet das Verfahren zusätzliche technische Vorteile. Aufgabe der vorliegenden Erfindung ist ferner die Bereitstellung solcher Strukturen mit vorzugsweise besonders stabilen Kontaktmetallisierungen.task the present invention is to provide a method can be realized inexpensively with such structures. Preferably the procedure offers additional technical advantages. Object of the present invention is further the provision of such structures preferably with particular stable contact metallizations.
Die Aufgabe wird dadurch gelöst, dass ein Verfahren bereitgestellt wird, umfassend die folgenden Schritte:
- (1) Bereitstellen eines Halbleiterwafers, dessen Oberseite mit einem oder mehreren nach oben offenen metallischen Kontakten (Kontaktfenstern) versehen ist,
- (2) Aufbringen mindestens einer dünnen Aluminium-Kontakterhebung in leitender Verbindung mit jeweils einem der metallischen Kontakte,
- (3) Ausrichten der Oberseite des Halbleiterwafers parallel und zur Oberseite ("Landefläche") eines metallischen oder auf dieser Oberseite metallische Strukturen aufweisenden Substrats hin, und zwar ggf, derart, dass die Aluminium-Kontakterhebung(en) auf dem Halbleiterwafer mit (einer) metallischen Strukturen) des Substrats fluchtet/fluchten, oder vice versa,
- (4) Anpressen des Halbleiterwafers an das Substrat,
- (5) Anschweißen des Halbleiterwafers an das Substrat mittels Ultraschall.
- (1) providing a semiconductor wafer whose upper side is provided with one or more upwardly open metallic contacts (contact windows),
- (2) applying at least one thin aluminum contact bump in conductive communication with each of the metallic contacts,
- (3) aligning the top surface of the semiconductor wafer parallel and to the top surface (\ "landing surface \") of a metallic or metallic substrate, if necessary, such that the aluminum contact bump (s) on the semiconductor wafer are aligned with (a) metallic structures) of the substrate are aligned, or vice versa,
- (4) pressing the semiconductor wafer against the substrate,
- (5) Welding the semiconductor wafer to the substrate by means of ultrasound.
Mit Hilfe des erfindungsgemäßen Verfahrens erhält man ein Halbleiterbauteil mit einer aluminiumgebondeten aktiven Struktur, z.B. einer Spule/Antenne.With Aid of the process according to the invention is obtained Semiconductor device having an aluminum-bonded active structure, e.g. a coil / antenna.
Das Verfahren zeichnet sich dadurch aus, dass es sehr schnell ist, bei Raumtemperatur durchgeführt werden kann und den Einsatz von Edelmetallen unnötig macht. Das erhaltene Halbleiter-Bauteil besitzt eine Kontaktmetallisierung, die thermisch sehr belastbar ist. Insbesondere dann, wenn das Metall des Substrats Aluminium ist und/oder der zu verbindende Kontakt im IC aus Aluminium besteht, ist die erhaltene Aluminium-Aluminium(-Aluminium)-Kontaktmetallisierung thermodynamisch und elektrochemisch sehr stabil. Weil sich das Ultraschallkontaktierungsverfahren vor allem für ICs mit geringer Kontaktanzahl eignet, ist es insbesondere für die Herstellung von Transpondern ideal, denn diese weisen in der Regel nur zwei Kontakte und zwei Hilfskontakte auf. Im Vergleich zum leitfähigen Kleben und Löten besteht kein Problem mit Kurzschlüssen durch verdrängtes Kontaktierungsmaterial. Hierdurch können kleine Transponder ICs direkt auf geätzte Spulen mit sehr schmalen Trenngräben zwischen den Spulenenden kontaktiert werden.The Method is characterized by the fact that it is very fast at Room temperature performed can be and makes the use of precious metals unnecessary. The obtained semiconductor device has a contact metallization, which is thermally very resilient. Especially when the metal of the substrate is aluminum and / or the one to connecting contact in the IC is made of aluminum, the obtained Aluminum-aluminum (-aluminium) -Kontaktmetallisierung thermodynamically and electrochemically very stable. Because the ultrasonic contacting process especially for It is particularly suitable for the manufacture of low-contact ICs of transponders ideal, because these usually have only two Contacts and two auxiliary contacts. Compared to conductive bonding and soldering there is no problem with short circuits due to displaced contacting material. This allows small transponder ICs directly on etched coils with very narrow separating trenches be contacted between the coil ends.
Nachstehend soll die Erfindung unter Bezugnahme auf die beigefügten Figuren anhand eines Ausführungsbeispiels näher erläutert werden.below the invention is with reference to the accompanying figures based on an embodiment be explained in more detail.
Das Beispiel zeigt eine Flip-Chip Montage, die bevorzugt ist. Gegebenenfalls kann das erfindungsgemäße Verfahren aber auch für eine Montage eines metallischen bzw. metallische Strukturen aufweisenden Substrats auf der Oberseite eines ICs eingesetzt werden.The Example shows a flip-chip mounting, which is preferred. Possibly can the inventive method but also for a mounting of a metallic or metallic structures having Substrate can be used on the top of an IC.
Ein
Halbleiterwafer
Die Aluminiumdünnschicht wird in besonders geeigneter Weise durch Sputtern oder Hochratensputtern mit einer Schichtdicke von vorzugsweise etwa 3 μm bis 15 μm abgeschieden. Ein Sputterätzprozess kann zuvor in situ angewendet werden, um die Drahtbondflächen zu reinigen und einen niedrigen Kontaktwiderstand zu gewährleisten. Alternativ kann die Aluminiumschicht auch anders, z.B. aufgedampft, galvanisch abgeschieden oder mittels Kaltgasspritzen aufgebracht werden. Die Strukturierung der Schicht erfolgt vorzugsweise jeweils lithographisch. Die Kontakterhebungen können aber auch mit Hilfe einer Maske direkt strukturiert aufgebracht werden. Geeignete Verfahren hierfür sind z.B. das Arbeiten mit einer Lift-Off Lackmaske oder einer Schattenmaske. Besonders günstig ist es, wenn die Kontakterhebungen dabei eine pyramidale Struktur erhalten. Diese Struktur kann man in natürlicher Weise durch Ätzen der Aluminiumstrukturen erreichen. Bevorzugt lassen sich hierfür nasschemische Ätzverfahren einsetzen, aber natürlich können auch Trockenätzverfahren geeignet sein. Die pyramidale Struktur verteilt die eingeleitete mechanische Belastung während der Kontaktierungsphase auf eine größere Chipfläche und schützt so den Chip vor mechanischer Überbeanspruchung.The aluminum thin film is particularly suitable by sputtering or high rate sputtering deposited with a layer thickness of preferably about 3 microns to 15 microns. A sputter etching process can be previously applied in situ to the wire bonding surfaces too clean and to ensure a low contact resistance. Alternatively, the aluminum layer may be different, e.g. evaporated, galvanically deposited or applied by means of cold gas spraying become. The structuring of the layer is preferably carried out in each case lithographically. The Kontakterhebungen can also with the help of a Mask applied directly structured. Suitable methods therefor are e.g. working with a lift-off paint mask or a shadow mask. Very cheap it is when the contact elevations receive a pyramidal structure. This structure can be found in natural Way by etching reach the aluminum structures. For this purpose, preference can be given to wet-chemical etching processes use, but of course can also dry etching be suitable. The pyramidal structure distributes the initiated mechanical stress during the contacting phase on a larger chip area and thus protects the chip from mechanical overstress.
Es
ist möglich,
die zu verbindende aktive Struktur (im vorliegenden Beispiel die
um das Substrat
Der
Halbleiterwafer, in
In einer speziellen Ausführungsform der Erfindung wird das Verfahren zum Ankontaktieren eines Zwischenträgers an einen Halbleiterwafer eingesetzt. Zwischenträger können dazu beitragen, die Chipkosten zu senken, indem sie in Verbindung mit sehr kleinen Chips eingesetzt werden, die beispielsweise Abmessungen von nur ca. 0,2 bis 1mm aufweisen. Mit Hilfe der – deutlich größeren – Zwischenträger können die Abstände zwischen den Kontakten, die auf dem Chip notgedrungen sehr gering sind, gegenüber der Spule oder sonstigen aktiven Struktur deutlich vergrößert werden. Hierfür besitzt der Zwischenträger geeignete Kontakte zur Kontaktierung mit dem Chip. Diese Kontakte sind über geeignete Leiterbahnen mit weiter außenliegenden Kontakten zur Kontaktierung mit der Spule oder der anderen aktiven Struktur verbunden. Diese Kontakt- und Leiterstrukturen befinden sich auf einer geeigneten Trägerfolie. Die Leiterstrukturen können ggf. nach außen hin isoliert sein, um einen ungewollten Kontakt mit Leiterstrukturen wie Spulenwindungen auf der Spule oder dgl. zu vermeiden. Für die Trägerfolie können kostengünstige, elektrisch nicht leitende Trägermaterialien mit niedrigen Glasübergangstemperaturen eingesetzt werden, beispielsweise High Density Polyethylen (HDPE), Polyimid (PI), PVC, PC, ABS.In a specific embodiment of the invention, the method for contacting ei nes intermediate carrier to a semiconductor wafer. Intermediate carriers can help reduce chip costs by using them in conjunction with very small chips, for example, having dimensions of only about 0.2 to 1 mm. With the help of the - much larger - intermediate carrier, the distances between the contacts, which are necessarily very small on the chip, compared to the coil or other active structure can be significantly increased. For this purpose, the intermediate carrier has suitable contacts for contacting the chip. These contacts are connected via suitable tracks with more external contacts for contacting with the coil or the other active structure. These contact and conductor structures are located on a suitable carrier foil. The conductor structures may possibly be insulated to the outside in order to avoid unwanted contact with conductor structures such as coil windings on the coil or the like. For the carrier film inexpensive, electrically non-conductive substrates with low glass transition temperatures can be used, for example, high density polyethylene (HDPE), polyimide (PI), PVC, PC, ABS.
Der Zwischenträger wird dann seinerseits mit Hilfe eines gängigen Verfahrens an eine Spule oder dergleichen ankontaktiert, derart, dass der Transponder IC sandwichartig zwischen Spule und Zwischenträger zu liegen kommt. Der Zwischenträger kann ggf. Aluminium-Leiterbahnen für Cross-Over über Spulenwindungen aufweisen.Of the subcarrier is then in turn by means of a common method to a coil or the like, such that the transponder IC is sandwiched between coil and intermediate carrier to come to rest. The intermediate carrier If necessary, aluminum tracks can be used for cross-over coil turns exhibit.
Das Verfahren besticht neben den bereits weiter oben erwähnten Vorteilen durch die relativ kurze Haltezeit und die Möglichkeit, bei Raumtemperatur arbeiten zu können.The Process stands out in addition to the advantages already mentioned above due to the relatively short holding time and the possibility of room temperature to work.
Claims (18)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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DE102006003835A DE102006003835A1 (en) | 2005-08-18 | 2006-01-26 | Fabrication method for semiconductor modules and components for substrates e.g. coils and antennas, involves pressing wafer on to substrate, with welding by ultrasound |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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DE102005039477.9 | 2005-08-18 | ||
DE102005039477 | 2005-08-18 | ||
DE102006003835A DE102006003835A1 (en) | 2005-08-18 | 2006-01-26 | Fabrication method for semiconductor modules and components for substrates e.g. coils and antennas, involves pressing wafer on to substrate, with welding by ultrasound |
Publications (1)
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DE102006003835A1 true DE102006003835A1 (en) | 2007-02-22 |
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DE102006003835A Ceased DE102006003835A1 (en) | 2005-08-18 | 2006-01-26 | Fabrication method for semiconductor modules and components for substrates e.g. coils and antennas, involves pressing wafer on to substrate, with welding by ultrasound |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006037532A1 (en) * | 2006-08-10 | 2008-02-14 | Siemens Ag | Method for producing an electrical functional layer on a surface of a substrate |
EP1958131A2 (en) * | 2005-12-05 | 2008-08-20 | Smartrac IP B.V. | Chip card and method for production of a chip card |
DE102008002102A1 (en) | 2008-05-30 | 2009-12-03 | Robert Bosch Gmbh | Isolated retaining flange for an electrical machine |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5347086A (en) * | 1992-03-24 | 1994-09-13 | Microelectronics And Computer Technology Corporation | Coaxial die and substrate bumps |
EP1050903A1 (en) * | 1999-04-21 | 2000-11-08 | TDK Corporation | Ultrasonic bonding method and ultrasonic bonding apparatus |
EP1432021A2 (en) * | 2002-12-17 | 2004-06-23 | Omron Corporation | Manufacturing method for electronic component module and electromagnetically readable data carrier |
-
2006
- 2006-01-26 DE DE102006003835A patent/DE102006003835A1/en not_active Ceased
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5347086A (en) * | 1992-03-24 | 1994-09-13 | Microelectronics And Computer Technology Corporation | Coaxial die and substrate bumps |
EP1050903A1 (en) * | 1999-04-21 | 2000-11-08 | TDK Corporation | Ultrasonic bonding method and ultrasonic bonding apparatus |
EP1432021A2 (en) * | 2002-12-17 | 2004-06-23 | Omron Corporation | Manufacturing method for electronic component module and electromagnetically readable data carrier |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1958131A2 (en) * | 2005-12-05 | 2008-08-20 | Smartrac IP B.V. | Chip card and method for production of a chip card |
DE102006037532A1 (en) * | 2006-08-10 | 2008-02-14 | Siemens Ag | Method for producing an electrical functional layer on a surface of a substrate |
US8395257B2 (en) | 2006-08-10 | 2013-03-12 | Siemens Aktiengesellschaft | Electronic module and method for producing an electric functional layer on a substrate by blowing powder particles of an electrically conductive material |
DE102008002102A1 (en) | 2008-05-30 | 2009-12-03 | Robert Bosch Gmbh | Isolated retaining flange for an electrical machine |
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