CN215298224U - Core board and computer equipment - Google Patents

Abstract

The embodiment of the utility model provides a core plate and computer equipment, which relates to the technical field of computers, wherein the core plate comprises a CPU, a bridge sheet and a COM-HPC connector; the CPU is electrically connected with the bridge chip through a bus; wherein, the CPU and the bridge chip are independent chips; the bridge piece is electrically connected with the COM-HPC connector. The utility model discloses in the nuclear core plate that provides, use two independent chip modules of CPU and bridgeware to carry out the processing of data on nuclear core plate, be more convenient for realize the update upgrading of CPU or bridgeware, and the cost of upgrading CPU or bridgeware alone is lower. In addition, core boards with different function series can be combined based on CPUs and bridge chips with different models, and differentiation requirements of different customers can be met.

Description

Core board and computer equipment

Technical Field

The utility model relates to a computer technology field especially relates to a nuclear core plate and computer equipment.

Background

In recent years, with rapid development of communication technology, introduction of concepts such as artificial intelligence and edge computing, and further evolution of PCIe (Peripheral Component Interconnect Express) interface standard, a trend toward high-performance computing is great for COM (modular computer), and a technical specification of COM-HPC (high-performance computing modular computer) is brought about. The speed of various high speed interfaces of COM-HPC is significantly increased over COM Express and the number of connector pins is nearly doubled.

Currently, core boards developed based in part on the COM-HPC specification include chipsets that integrate multiple functions. When hardware of part of functions in a chipset needs to be updated, the core board generally needs to be updated, so that the updating and upgrading of products are not flexible and convenient enough and the cost is high.

SUMMERY OF THE UTILITY MODEL

In view of the above problems, a core board and a computer device are proposed to overcome the above problems or at least partially solve the above problems, so as to solve the problems that the existing core board is not flexible and convenient to update and has high cost.

In order to solve the above problem, in one aspect, the present invention discloses a core board, which includes a CPU, a bridge chip, and a COM-HPC connector;

the CPU is electrically connected with the bridge chip through a bus; wherein, the CPU and the bridge chip are independent chips;

the bridge piece is electrically connected with the COM-HPC connector.

Optionally, the interface of the bridge chip covers COM-HPC server type and/or COM-HPC client type

Optionally, the bridge chip includes a PCIE bus interface, an ETH interface, a USB bus interface, an SATA bus interface, and an audio/video interface.

Optionally, the COM-HPC connector comprises a primary connection interface and a secondary connection interface, wherein the primary connection interface comprises a power supply interface and a partial data transfer interface, and the secondary connection interface is used to extend the data transfer interface;

and the interfaces of the bridge piece are correspondingly connected with the primary connecting interfaces and the secondary connecting interfaces one to one.

Optionally, the core board further includes a memory slot, the memory slot is electrically connected to the CPU, and the memory slot is used for plugging a memory bank.

Optionally, the core board further includes a board-mounted particle memory chip fixed by bonding, and the board-mounted particle memory chip is electrically connected to the CPU.

Optionally, the CPU includes at least two DDR bus interfaces, and the DDR bus interfaces are used to expand the memory.

Optionally, the core board is of any one of Size a, Size B, Size C, Size D, and Size E.

On the other hand, the utility model also discloses a computer device, which comprises a bottom plate and any core plate;

the backplane and the core board are electrically connected through the COM-HPC connector.

Optionally, the COM-HPC connector comprises a COM-HPC socket or a COM-HPC plug;

the COM-HPC socket is integrated on the core board, the COM-HPC plug is integrated on the bottom board, and the COM-HPC socket is electrically connected with the COM-HPC plug in a plugging manner; or the like, or, alternatively,

the COM-HPC socket is integrated on the bottom plate, the COM-HPC plug is integrated on the core plate, and the COM-HPC socket is electrically connected with the COM-HPC plug in a plugging mode.

The embodiment of the utility model provides a include following advantage:

the utility model discloses in the nuclear core plate that provides, based on COM-HPC design, adopt COM-HPC connector as the expansion interface of being connected with the bottom plate, can realize the data transmission of high-speed large capacity. And moreover, the core board is used for processing data by using two independent chip modules of the CPU and the bridge chip, so that updating and upgrading of the CPU or the bridge chip are more convenient to realize, and the cost for independently upgrading the CPU or the bridge chip is lower. In addition, core boards with different function series can be combined based on CPUs and bridge chips with different models, and differentiation requirements of different customers can be met.

Drawings

Fig. 1 is a block diagram of a first core board according to the present invention;

fig. 2 is a block diagram of a second core board according to the present invention;

FIG. 3 is a block diagram of a third core board according to the present invention;

fig. 4 is a block diagram of a fourth core board according to the present invention.

Detailed Description

In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention is described in detail with reference to the accompanying drawings and the detailed description.

Referring to FIG. 1, the present embodiment provides a core board comprising a CPU10, a bridge chip 11, and COM-HPC 12 connectors;

the CPU10 and the bridge chip 11 are electrically connected through a bus; the CPU10 and the bridge chip 11 are independent chips; the bridge piece 11 is electrically connected to the COM-HPC connector 12.

Specifically, in order to meet the application requirements of different industries, a standardized processing board + interface board product model appears in the modular computer industry. A processing board is a carrier board configured with a main processing chip and an associated interface connector, and mainly performs an arithmetic processing function of data, and is also called a core board. The interface board realizes the expansion function of the peripheral interface mainly based on the interface connector consistent with the core board, and the interface board is also called as a bottom board. For example, a common mature core board is a CPCI (Compact Peripheral Component Interconnect) core board designed based on a CPCI connector, and the backplane corresponds to a CPCI backplane.

As shown in fig. 1, in the embodiment of the present invention, a core board is designed based on a high-speed data transmission interface COM-HPC, and the core board includes a CPU10 (Central Processing Unit), a bridge 11, and a COM-HPC connector 12. The CPU10 and the bridge 11 are core devices for performing data arithmetic processing in the core board, and may be connected to each other via a HT bus (high-speed-Transport) to perform high-speed data transmission. It should be noted that the CPU10 and the bridge 11 may be formed by bondingThe formula welded fastening is on the circuit board, also can adopt the cartridge to lock fixedly in the chip carrier. The COM-HPC connector 12 is a high-speed transmission Interface based on the COM-HPC specification, and can provide high-bandwidth Serial interfaces such as PCIe 5.0(Peripheral Component Interconnect Express), SATA3.0 (Serial ATA), USB4.0 (Universal Serial Bus), 25G ethernet, and the like, and can also provide Serial Peripheral Interface (SPI), I²C (Inter-Integrated Circuit, bi-directional two-wire synchronous serial bus), UART (Universal Asynchronous Receiver/Transmitter), and the like. For example, a COM-HPC connector 12 is a two-row 800pin connector, which ensures flexibility in computer modules and interfaces. In the embodiment of the present invention, after the CPU10 and the bridge chip 11 are connected by the HT bus, the bridge chip 11 and the COM-HPC connector 12 are welded by the trace on the circuit board. For example, the CPU10 and the bridge 11 used in the embodiment of the present invention may be a chip combination of a loongson No. 3 series CPU and a loongson No. 7 series bridge. In practical application, the CPU10 may be a multi-core CPU having 4 cores, 8 cores, 16 cores, 32 cores, 64 cores, and the like, pins of various types of CPUs 10 are compatible with each other, pins of various types of bridge pieces 11 are compatible with each other, and the CPUs 10 of different types and the bridge pieces 11 of different types may be combined in different combinations to meet different scene requirements.

The embodiment of the utility model provides an in, based on COM-HPC technical specification, adopt COM-HPC connector as the expansion interface of being connected with the bottom plate, can realize the data transmission of high-speed large capacity. And moreover, the core board is used for processing data by using two independent chip modules of the CPU and the bridge chip, so that updating and upgrading of the CPU or the bridge chip are more convenient to realize, and the cost for independently upgrading the CPU or the bridge chip is lower. In addition, core boards with different function series can be combined based on CPUs and bridge chips with different models, and differentiation requirements of different customers can be met.

Optionally, the interfaces of the bridge-chip 11 overlay a COM-HPC server type and/or a COM-HPC client type.

Specifically, in one embodiment, a COM-HPC server type is defined for high performance computing and a COM-HPC client type is defined for embedded computing, respectively, in the COM-HPC specification. Therefore, the number and types of the interfaces of the bridge chip 11 according to the embodiment of the present invention may only match with the COM-HPC server type or the COM-HPC client type, and the server device or the client device may be constructed by using the core board. In order to make the single core board satisfy the usage scenario of high-performance computing and embedded computing, the interface of the bridge chip 11 used in the embodiment of the present invention may be compatible with the COM-HPC server type and the COM-HPC client type, that is, the interface of the bridge chip 11 may integrate the interface satisfying both the COM-HPC server type and the COM-HPC client type. The core board has wider application scenes and small limitation.

Optionally, referring to fig. 2, the bridge chip 11 includes a PCIE bus interface, an ETH interface, a USB bus interface, a SATA bus interface, and an audio/video interface.

Specifically, in one embodiment, as shown in fig. 2, the bridge chip 11 may include a PCIE bus interface, an ETH (EtherNet) interface, a USB bus interface, a SATA bus interface, and an audio/video interface. It is understood that the data transmission protocol versions supported by these PCIE bus interface, ETH interface, USB bus interface, SATA bus interface, and audio/video interface are all consistent with the COM-HPC connector 12, for example, the PCIE bus interface may be PCIE 5.0 interface consistent with the COM-HPC connector 12; the ETH interface may be a 25G ethernet interface; the USB bus interface can be a USB4.0 interface; a USB3.0 interface and a USB2.0 interface can be provided to be compatible with a low-rate interface and adaptively connected with peripherals with different transmission rates; the SATA bus interface can be a SATA3.0 interface; the audio/video Interface may include a sound card Interface and different types of video interfaces such as RGB (High Definition Multimedia Interface), HDMI (High Definition Multimedia Interface), LVDS (Low-Voltage Differential Signaling), and the like. It should be noted that, in addition to the conventional functional interfaces described above, the bridge chip 11 may also provide SPI, I consistent with the COM-HPC connector 12²C. UART and the like to extend the connection of more peripherals with different transmission protocols.

Optionally, referring to fig. 2, the COM-HPC connector 12 includes a primary connection interface 121 and a secondary connection interface 122, wherein the primary connection interface 121 includes a power supply interface and a partial data transmission interface, and the secondary connection interface 122 is used to extend the data transmission interface;

the interfaces of the bridge plate 11 are connected with the primary connection interfaces 121 and the secondary connection interfaces 122 in a one-to-one correspondence.

Specifically, in one embodiment, as shown in FIG. 2, the COM-HPC connector 12 may include a primary connection interface 121 and a secondary connection interface 122, regardless of whether the COM-HPC connector 12 is for a COM-HPC server type device or a COM-HPC client type device. To facilitate the connection of the interfaces, the primary connection interface 121 and the secondary connection interface 122 are illustrated separately by two rectangular boxes in fig. 2. The total number of pins provided by the two columns of interfaces can reach 800 pins, and can meet requirements of PCIe 5.0, SATA3.0, USB4.0, 25G Ethernet, SPI and I²C. UART, and the like. The main connection interface 121 at least needs to include a power interface and a data transmission interface, for example, a power interface corresponding to Pwr, VCC _ SBY, and GND (not shown in the figure) for controlling power supply, and a data transmission interface such as a PCIe interface, a CSI interface, an Ethernet interface, and a USB interface for data transmission. The secondary connection interface 122 is used to further expand the data transmission function of the COM-HPC connector 12, and more PCIe, Ethernet and USB interfaces may be added. It should be noted that functionally, the secondary connection interface 122 may implement the same data transmission function as the primary connection interface 121, but the transmission rate of the same functional interface may be different, for example, the Ethernet interface of the primary connection interface 121 may be NBASE-T (max, 10G), and the Ethernet interface of the secondary connection interface 122 may be ETH _ KR (max, 25G).

When the bridge chip 11 is connected to the COM-HPC connector 12, the PCIe interface, the Ethernet interface, and the USB interface of the bridge chip 11 are respectively connected to the interfaces with the same functions in the COM-HPC connector 12 through corresponding buses, for example, a PCIe bus is used to connect the PCIe interface of the bridge chip 11 to the PCIe interface of the COM-HPC connector 12, and an SATA bus is used to connect the SATA bus interface of the bridge chip 11 to the SATA bus interface of the COM-HPC connector 12, so as to ensure that the COM-HPC connector 12 can normally and reliably transmit data according to the corresponding data communication protocol.

Optionally, referring to fig. 3, the core board further includes a memory socket 14, the memory socket 14 is electrically connected to the CPU10, and the memory socket 14 is used for plugging a memory bank.

Specifically, In an embodiment, as shown In fig. 3, the core board further includes a Memory slot 14, where the Memory slot 14 may be any one of SIMM (single In-line Memory Module), DIMM (Dual In-line Memory Module), and RIMM (Rambus In-line Memory Module), for example, when the Memory slot 14 is a DIMM-type slot, it may adopt a slot supporting DDR3(Double Data Rate 3, third generation Double speed Memory) or DDR4(Double Data Rate 4, fourth generation Double speed Memory), and accordingly, the Memory performance is higher, the capacity is larger, the Data integrity is stronger, and the energy consumption is lower. The memory is expanded by adopting a slot structure, so that the memory is more convenient to maintain and upgrade.

Optionally, referring to fig. 4, the core board further includes a particle memory chip 15 mounted on the board, and the particle memory chip 15 is electrically connected to the CPU 10.

Specifically, in one embodiment, as shown in fig. 4, the above core board may further include an on-board pellet memory chip 15 directly soldered and fixed on the circuit board by an SMT process, so that the on-board pellet memory chip 15 is electrically connected to the CPU 10. The core board has good vibration and impact resistance and can work under severe working conditions. In addition, the efficiency that the form that fixed board of paste welding carries granule memory chip to compare the interpolation memory strip in the memory groove can further promote the memory bus can also reduce the whole height of nuclear core plate, can satisfy the user demand in comparatively narrow space to still do benefit to heat radiation structure's preparation, use board when adopting the memory of same capacity specification carries granule memory chip can reduce the material cost of nuclear core plate.

Optionally, the CPU10 includes at least two DDR bus interfaces, and the DDR bus interfaces are used to expand the memory.

Specifically, in an implementation manner, the CPU10 used in the core board of the embodiment of the present invention may include at least two DDR bus interfaces, so that at least two memory slots or at least two memory chips may be connected in an expanded manner, and even eight DDR bus interfaces may be included in the case that the operational capability of the CPU10 supports. It is understood that the greater the number of DDR bus interfaces, the more memory that can be extended and the higher the performance of the core board. When the CPU10 supports the establishment of two channels, four channels, and eight channels, the performance of a plurality of memories can be fully exerted by adopting the connection modes of two channels, four channels, and eight channels, respectively.

Optionally, the core board is of any one of Size a, Size B, Size C, Size D, and Size E.

Specifically, in one embodiment, the core board of an embodiment of the present invention may be designed to be any of Size a, Size B, Size C, Size D, Size E, with reference to the definition of COM-HPC. Specifically, the Size of the Size A type core plate is 95mm × 120mm, the Size of the Size B type core plate is 120mm × 120mm, the Size of the Size C type core plate is 160mm × 120mm, the Size of the Size D type core plate is 160mm × 160mm, and the Size E type core plate is 200mm × 160 mm. The core boards with different sizes can flexibly meet the layout and use requirements of the chassis spaces with different sizes. For example, for core boards of two larger sizes, Size D and Size E, more memory slots or onboard granular memory banks can be laid out and can be adapted to COM-HPC server types. The three types of core boards for Size A, Size B, and Size C may be adapted for COM-HPC client types.

The embodiment of the utility model also provides a computer device, which comprises a bottom plate and any core plate of the previous embodiment;

the backplane and core boards are electrically connected through the COM-HPC connector 12.

There is provided in this embodiment a computer device comprising a backplane and a core board, as shown in fig. 1, the core board comprising a CPU10, a bridge 11 and COM-HPC 12 connectors. The CPU10 is electrically connected to the bridge 11, and the bridge 11 is electrically connected to the COM-HPC connector 12. Compared with the traditional scheme, the computer equipment adopts the COM-HPC connector 12 as an expansion interface connected with the backplane, and can realize high-speed and large-capacity data transmission. And moreover, the core board is used for processing data by using two independent chip modules of the CPU and the bridge chip, so that updating and upgrading of the CPU or the bridge chip are more convenient to realize, and the cost for independently upgrading the CPU or the bridge chip is lower. In addition, core boards with different function series can be combined based on CPUs and bridge chips with different models, and differentiation requirements of different customers can be met.

The base board and the core board are electrically connected through the COM-HPC connector 12, and the functional interface on the core board can be connected with the base board through the COM-HPC connector 12, so that the functional interface of the core board can be expanded. In addition, in practical application, the base plate and the core plate can be arranged in a stacked manner up and down based on the size of the box body of the computer equipment and the layout space of the internal components of the computer equipment, so that the internal space of the computer equipment is saved. Of course, the core board and the bottom board may be juxtaposed in the same plane in a case where the internal space is sufficient. The embodiment of the utility model provides an in do not restrict the relative position relation of bottom plate and nuclear core plate.

Optionally, the COM-HPC connector 12 comprises a COM-HPC socket or a COM-HPC plug;

the COM-HPC socket is integrated on the core board, the COM-HPC plug is integrated on the bottom board, and the COM-HPC socket is electrically connected with the COM-HPC plug in a plugging manner; or the like, or, alternatively,

the COM-HPC socket is integrated on the bottom plate, the COM-HPC plug is integrated on the core plate, and the COM-HPC socket is electrically connected with the COM-HPC plug in a plugging mode.

Specifically, in one embodiment, the COM-HPC connector 12 described above may comprise a COM-HPC socket or a COM-HPC plug configured for mating in pairs. When the COM-HPC socket is integrated on the core board, accordingly, the COM-HPC plug may be integrated on the base board, and the bridge piece 11 is electrically connected to the pin contacts of the sockets on the COM-HPC socket, and is electrically connected to the base board by plugging the pins of the COM-HPC plug into the sockets on the COM-HPC socket. Conversely, when the COM-HPC socket is integrated on the backplane, accordingly, the COM-HPC plug may be integrated on the core board, and the bridge 11 is electrically connected to the pins of the COM-HPC plug in contact and is electrically connected to the sockets of the COM-HPC socket through the pins of the COM-HPC plug in a plugging manner, which is also a way to realize high-speed signal transmission between the core board and the backplane.

The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.

Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.

The embodiments provided by the present invention are described in detail above, and the principle and the implementation of the present invention are explained herein by applying specific embodiments, and the above description of the embodiments is only used to help understand the method and the core idea of the present invention; meanwhile, for the general technical personnel in the field, according to the idea of the present invention, there are changes in the specific implementation and application scope, to sum up, the content of the present specification should not be understood as the limitation of the present invention.

Claims (10)

1. A core board, comprising: the core board comprises a CPU, a bridge chip and a COM-HPC connector;

the CPU is electrically connected with the bridge chip through a bus; wherein, the CPU and the bridge chip are independent chips;

the bridge piece is electrically connected with the COM-HPC connector.

2. Core board according to claim 1, wherein the interfaces of the bridge-slice overlay a COM-HPC server type and/or a COM-HPC client type.

3. The core board of claim 2, wherein the bridge chip at least includes a PCIE bus interface, an ETH interface, a USB bus interface, a SATA bus interface, and an audio/video interface.

4. The core board of claim 3, wherein the COM-HPC connector comprises a primary connection interface and a secondary connection interface, wherein the primary connection interface comprises a power supply interface and a partial data transfer interface, and wherein the secondary connection interface is configured to extend the data transfer interface;

and the interfaces of the bridge piece are correspondingly connected with the primary connecting interfaces and the secondary connecting interfaces one to one.

5. The core board of claim 1, further comprising memory sockets, the memory sockets electrically connected to the CPU, the memory sockets configured to receive memory banks.

6. The core board of claim 1, further comprising a die-on-board die attached by adhesive bonding, the die-on-board die being electrically connected to the CPU.

7. The core board of any one of claims 1-6, wherein the CPU comprises at least two DDR bus interfaces, the DDR bus interfaces for extended memory.

8. Core board according to any of claims 1-6, wherein the core board is of any of the type Size A, Size B, Size C, Size D, Size E.

9. A computer device comprising a backplane and the core board of any of claims 1-8;

the backplane and the core board are electrically connected through the COM-HPC connector.

10. The computer device of claim 9, wherein the COM-HPC connector comprises a COM-HPC socket or a COM-HPC plug;

the COM-HPC socket is integrated on the core board, the COM-HPC plug is integrated on the bottom board, and the COM-HPC socket is electrically connected with the COM-HPC plug in a plugging manner; or the like, or, alternatively,

the COM-HPC socket is integrated on the bottom plate, the COM-HPC plug is integrated on the core plate, and the COM-HPC socket is electrically connected with the COM-HPC plug in a plugging mode.

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