CN212696010U - Network communication interface of real-time simulator of active power distribution network - Google Patents

Network communication interface of real-time simulator of active power distribution network Download PDF

Info

Publication number
CN212696010U
CN212696010U CN202021623162.8U CN202021623162U CN212696010U CN 212696010 U CN212696010 U CN 212696010U CN 202021623162 U CN202021623162 U CN 202021623162U CN 212696010 U CN212696010 U CN 212696010U
Authority
CN
China
Prior art keywords
data
network
module
control signal
simulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202021623162.8U
Other languages
Chinese (zh)
Inventor
雷金勇
郭祚刚
袁智勇
徐敏
谈赢杰
王�琦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Southern Power Grid Co Ltd
Research Institute of Southern Power Grid Co Ltd
Original Assignee
China Southern Power Grid Co Ltd
Research Institute of Southern Power Grid Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China Southern Power Grid Co Ltd, Research Institute of Southern Power Grid Co Ltd filed Critical China Southern Power Grid Co Ltd
Priority to CN202021623162.8U priority Critical patent/CN212696010U/en
Application granted granted Critical
Publication of CN212696010U publication Critical patent/CN212696010U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Power Sources (AREA)

Abstract

The application discloses network communication interface of active power distribution network real-time simulator includes: the system comprises a simulation data receiving module, a shared memory, a network communication processor, an MAC module, a network data transceiving module and a memory manager; the simulation data receiving module receives simulation result data, writes the simulation result data into the shared memory, and sends a control signal to the memory manager to apply for distributing a new data storage area; the shared memory stores simulation result data and network data packets; the network communication processor realizes data communication among the modules; the MAC module realizes data communication between the real-time simulator and the computer system; the network data transceiver module receives the network data packet sent by the MAC module, writes the network data packet into the shared memory, and sends a control signal to the memory manager after the network data packet is written; and the memory manager performs memory allocation according to the control signal. The application improves the speed of simulation data output and meets the data output requirement of the real-time simulator of the active power distribution network.

Description

Network communication interface of real-time simulator of active power distribution network
Technical Field
The utility model relates to a network communication interface technical field, in particular to network communication interface of active power distribution network real-time simulator.
Background
The continuous development and application of distributed power generation, flexible power transmission and distribution technologies and intelligent power distribution and distribution technologies are causing deep changes in the structure and function of the traditional power distribution network. The active power distribution network is connected with various distributed power sources and a large number of power electronic devices on the basis of the traditional power distribution network, the dynamic process of the active power distribution network is more complex compared with that of the traditional power distribution network, and real-time simulation research on the active power distribution network is an important method for recognizing the dynamic characteristics of the active power distribution network and developing key device tests. However, the real-time simulation of the active power distribution network faces the problems of large simulation scale, small step size requirement and high precision requirement, and a faster and more efficient calculation method and a hardware platform are required.
As a new type of programmable logic device, a field-programmable gate array (FPGA) has an inherent high degree of parallelism, and is being popularized and applied in the field of high-performance computing. The FPGA is used as real-time simulation computing hardware, so that the cost can be reduced, the simulation speed can be increased, and the simulation scale can be enlarged, so that the real-time simulation of the active power distribution network by using the FPGA becomes a research hotspot.
In order to perfect the function of the real-time simulator of the active power distribution network, a network communication interface which is communicated with an upper computer is required to be added into the real-time simulator, so that the access to the FPGA real-time simulator is realized by using a computer system and matched software, a better human-computer interaction interface is realized for the FPGA real-time simulator, and the application scene of the FPGA real-time simulator is expanded.
The realization of a high-speed network interface module in an FPGA real-time simulator has the following difficulties: firstly, a multifunctional network interface module is realized to simultaneously support various complex network protocols; the network interface module and the module for bearing the real-time calculation task are positioned in the same FPGA, and the network interface module is required to occupy few hardware resources, so that the influence on the simulation capability of the FPGA real-time simulator is reduced; the traditional hardware interrupt mode has high requirements on a processor when processing real-time network data flow, and cannot ensure real-time transmission of data when performing small-step simulation and using a simplified processor; the reduced processors do not have sufficient speed to implement I/O of large real-time data streams.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide an active distribution network real-time simulator's network communication interface to solve the technical problem of communication difficulty between real-time simulator and the computer system based on FPGA.
In order to realize the purpose, the specific scheme is as follows:
a network communication interface of an active power distribution network real-time simulator comprises: the system comprises a simulation data receiving module, a shared memory, a network communication processor, an MAC module, a network data transceiving module and a memory manager;
the simulation data receiving module receives simulation result data of a real-time simulator, writes the simulation result data into an idle data storage area of a shared memory, and sends a control signal to the memory manager to apply for allocating a new data storage area when the data storage area for storing the simulation result data is full;
the shared memory stores the simulation result data and the network data packet written by the network data transceiver module, and when a data storage area for storing the simulation result data is full, the simulation result data is sent to the network communication processor;
the network communication processor realizes data communication among the modules, initializes the MAC module, writes a starting data transmission control signal into the shared memory, processes the simulation result data to generate a network data packet, sends a control signal to the memory manager and sends the network data packet to the network data transceiver module;
the MAC module realizes data communication between the real-time simulator and a computer system;
the network data transceiver module receives a network data packet sent by the MAC module, writes the network data packet into the shared memory, and sends a control signal to the memory manager after the network data packet is written into the shared memory;
and the memory manager allocates non-conflicting memory areas to the simulation data receiving module, the network communication processor and the network data transceiver module according to a control signal.
Optionally, the network communication processor comprises: the device comprises an instruction memory, an instruction decoding module, a control module, a jump processing module, an arithmetic processing module and a register set;
the instruction decoding module reads and decodes the instruction in the instruction memory;
the arithmetic processing module receives data from the control module and performs arithmetic operation;
the jump processing module realizes the functions of selection, circulation and shutdown of the network communication processor according to a jump instruction sent by the controller;
the register group stores instructions and output results of the arithmetic processing module and the jump processing module;
the control module accesses the register group and the shared memory to read operands, sends control signals to the arithmetic processing module and the jump processing module, and writes output results of the arithmetic processing module and the jump processing module into the register group and the shared memory.
Optionally, the allocating, by the memory manager according to the control signal, non-conflicting memory regions for the simulation data receiving module, the network communication processor, and the network data transceiver module specifically includes: the control signal is an application storage area control signal sent by the network communication processor, a received data control signal of the simulation data receiving module and a starting data transmission control signal sent by the network data receiving and sending module.
Optionally, a data receiving control signal output interface of the simulation data receiving module is connected to a data receiving control signal input interface of the memory manager, a data output interface of the simulation data receiving module is connected to a data input interface of the shared memory, and a simulation result data input interface of the simulation data receiving module is connected to a simulation data output interface of the real-time simulator.
Optionally, a data input interface of the shared memory is connected to a data output interface of the simulation data receiving module, a data output interface of the shared memory is connected to a data input interface of the network data transceiver module, and a start data transmission control signal input interface of the shared memory is connected to a start data transmission control signal output interface of the network communication processor.
Optionally, the application storage area control signal output interface of the network communication processor is connected to the application storage area control signal input interface of the memory manager, the start data transmission control signal output interface of the network communication processor is connected to the start data transmission control signal input interface of the shared memory, the start signal output interface of the network communication processor is connected to the start signal input interface of the real-time emulator, and the initialization signal output interface of the network communication processor is connected to the initialization signal output input interface of the MAC module.
Optionally, a start data transmission control signal output interface of the network data transceiver module is connected to a start data transmission control signal input interface of the memory manager, a data input interface of the network data transceiver module is connected to a data output interface of the shared memory, and a network data input/output interface of the network data transceiver module is connected to a network data input/output interface of the MAC module.
Optionally, a data receiving control signal output interface of the simulation data receiving module is connected to a data receiving control signal input interface of the memory manager, a data output interface of the simulation data receiving module is connected to a data input interface of the shared memory, and a simulation data input interface of the simulation data receiving module is connected to a simulation data output interface of the real-time simulator.
Optionally, the initialization signal output/input interface of the MAC module is connected to the initialization signal output interface of the network communication processor, the network data input/output interface of the MAC module is connected to the network data input/output interface of the network data transceiver module, and the ethernet communication interface of the MAC module is connected to a computer system.
Optionally, the start signal output interface of the network communication processor is connected to the start signal input interface of the real-time simulator, and the simulation data input interface of the simulation data receiving module is connected to the simulation data output interface of the real-time simulator.
The utility model discloses a network communication interface of active power distribution network real-time simulator, include: the system comprises a simulation data receiving module, a shared memory, a network communication processor, an MAC module, a network data transceiving module and a memory manager; the simulation data receiving module receives simulation result data of a real-time simulator, writes the simulation result data into an idle data storage area of a shared memory, and sends a control signal to the memory manager to apply for allocating a new data storage area when the data storage area for storing the simulation result data is full; the shared memory stores the simulation result data and the network data packet written by the network data transceiver module, and when a data storage area for storing the simulation result data is full, the simulation result data is sent to the network communication processor; the network communication processor realizes data communication among the modules, initializes the MAC module, writes a starting data transmission control signal into the shared memory, processes the simulation result data to generate a network data packet, sends a control signal to the memory manager and sends the network data packet to the network data transceiver module; the MAC module realizes data communication between the real-time simulator and a computer system; the network data transceiver module receives a network data packet sent by the MAC module, writes the network data packet into the shared memory, and sends a control signal to the memory manager after the network data packet is written into the shared memory; and the memory manager allocates non-conflicting memory areas to the simulation data receiving module, the network communication processor and the network data transceiver module according to a control signal.
The utility model provides a network communication interface of active power distribution network real-time simulator, an active power distribution network real-time simulator ethernet communication interface based on FPGA, the demand and the characteristics of emulation data output have fully been considered, FPGA's high-speed computing power and high-speed network communication ability have been utilized, under the condition of the real-time of guaranteeing emulation data output, the speed of emulation data output has been improved, it only requires for the little step size active power distribution network real-time simulator data output of several microseconds to have satisfied the emulation step length, the result for utilizing computer system to save and analysis FPGA active power distribution network real-time simulator has established the basis.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a system diagram illustrating a network communication interface of an active power distribution network real-time simulator according to the present application;
fig. 2 is a schematic structural diagram of a network communication interface of an active power distribution network real-time simulator according to the present application.
Detailed Description
The embodiment of the utility model provides an active power distribution network real-time simulator's network communication interface to solve the technical problem of communication difficulty between real-time simulator based on FPGA and the computer system.
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
The utility model relates to an embodiment of active power distribution network real-time simulator's network communication interface, include: the system comprises a simulation data receiving module 1, a shared memory 2, a network communication processor 3, an MAC module 4, a network data transceiving module and a memory manager 6;
the simulation data receiving module 1 receives simulation result data of a real-time simulator, writes the simulation result data into an idle data storage area of the shared memory 2, and sends a control signal to the memory manager 6 to apply for allocating a new data storage area when the data storage area for storing the simulation result data is full;
the shared memory 2 stores the simulation result data and the network data packet written by the network data transceiver module, and when a data storage area for storing the simulation result data is full, the simulation result data is sent to the network communication processor 3;
the network communication processor 3 implements data communication between the modules, initializes the MAC module 4, writes a start data transmission control signal into the shared memory 2, processes the simulation result data to generate a network data packet, sends a control signal to the memory manager 6, and sends the network data packet to the network data transceiver module;
the MAC module 4 realizes data communication between the real-time simulator and a computer system;
the network data transceiver module receives the network data packet sent by the MAC module 4, writes the network data packet into the shared memory 2, and sends a control signal to the memory manager 6 after the network data packet is written;
the memory manager 6 allocates non-conflicting memory areas to the simulation data receiving module 1, the network communication processor 3, and the network data transceiver module according to a control signal.
In this embodiment, the simulation data receiving module 1 writes the simulation result data into the free data storage area in the shared memory 2 when receiving the current step size simulation end signal of the real-time simulator, hands over the simulation result data to the network communication processor 3 when the data storage area where the simulation result data is located is full, and applies for allocating a new free data storage area to the memory manager 6.
Specifically, the received data control signal output interface E1 of the simulation data receiving module 1 is connected to the received data control signal input interface a2 of the memory manager 6, the data output interface E2 of the simulation data receiving module 1 is connected to the data input interface B3 of the shared memory 2, and the simulation data input interface E3 of the simulation data receiving module 1 is connected to the simulation data output interface G2 of the active power distribution network real-time simulator.
In this embodiment, the shared memory 2 is used for storing simulation result data and network data packets, and the start data transmission control signal input interface B1 of the shared memory 2 is connected to the start data transmission control signal output interface C2 of the network communication processor 3; the data output interface B2 of the shared memory 2 is connected with the data input interface D2 of the network data transceiver module; the data input interface B3 of the shared memory 2 is connected with the data output interface E2 of the emulation data receiving module 1.
8 data storage areas and a temporary variable storage area are arranged in the shared memory 2, the length of each data storage area is n bytes, n is a positive integer not less than 1500, 8 state variables are arranged in the memory manager 6, and the state variable of the ith data storage area is sig _ stateiWhere i ∈ [1, 8 ]]I is a positive integer, and the ith state variable sig _ stateiIncluding an idle state sig _ statei,0Receiving network data state sig _ statei,1Receiving simulation data state sig _ statei,2And a transmitting network data state sig _ statei,3And the state sig _ state of the network communication processor 3i,4
In this embodiment, the network communication processor 3 is used for communication of data and control instructions among the memory manager 6, the shared memory 2, the network data transceiver module, the MAC module 4, and the active power distribution network real-time simulator. Specifically, the application storage area control signal output interface C1 of the network communication processor 3 is connected to the application storage area control signal input interface a2 of the memory manager 6; the start data transfer control signal output interface C2 of the network communication processor 3 is connected with the start data transfer control signal input interface B1 of the shared memory 2; the starting signal output interface C3 of the network communication processor 3 is connected with the starting signal input interface G1 of the active power distribution network real-time simulator; the initialization signal output interface C4 of the network communication processor 3 is connected to the initialization signal output input interface F1 of the MAC module 4.
In this embodiment, the network communication processor 3 is composed of an instruction decoding module 32, a control module 33, an arithmetic processing module 35, a jump processing module 34, an instruction memory 31, and a register set 36.
Specifically, the control signal output end of the instruction decoding module 32 is connected to the control signal input end of the control module 33, the instruction input end of the instruction decoding module 32 is connected to the instruction output end of the instruction memory 31, the jump instruction input end of the instruction decoding module 32 is connected to the jump instruction output end of the jump processing module 34, 3 instruction output ends of the control module 33 are respectively connected to the instruction input ends of the arithmetic processing module 35, the jump processing module 34 and the register set 36, the start data transmission control signal output interface of the control module 33 serves as the start data transmission control signal output interface of the network communication processor 3, the start signal output interface of the control module 33 serves as the start signal output interface of the network communication processor 3, and the initialization signal output interface of the control module 33 serves as the initialization signal output interface of the network communication processor 3, the application storage area control signal output interface of the jump processing module 34 is used as the application storage area control signal output interface of the network communication processor 3.
In this embodiment, the MAC module 4 is used to implement data transmission between the computer system and the FPGA. Specifically, the initialization signal output/input interface F1 of the MAC module 4 is connected to the initialization signal output interface C4 of the network communication processor 3, the network data input/output interface F2 of the MAC module 4 is connected to the network data input/output interface D3 of the network data transceiver module, and the ethernet communication interface F3 of the MAC module 4 is connected to the communication interface H1 of the computer system.
In this embodiment, when receiving a network data packet transmitted by the MAC module 4 through the Avalon-ST bus, the network data transceiver module writes the network data packet into an idle data storage area, and after the writing is completed, the network data transceiver module sends a storage area application control signal to the memory manager 6, hands over the network data packet to the network communication processor 3, and applies for allocating a new idle data storage area to the memory manager 6; when receiving the start data transmission control signal of the memory manager 6, the network data packet generated by the network communication processor 3 is transmitted to the MAC module 4 through the Avalon-ST bus.
Specifically, the start data transmission control signal output interface D1 of the network data transceiver module is connected to the start data transmission control signal input interface of the memory manager 6, the data input interface D2 of the network data transceiver module is connected to the data output interface of the shared memory 2, and the network data input/output interface D3 of the network data transceiver module is connected to the network data input/output interface F2 of the MAC module.
In this embodiment, the memory manager 6 is configured to perform the operation according to the state variable sig _ stateiAllocating non-conflicting memory areas for the network communication processor 3, the network data transceiver module 4 and the simulation data receiving module 1, and updating the state variable sig _ state when the memory manager 6 receives control signals sent by the network communication processor 3, the network data transceiver module 4 and the simulation data receiving module 1iAnd realizing the transfer of the data storage area.
Specifically, the application storage area control signal input interface a2 of the memory manager 6 is connected to the application storage area control signal output interface C1 of the network communication processor 3; the data receiving control signal input interface A1 of the memory manager 6 is connected with the data receiving control signal output interface E1 of the simulation data receiving module 1; the start data transmission control signal input interface a3 of the memory manager 6 is connected to the start data transmission control signal output interface D1 of the network data transceiver module 4.
The active power distribution network real-time simulator realizes real-time simulation and data transmission of the active power distribution network. Specifically, the start signal input interface G1 of the active distribution network real-time simulator is connected to the start signal output interface C3 of the network communication processor 3, and the simulation data output interface G2 of the active distribution network real-time simulator is connected to the simulation data input interface E3 of the simulation data receiving module 1.
The embodiment of the utility model provides an active power distribution network real-time simulator's network communication interface, an active power distribution network real-time simulator ethernet communication interface based on FPGA, the demand and the characteristics of emulation data output have fully been considered, active power distribution network real-time simulator based on FPGA has the step length little, fast, the advantage of high accuracy, FPGA's high-speed computing power and high-speed network communication ability have been utilized, under the condition of the real-time of guaranteeing emulation data output, the speed of emulation data output has been improved, it only establishes the basis for the result that utilizes computer system to preserve and analysis FPGA active power distribution network real-time simulator to have satisfied the emulation step length for the little step length active power distribution network real-time simulator data output requirement of several microseconds.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A network communication interface of an active power distribution network real-time simulator is characterized by comprising: the system comprises a simulation data receiving module, a shared memory, a network communication processor, an MAC module, a network data transceiving module and a memory manager;
the simulation data receiving module receives simulation result data of a real-time simulator, writes the simulation result data into an idle data storage area of a shared memory, and sends a control signal to the memory manager to apply for allocating a new data storage area when the data storage area for storing the simulation result data is full;
the shared memory stores the simulation result data and the network data packet written by the network data transceiver module, and when a data storage area for storing the simulation result data is full, the simulation result data is sent to the network communication processor;
the network communication processor realizes data communication among the modules, initializes the MAC module, writes a starting data transmission control signal into the shared memory, processes the simulation result data to generate a network data packet, sends a control signal to the memory manager and sends the network data packet to the network data transceiver module;
the MAC module realizes data communication between the real-time simulator and a computer system;
the network data transceiver module receives a network data packet sent by the MAC module, writes the network data packet into the shared memory, and sends a control signal to the memory manager after the network data packet is written into the shared memory;
and the memory manager allocates non-conflicting memory areas to the simulation data receiving module, the network communication processor and the network data transceiver module according to a control signal.
2. The network communication interface of the real-time simulator of the active power distribution network of claim 1, wherein the network communication processor comprises: the device comprises an instruction memory, an instruction decoding module, a control module, a jump processing module, an arithmetic processing module and a register set;
the instruction decoding module reads and decodes the instruction in the instruction memory;
the arithmetic processing module receives data from the control module and performs arithmetic operation;
the jump processing module realizes the functions of selection, circulation and shutdown of the network communication processor according to a jump instruction sent by the controller;
the register group stores instructions and output results of the arithmetic processing module and the jump processing module;
the control module accesses the register group and the shared memory to read operands, sends control signals to the arithmetic processing module and the jump processing module, and writes output results of the arithmetic processing module and the jump processing module into the register group and the shared memory.
3. The network communication interface of the active power distribution network real-time simulator according to claim 1 or 2, wherein the memory manager allocates non-conflicting memory areas to the simulation data receiving module, the network communication processor and the network data transceiver module according to a control signal specifically comprises: the control signal is an application storage area control signal sent by the network communication processor, a received data control signal of the simulation data receiving module and a starting data transmission control signal sent by the network data receiving and sending module.
4. The network communication interface of the active power distribution network real-time simulator according to claim 3, wherein the received data control signal output interface of the simulation data receiving module is connected to the received data control signal input interface of the memory manager, the data output interface of the simulation data receiving module is connected to the data input interface of the shared memory, and the simulation result data input interface of the simulation data receiving module is connected to the simulation data output interface of the real-time simulator.
5. The network communication interface of the active power distribution network real-time simulator of claim 4, wherein a data input interface of the shared memory is connected to a data output interface of the simulation data receiving module, a data output interface of the shared memory is connected to a data input interface of the network data transceiving module, and a start data transmission control signal input interface of the shared memory is connected to a start data transmission control signal output interface of the network communication processor.
6. The network communication interface of the active power distribution network real-time emulator according to claim 5, wherein the application storage area control signal output interface of the network communication processor is connected to the application storage area control signal input interface of the memory manager, the start data transmission control signal output interface of the network communication processor is connected to the start data transmission control signal input interface of the shared memory, the start signal output interface of the network communication processor is connected to the start signal input interface of the real-time emulator, and the initialization signal output interface of the network communication processor is connected to the initialization signal output input interface of the MAC module.
7. The network communication interface of the active power distribution network real-time simulator of claim 6, wherein a start data transmission control signal output interface of the network data transceiver module is connected to a start data transmission control signal input interface of the memory manager, a data input interface of the network data transceiver module is connected to a data output interface of the shared memory, and a network data input/output interface of the network data transceiver module is connected to a network data input/output interface of the MAC module.
8. The network communication interface of the active power distribution network real-time simulator of claim 7, wherein the data receiving control signal output interface of the simulation data receiving module is connected to the data receiving control signal input interface of the memory manager, the data output interface of the simulation data receiving module is connected to the data input interface of the shared memory, and the simulation data input interface of the simulation data receiving module is connected to the simulation data output interface of the real-time simulator.
9. The network communication interface of the active power distribution network real-time simulator of claim 8, wherein the initialization signal output/input interface of the MAC module is connected to the initialization signal output interface of the network communication processor, the network data input/output interface of the MAC module is connected to the network data input/output interface of the network data transceiver module, and the ethernet communication interface of the MAC module is connected to a computer system.
10. The network communication interface of the active power distribution network real-time simulator of claim 9, wherein the start signal output interface of the network communication processor is connected to the start signal input interface of the real-time simulator, and the simulation data input interface of the simulation data receiving module is connected to the simulation data output interface of the real-time simulator.
CN202021623162.8U 2020-08-06 2020-08-06 Network communication interface of real-time simulator of active power distribution network Active CN212696010U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202021623162.8U CN212696010U (en) 2020-08-06 2020-08-06 Network communication interface of real-time simulator of active power distribution network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202021623162.8U CN212696010U (en) 2020-08-06 2020-08-06 Network communication interface of real-time simulator of active power distribution network

Publications (1)

Publication Number Publication Date
CN212696010U true CN212696010U (en) 2021-03-12

Family

ID=74901171

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202021623162.8U Active CN212696010U (en) 2020-08-06 2020-08-06 Network communication interface of real-time simulator of active power distribution network

Country Status (1)

Country Link
CN (1) CN212696010U (en)

Similar Documents

Publication Publication Date Title
CN104820657A (en) Inter-core communication method and parallel programming model based on embedded heterogeneous multi-core processor
US8775698B2 (en) Performing an all-to-all data exchange on a plurality of data buffers by performing swap operations
US20070245122A1 (en) Executing an Allgather Operation on a Parallel Computer
US20080022079A1 (en) Executing an allgather operation with an alltoallv operation in a parallel computer
CN112199173B (en) Data processing method for dual-core CPU real-time operating system
CN110636139B (en) Optimization method and system for cloud load balancing
CN111262917A (en) Remote data moving device and method based on FPGA cloud platform
WO2009024437A1 (en) Managing power in a parallel computer
CN108037898A (en) A kind of method, system and device of the dpdk communications based on Ceph
CN113468090B (en) PCIe communication method and device, electronic equipment and readable storage medium
CN106572500A (en) Scheduling method of hardware accelerators in C-RAN
CN106844263B (en) Configurable multiprocessor-based computer system and implementation method
CN115687229A (en) AI training board card, server based on AI training board card, server cluster based on AI training board card and distributed training method based on AI training board card
CN102063337B (en) Method and system for information interaction and resource distribution of multi-processor core
CN212696010U (en) Network communication interface of real-time simulator of active power distribution network
Wu et al. Toward low CPU usage and efficient DPDK communication in a cluster
Shim et al. Design and implementation of initial OpenSHMEM on PCIe NTB based cloud computing
US20230153153A1 (en) Task processing method and apparatus
JPH11110362A (en) Method for communicating data between computers
CN111078286A (en) Data communication method, computing system and storage medium
US11784946B2 (en) Method for improving data flow and access for a neural network processor
CN112732634B (en) ARM-FPGA (advanced RISC machine-field programmable gate array) cooperative local dynamic reconstruction processing method for edge calculation
CN110856195B (en) Configuration system and method of radio frequency assembly
CN113556242B (en) Method and equipment for performing inter-node communication based on multi-processing nodes
JPH07271744A (en) Parallel computer

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant