CN206807464U - A kind of wing chaos circuit of three-dimensional four containing multi-parameter - Google Patents
A kind of wing chaos circuit of three-dimensional four containing multi-parameter Download PDFInfo
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- CN206807464U CN206807464U CN201720400686.2U CN201720400686U CN206807464U CN 206807464 U CN206807464 U CN 206807464U CN 201720400686 U CN201720400686 U CN 201720400686U CN 206807464 U CN206807464 U CN 206807464U
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Abstract
A kind of wing chaos circuit of three-dimensional four containing multi-parameter, including first passage, the previous stage output x of first passage connects the input all the way of first passage respectively, and the first via of third channel inputs, the input pin of the multiplier A2 in second channel and the multiplier A3 of third channel input pin;The output y of second channel connects input all the way and the input pin of multiplier A1 in first passage of second channel respectively;The previous stage output y connection third channel multipliers A3 of second channel input;The second tunnel input of the output z connection third channels of third channel;Multiplier A1 input pin in the multiplier A2 that the previous stage output z of third channel connects second channel respectively input pin and first passage;The utility model has circuit structure simple and easily realized, has the advantages of important application value in the field such as electronic communication privacy device and image, word encryption.
Description
Technical field
The utility model is related to chaotic signal generation device design field, it is more particularly to a kind of containing multi-parameter three
Tie up four wing chaos circuits.
Background technology
At present, chaos system development is gradually transitioned into practical application from theoretical research, and in engineering direct strategy the most
For the realization of chaos circuit, then the wing chaos system circuit of multi-parameter four is designed, for chaos encryption and is designed increasingly complex
Chaos circuit it is particularly important.Shortcoming is that the wing chaos system item of multi-parameter four is not easy to be answered with circuit realiration and four wing chaos systems
Polygamy and the problems such as be not easy to design.
The content of the invention
In order to overcome the above-mentioned deficiencies of the prior art, the purpose of this utility model is to provide a kind of three-dimensional containing multi-parameter
Four wing chaos circuits, it can simplify four wing chaos systems, easily design with circuit realiration, communication security, there is stronger chaos
Characteristic.
In order to achieve the above object, the technical scheme that the utility model is taken is:
A kind of wing chaos circuit of three-dimensional four containing multi-parameter, including first passage, x points of the previous stage output of first passage
Not Lian Jie first passage input all the way, the first via input of third channel, the input pin of the multiplier A2 in second channel
With the multiplier A3 of third channel input pin;Output-the y of second channel connects the input all the way and of second channel respectively
Multiplier A1 input pin in one passage;The previous stage output y connection third channel multipliers A3 of second channel input;
The second tunnel input of the output-z connection third channels of third channel;It is logical that the previous stage output z of third channel connects second respectively
Multiplier A1 input pin in the multiplier A2 in road input pin and first passage.
Described first passage includes phase inverter U1, and phase inverter U12 pins connect resistance R11, resistance R12, resistance respectively
R14 one end, the previous stage output of resistance R11 other end connection first passage, resistance R12 other end connection multiplier A1
Output end, the resistance R14 other end connects phase inverter U1 6 pins and resistance R15 one end respectively, and resistance R15's is another
End connects inverting integrator U3 2 pins and electric capacity C1 one end respectively, and the electric capacity C1 other end connects, and the 6 of inverting integrator U3
Pin, inverting integrator U3 6 pins are connected to phase inverter U2 2 pins, phase inverter U2 2 pins connection by resistance R16
Resistance R17 one end, resistance R17 other ends connection phase inverter U2 6 pins;Phase inverter U1 3 pins, the 3 of the U2 of phase inverter are drawn
3 pins of pin and inverting integrator U3 are grounded;Phase inverter U1 4 pins, phase inverter U2 4 pins and the 4 of inverting integrator U3
Pin meets VDD (negative voltage), and phase inverter U1 7 pins, 7 pins of phase inverter U2 7 pins and inverting integrator U3 meet VCC
(positive voltage).
Described second channel includes phase inverter U4, and phase inverter U4 2 pins connect resistance R21, resistance R22 and electricity respectively
R23 one end is hindered, the output of resistance R21 other end connection second channel, resistance R22 other end connection multiplier A2's is defeated
Go out end, resistance R23 other end connection phase inverter U4 pin 6, phase inverter U4 pin 6 connects resistance R24 one end, resistance
The R24 other end connects inverting integrator U6 2 pins and electric capacity C2 one end respectively, and the electric capacity C2 other end connects anti-phase product
Divide device U6 6 pins, inverting integrator U6 6 pins connection resistance R25 one end, the resistance R25 other end connects electricity respectively
Hinder R26 one end and phase inverter U5 2 pins, resistance R26 other end connection U5 6 pins;Inverting amplifier U4 3 pins,
Inverting amplifier U5 3 pins are grounded with inverting integrator U6 3 pins;Phase inverter U4 4 pins, phase inverter U5 4 pins
VDD (negative voltage), phase inverter U4 7 pins, phase inverter U5 7 pins and anti-phase integration are connect with inverting integrator U6 4 pins
Device U6 7 pins meet VCC (positive voltage).
Described third channel includes phase inverter U7, and phase inverter U7 2 pins connect resistance R33, resistance R34, electricity respectively
Hinder R35 and resistance R36 one end, the previous stage output of resistance R33 other end connection first passage, resistance R34 connection the 3rd
The output of passage, resistance R35 other end connection multiplier A3 output ends, resistance R36 one end connection phase inverter U7 pin
6, phase inverter U7 pin 6 connects resistance R37 one end, and the resistance R37 other end connects electric capacity C3 one end and anti-phase respectively
Integrator U9 2 pins, electric capacity C3 other end connection inverting integrator U9 6 pins, inverting integrator U9 6 pins connection
Resistance R38 one end, the resistance R38 other end connect phase inverter U8 2 pins and resistance R39 one end respectively, and resistance R39's is another
One end connection phase inverter U8 6 pins;Inverting amplifier U7 3 pins, inverting amplifier U8 3 pins and inverting integrator U9
3 pins ground connection;Phase inverter U7 4 pins, 4 pins of phase inverter U8 4 pins and inverting integrator U9 connect VDD (negative electricity
Pressure), phase inverter U7 7 pins, 7 pins of phase inverter U8 7 pins and inverting integrator U9 meet VCC (positive voltage).
Described second channel phase inverter U5 output end signal is-y, and second channel inverting integrator U6 output end is
Signal y.
The phase inverter U2 of described first passage output end is signal-x, and inverting integrator U3 output end is signal x.
Described third channel phase inverter U8 output end signal is-z, and third channel inverting integrator U9 output end is
Signal z.
Described multiplier A1, multiplier A2 and multiplier A3 uses multiplier AD633.
Described R11=25k Ω, R14=R15=R16=R17=10K Ω, R12=1K Ω, C1=10nF;Resistance R21
=10K Ω, R22=1K Ω, R23=R24=R25=R26=10K Ω, C2=10nF;Resistance R34=66.67k Ω, R34=
33k Ω, R35=1k Ω, R38=R39=10K Ω, R36=R37=10K Ω, C3=10nF;VCC=15, VDD=-15V.
The beneficial effects of the utility model:
It is of the present utility model that x-y can be observed on common oscillograph, x-z, y-z phasors, there is circuit structure letter
Single, circuit performance is reliable and easily realizes, is demonstrated suitable for university's Chaotic Experiment teaching, nonlinear circuit.
Brief description of the drawings
Fig. 1 is circuit diagram of the present utility model.
Fig. 2 is Fig. 1 x output waveform figures.
Fig. 3 is Fig. 1 y output waveform figures.
Fig. 4 is Fig. 1 z output waveform figures.
Fig. 5 is Fig. 1 x-y output phasors.
Fig. 6 is Fig. 1 x-z output phasors.
Fig. 7 is Fig. 1 y-z output phasors.
Embodiment
The utility model is described in detail with reference to the accompanying drawings and examples.
Reference picture 1, a kind of wing chaos circuit of three-dimensional four containing multi-parameter, including first passage, first passage it is previous
Level output x connects the input all the way of first passage respectively, and the first via of third channel inputs, the multiplier A2's in second channel
The multiplier A3 of input pin and third channel input pin;Output-the y of second channel connects second channel all the way respectively
Multiplier A1 input pin in input and first passage;The previous stage output y connection third channel multipliers A3 of second channel
Input;The second tunnel input of the output-z connection third channels of third channel;The previous stage output z of third channel connects respectively
Connect the input pin of multiplier A1 in the multiplier A2 of second channel input pin and first passage.
Described first passage includes phase inverter U1, and phase inverter U12 pins connect resistance R11, resistance R12, resistance respectively
R14 one end, the previous stage output of resistance R11 other end connection first passage, resistance R12 other end connection multiplier A1
Output end, the resistance R14 other end connects phase inverter U1 6 pins and resistance R15 one end respectively, and resistance R15's is another
End connects inverting integrator U3 2 pins and electric capacity C1 one end respectively, and the electric capacity C1 other end connects, and the 6 of inverting integrator U3
Pin, inverting integrator U3 6 pins are connected to phase inverter U2 2 pins, phase inverter U2 2 pins connection by resistance R16
Resistance R17 one end, resistance R17 other ends connection phase inverter U2 6 pins;Phase inverter U1 3 pins, the 3 of the U2 of phase inverter are drawn
3 pins of pin and inverting integrator U3 are grounded;Phase inverter U1 4 pins, phase inverter U2 4 pins and the 4 of inverting integrator U3
Pin meets VDD (negative voltage), and phase inverter U1 7 pins, 7 pins of phase inverter U2 7 pins and inverting integrator U3 meet VCC
(positive voltage).
Described second channel includes phase inverter U4, and phase inverter U4 2 pins connect resistance R21, resistance R22 and electricity respectively
R23 one end is hindered, the output of resistance R21 other end connection second channel, resistance R22 other end connection multiplier A2's is defeated
Go out end, resistance R23 other end connection phase inverter U4 pin 6, phase inverter U4 pin 6 connects resistance R24 one end, resistance
The R24 other end connects inverting integrator U6 2 pins and electric capacity C2 one end respectively, and the electric capacity C2 other end connects anti-phase product
Divide device U6 6 pins, inverting integrator U6 6 pins connection resistance R25 one end, the resistance R25 other end connects electricity respectively
Hinder R26 one end and phase inverter U5 2 pins, resistance R26 other end connection U5 6 pins;Inverting amplifier U4 3 pins,
Inverting amplifier U5 3 pins are grounded with inverting integrator U6 3 pins;Phase inverter U4 4 pins, phase inverter U5 4 pins
VDD (negative voltage), phase inverter U4 7 pins, phase inverter U5 7 pins and anti-phase integration are connect with inverting integrator U6 4 pins
Device U6 7 pins meet VCC (positive voltage).
Described third channel includes phase inverter U7, and phase inverter U7 2 pins connect resistance R33, resistance R34, electricity respectively
Hinder R35 and resistance R36 one end, the previous stage output of resistance R33 other end connection first passage, resistance R34 connection the 3rd
The output of passage, resistance R35 other end connection multiplier A3 output ends, resistance R36 one end connection phase inverter U7 pin
6, phase inverter U7 pin 6 connects resistance R37 one end, and the resistance R37 other end connects electric capacity C3 one end and anti-phase respectively
Integrator U9 2 pins, electric capacity C3 other end connection inverting integrator U9 6 pins, inverting integrator U9 6 pins connection
Resistance R38 one end, the resistance R38 other end connect phase inverter U8 2 pins and resistance R39 one end respectively, and resistance R39's is another
One end connection phase inverter U8 6 pins;Inverting amplifier U7 3 pins, inverting amplifier U8 3 pins and inverting integrator U9
3 pins ground connection;Phase inverter U7 4 pins, 4 pins of phase inverter U8 4 pins and inverting integrator U9 connect VDD (negative electricity
Pressure), phase inverter U7 7 pins, 7 pins of phase inverter U8 7 pins and inverting integrator U9 meet VCC (positive voltage).
Described second channel phase inverter U5 output end signal is-y, and second channel inverting integrator U6 output end is
Signal y.
The phase inverter U2 of described first passage output end is signal-x, and inverting integrator U3 output end is signal x.
Described third channel phase inverter U8 output end signal is-z, and third channel inverting integrator U9 output end is
Signal z.
Described multiplier A1, multiplier A2 and multiplier A3 uses multiplier AD633.
Described R11=25k Ω, R14=R15=R16=R17=10K Ω, R12=1K Ω, C1=10nF;Resistance R21
=10K Ω, R22=1K Ω, R23=R24=R25=R26=10K Ω, C2=10nF;Resistance R34=66.67k Ω, R34=
33k Ω, R35=1k Ω, R38=R39=10K Ω, R36=R37=10K Ω, C3=10nF;VCC=15, VDD=-15V.
Operation principle of the present utility model is:
Chaotic characteristic of the present utility model is extremely complex, if using the output signal as carrier signal, leads to echo signal
Related algorithm modulation is crossed, because the pseudo-randomness of chaotic signal, then can meet wanting for secret communication and encrypted multimedia etc.
Ask.Involved dimensionless mathematical modeling is as follows:
The dimensionless mathematical modeling that the utility model is related to is as follows:
In formula (1), x, y, z are state variable, and a, b are the parameter of equation.A=4, b=3, c=10 are chosen, during d=1.5,
Four wing chaos systems of the system (1) i.e. containing multi-parameter, now the equation of oscillating circuit of the present utility model be:
Circuit involved by the utility model is made up of the circuit of first, second, third passage, and first, second, third is logical
The circuit timesharing in road realizes first, second, third function in formula (2).When analog multiplier uses AD633, circuit it is defeated
Go out oscillogram and see Fig. 2, Fig. 3, Fig. 4, the phasor of circuit output is shown in Fig. 5, Fig. 6, Fig. 7, has been shown out on figure and contained Multi-parameter three-dimensional
The chaotic characteristic of four wing circuit systems, enrich the type of chaos, be chaos applications in chaos cipher and chaos Mechatronic Systems
Control provide new thinking.
Claims (11)
1. a kind of wing chaos circuit of three-dimensional four containing multi-parameter, including first passage, it is characterised in that first passage it is previous
Level output x connects the input all the way of first passage respectively, and the first via of third channel inputs, the multiplier A2's in second channel
The multiplier A3 of input pin and third channel input pin;Output-the y of second channel connects second channel all the way respectively
Multiplier A1 input pin in input and first passage;The previous stage output y connection third channel multipliers A3 of second channel
Input;The second tunnel input of the output-z connection third channels of third channel;The previous stage output z of third channel connects respectively
Connect the input pin of multiplier A1 in the multiplier A2 of second channel input pin and first passage.
A kind of 2. wing chaos circuit of three-dimensional four containing multi-parameter according to claim 1, it is characterised in that described
One passage includes phase inverter U1, and phase inverter U12 pins connect resistance R11, resistance R12, resistance R14 one end, resistance R11 respectively
Other end connection first passage previous stage output, resistance R12 other end connection multiplier A1 output end, resistance R14
The other end connect phase inverter U1 6 pins and resistance R15 one end respectively, the resistance R15 other end connects anti-phase product respectively
Divide device U3 2 pins and electric capacity C1 one end, electric capacity C1 other end connection, inverting integrator U3 6 pins, inverting integrator U3
6 pins phase inverter U2 2 pins, phase inverter U2 2 pins connection resistance R17 one end, resistance are connected to by resistance R16
R17 other ends connection phase inverter U2 6 pins;3 pins and inverting integrator U3 of phase inverter U1 3 pins, the U2 of phase inverter
3 pins ground connection;Phase inverter U1 4 pins, 4 pins of phase inverter U2 4 pins and inverting integrator U3 connect VDD negative voltages,
Phase inverter U1 7 pins, 7 pins of phase inverter U2 7 pins and inverting integrator U3 connect VCC positive voltages.
3. a kind of wing chaos circuit of three-dimensional four containing multi-parameter according to claim 1, it is characterised in that described
Second channel includes phase inverter U4, and phase inverter U4 2 pins connect resistance R21, resistance R22 and resistance R23 one end respectively, electricity
The output of R21 other end connection second channel is hindered, the resistance R22 other end connects multiplier A2 output end, resistance R23's
Other end connection phase inverter U4 pin 6, phase inverter U4 pin 6 connect resistance R24 one end, the resistance R24 other end point
Not Lian Jie inverting integrator U6 2 pins and electric capacity C2 one end, the 6 of electric capacity C2 other end connection inverting integrator U6 draws
Pin, inverting integrator U6 6 pins connection resistance R25 one end, the resistance R25 other end connect respectively resistance R26 one end and
Phase inverter U5 2 pins, resistance R26 other end connection U5 6 pins;Inverting amplifier U4 3 pins, inverting amplifier U5
3 pins and inverting integrator U6 3 pins be grounded;Phase inverter U4 4 pins, phase inverter U5 4 pins and inverting integrator
U6 4 pins connect VDD negative voltage phase inverters U4 7 pins, phase inverter U5 7 pins and inverting integrator U6 7 pins and meet VCC
Positive voltage.
A kind of 4. wing chaos circuit of three-dimensional four containing multi-parameter according to claim 1, it is characterised in that described
Triple channel includes phase inverter U7, and phase inverter U7 2 pins connect resistance R33, resistance R34, resistance R35 and resistance R36 respectively
One end, the previous stage output of resistance R33 other end connection first passage, resistance R34 connect the output of third channel, resistance
R35 other end connection multiplier A3 output ends, resistance R36 one end connection phase inverter U7 pin 6, phase inverter U7 pin
6 connection resistance R37 one end, the resistance R37 other end connect electric capacity C3 one end and inverting integrator U9 2 pins respectively,
Electric capacity C3 other end connection inverting integrator U9 6 pins, inverting integrator U9 6 pins connection resistance R38 one end, electricity
The resistance R38 other end connects phase inverter U8 2 pins and resistance R39 one end, resistance R39 other end connection phase inverter respectively
U8 6 pins;Inverting amplifier U7 3 pins, 3 pins of inverting amplifier U8 3 pins and inverting integrator U9 are grounded;Instead
Phase device U7 4 pins, 4 pins of phase inverter U8 4 pins and inverting integrator U9 connect VDD negative voltages, and the 7 of phase inverter U7 draws
Pin, phase inverter U8 7 pins and inverting integrator U9 7 pins connect VCC positive voltages.
A kind of 5. wing chaos circuit of three-dimensional four containing multi-parameter according to claim 1, it is characterised in that described
Two passage phase inverter U5 output end signal is-y, and second channel inverting integrator U6 output end is signal y.
A kind of 6. wing chaos circuit of three-dimensional four containing multi-parameter according to claim 1, it is characterised in that described
The phase inverter U2 of one passage output end is signal-x, and inverting integrator U3 output end is signal x.
A kind of 7. wing chaos circuit of three-dimensional four containing multi-parameter according to claim 1, it is characterised in that described
Triple channel phase inverter U8 output end signal is-z, and third channel inverting integrator U9 output end is signal z.
8. a kind of wing chaos circuit of three-dimensional four containing multi-parameter according to claim 1, it is characterised in that described multiplies
Musical instruments used in a Buddhist or Taoist mass A1, multiplier A2 and multiplier A3 use multiplier AD633.
9. a kind of wing chaos circuit of three-dimensional four containing multi-parameter according to claim 2, it is characterised in that described
R11=25k Ω, R14=R15=R16=R17=10K Ω, R12=1K Ω, C1=10nF.
A kind of 10. wing chaos circuit of three-dimensional four containing multi-parameter according to requiring 3 in power, it is characterised in that resistance R21
=10K Ω, R22=1K Ω, R23=R24=R25=R26=10K Ω, C2=10nF.
A kind of 11. wing chaos circuit of three-dimensional four containing multi-parameter according to requiring 4 in power, it is characterised in that resistance R34
=66.67k Ω, R34=33k Ω, R35=1k Ω, R38=R39=10K Ω, R36=R37=10K Ω, C3=10nF;VCC
=15, VDD=-15V.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110138363A (en) * | 2019-04-12 | 2019-08-16 | 齐鲁理工学院 | A kind of analog circuit of three-dimensional integer contrast display system |
CN111404660A (en) * | 2020-03-12 | 2020-07-10 | 华东交通大学 | Four-order memristor chaotic signal source circuit |
-
2017
- 2017-04-17 CN CN201720400686.2U patent/CN206807464U/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110138363A (en) * | 2019-04-12 | 2019-08-16 | 齐鲁理工学院 | A kind of analog circuit of three-dimensional integer contrast display system |
CN111404660A (en) * | 2020-03-12 | 2020-07-10 | 华东交通大学 | Four-order memristor chaotic signal source circuit |
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Granted publication date: 20171226 Termination date: 20210417 |