CN1447243A - Calculation method executed in quick flash memory fast and not caused abnormal power breakdown as well as its control system - Google Patents
Calculation method executed in quick flash memory fast and not caused abnormal power breakdown as well as its control system Download PDFInfo
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- CN1447243A CN1447243A CN 02108018 CN02108018A CN1447243A CN 1447243 A CN1447243 A CN 1447243A CN 02108018 CN02108018 CN 02108018 CN 02108018 A CN02108018 A CN 02108018A CN 1447243 A CN1447243 A CN 1447243A
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Abstract
A quick algorithm preventing from irregular power cut off in flash memory and a control system is to mainly store logic BA and related interlock relationship mapping list information of PBA information in a PB paging of the memory protected by a set of ECC. When the host in operation, the controller logs in the mapping list information directly on a temporary memory of the said control device for its fetching, in which, the set up of mapping list is promptly and quickly without scanning program, and if the mapping list is wrong because of the irregular operation system then it will turn back to the last one to recover and ordinary interlock.
Description
Technical field
The invention relates in the flash memory fast and can prevent the algorithm and the control system thereof of undesired outage.
Background technology
IT industry's development is at a tremendous pace, is subjected to CPU speed to reach the influence that IA product rises more and more soon, and the data storage device of high-speed transfer (storer) also will be played the part of very important angle bag.And in various data storage devices since flash memory its have non-volatile and be easy to change the characteristic of data access and expected by the user.
Pressing, shown in Figure 1A, is the organigram of physical data stocking system; At least one data storage device is (as Smart Media storage card, various flash memories such as Memory Stick storage card) 11～19 mainly is to be connected with a host computer 29 by a control device 20 (certainly, this control device 20 also can in be built in the subsystem of host computer 29), include a microprocessor 25 in this control device 20, it can meet PCMCIA by one, IDE, ATA, MMC, SD, the main frame interfacial level controller 24 of Compact Flash or its combined type specification agreement and interconnecting, an end of microprocessor 25 with host computer 29 then can via one store control logic circuit 26 with line in this data storage device 11～19; Microprocessor 25 also can connect a working area controller 22, and these working area controller 22 may command host computers 29 are desired the access data and are temporary in (first working storage 211, second working storage 213 and the N working storage 219) in the data storage district 21.In addition, line is in microprocessor 25, temporary memory controller 23 and storage control logic circuit 26 respectively for 23 of ECC logical circuits, and it is controlled by microprocessor 25 and gives corresponding error correcting code ECC data to the data magnetic region of desiring access.Again, microprocessor 25 can connect a search listing (Lookup Table) 255, and this search listing 255 can be in order to record logical blocks address (L
0～L
M+1) and all physical blocks address data value (PBA) of each data storage device 11 corresponding with it.
See also Figure 1B, search tabulation 255 employed storeies,, mainly be to be access unit, and be divided into a plurality of character address (logical blocks address) L with character (WORD) as random-access memory (ram)
0, L
1...., L
m, L
M+1..., include writing down in each logical blocks address and hint obliquely at memory entities block address data value PBA (B relatively
3, B
2...., B
M+1, B
m...).Flash memory 11 mainly is to be that access unit divides and is slit into a plurality of physical blocks address B with block (block)
0～B
n, each physical blocks address B
0～B
nPhysical blocks in (Data
0～Data
n) all include a plurality of block pagings, and each paging is equivalent to a minimum storage element magnetic region (sector) of host side, can be equipped with the error correcting code hurdle ECC (E of each corresponding paging in the record block after each paging again
0～E
nError-correcting code), reach the corresponding logical blocks address data value (L of record
2, L
3, L
1, L
M+1) logical blocks address hurdle LBA, the PBA that wherein searches tabulation 255 blocks in the LBA hurdle with storer 11 and is corresponding relation, for example memory data physical blocks B
0Interior stored data Data
0The logical bit address data value be the magnetic region L that point to search in the tabulation 255
2So, in its LBA hurdle, promptly log on as L
2(even also will store after the outage of this data and do not disappear), and search 255 the magnetic region L of tabulating
2The PBA hurdle promptly login and be oriented to Bo (this data is promptly given disappearance after outage), shown in the solid line double-head arrow, the rest may be inferred, shown in Figure 1B.
When system boot, the PBA hurdle of search listing 255 is not exist, microprocessor 25 will scan each the physical blocks address and the block logical bit address data value LBA of flash memory 11～19, and corresponding relation is inserted among the physical blocks address hurdle PBA of search listing 255, by this to set up complete search listing 255 according to the logical blocks address.But the operating type of search listing is set up in this kind scanning again, the not only inconvenient and waste activity duration.
Again, because the structure of flash memory 11, it is erased or is with block B during the access data
0Be unit, therefore when the physical blocks correction is changed (as B
2), must change block B to desire
2The interior data Data that has originally stored
2Elder generation's unloading in the available but clean physical blocks that do not store data as yet (as B
M+1) in, and at this physical blocks B
M+1After the LBA hurdle in login logical bit address L
1, also desire is changed block B afterwards
2Interior data Data
2Erase become a clean block or the record do not use.But, if work as clean block (as B
M+1) finished the data unloading and inserted logical bit address data value program, but desire change block B
2Do not finish as yet when erasing action, taking place as sudden power or, and, two data blocks B may arranged in starting shooting again and microprocessor 25 when scanning each storer 11 each physical blocks logical bit address documentor once more when undesired shutdown situations such as machines
2And B
M+1All logining logical blocks address value is L
1And point to same corresponding search 255 address (shown in dashed double) of tabulating, and some block and connectionless situation perhaps may appear, and so not only cause the mistake of data to link easily, even the damage of the data of formation.
Therefore how to use another kind of more novel flash memory mapping table and constructing method thereof, not only can be directly when system boot and set up mapping table fast, and can prevent upset operation situations such as various bursts or outage again, with the accuracy of guaranteeing that data links, be not to use for a long time the person eagerly to look forward to and difficulty place that desire row of the present invention solves always, and the inventor is based on engaging in information product research for many years, exploitation, and the practical experience of selling, it is the idea of thinking and improveing, poor its people's professional knowledge, through design in many ways, inquire into, and after studying sample and improvement many times, it is quick and prevent the flash memory algorithm and the control system thereof of improper operation effect to create a kind of tool of the present invention eventually.
Summary of the invention
Technical matters to be solved by this invention is, at the above-mentioned deficiency of prior art, and provides a kind of activity duration of simplifying microprocessor, significantly saves in the flash memory of activity duration fast and can prevent the algorithm and the control system thereof of undesired outage.This algorithm and control system thereof can be avoided because upset operation causes the sorry of the undesired binding of data down, the correctness of raising data, can effectively reduce the change activity duration of mapping table, and can effectively reduce the generation of data mistake link condition, and can significantly save login block entity address data main memory capacity, be applicable in the stocking system that links a plurality of flash memories.
Above-mentioned technical matters of the present invention is realized by following technical scheme.
In a kind of flash memory fast and can prevent the control system of undesired outage, it mainly is to be connected to a host computer and at least one flash memory by a control device, wherein be provided with a plurality of working storages in this control device, it is characterized in that: wherein the part working storage can be in order to be written into the mapping table data of logical blocks address and physical blocks address data value corresponding with it, and this mapping table data can be stored in the part physical blocks of a flash memory.
Except that above-mentioned essential features, in specific implementation process, also can replenish following technology contents:
Wherein the physical blocks quantity in this flash memory for the storage volume that cooperates working storage can be segmented into a plurality of subregion group.
Wherein each subregion group all has the branch page map table data of a correspondence, and divides the page map table data can be stored in the paging of corresponding memory entities block.
Wherein the storage volume of this mapping table is to select one of them of 256bytes and 512bytes.
Wherein but the memory entities number of blocks that can shine upon of a mapping table is one of them of choice 128 and 256.
Wherein a character number in this mapping table is can login and shine upon a corresponding memory block.
Wherein this working storage that can login mapping table is a data storage device.
Wherein this memory entities block that stores the mapping table data is provided with a special marking.
The present invention also provides a kind of and is used for above-mentioned flash memory fast and can prevent the algorithm of the control system of undesired outage, it is characterized in that: in a flash memory, store a mapping table data that records each physical blocks address data value of storer and corresponding logical blocks address with it, when system boot, this mapping table data directly is reproduced in the working storage of this control device by the control of a control device.
Of the present inventionly be used for flash memory fast and can prevent the algorithm of the control system of undesired outage, in specific implementation process, also can replenish following technology contents:
Still include the following step: in desire is changed a physical blocks during stored data, at first with in this desire change block not need more changed information to be reproduced in one available but do not store as yet in the clean physical blocks of other data, erase afterwards and with all data that desire is changed in the block, and this related entities block address data is changed mutual connection in the mapping table of working storage, and the mapping table data storage after after a while this being changed is in another physical blocks of storer.
Still include the following step: after the data in the desire change block has been erased, when starting shooting again if take place the situation of upset operation to take place, control device will be reproduced in the preceding mapping table data that has been stored in the memory entities block in the working storage.
Still include the following step: come identification whether to have the situation of upset operation to take place by the ECC data of the physical blocks that stores the mapping table data.
Still include the following step: recording the relevant mapping table data that links address of each physical blocks of storer is to be stored in the physical blocks part paging of storer, and the address of this part paging includes a special marking and is beneficial to system can searches this minute page map table data and being reproduced in the working storage immediately when start.
Wherein the physical blocks quantity in this flash memory for the storage volume that cooperates working storage is segmented into a plurality of segmentation group.
Wherein the physical blocks of each segment identifier all has a corresponding with it partition map table.
Wherein a character number in this mapping table is a record and shine upon a corresponding memory block.
Wherein the memory entities number of blocks that can shine upon of a mapping table be select 128 and 256 one of them.
Mapping table data after wherein changing also can directly be stored in the mapping table data physical blocks paging that is fixed.
The invention has the advantages that:
1, utilize the paging of a physical blocks to store the mapping table data, switch fast in the working storage and when system boot, directly from the block paging, be reproduced in, utilize scanning sequence that each memory entities block is carried out the scanning of logical bit address data and need not microprocessor, so the activity duration that not only can simplify microprocessor, and also can significantly save the activity duration.
2, can put down in writing the mapping table data in the paging of memory entities block, can avoid by this because undesired stroking makes to cause down the sorry of the undesired binding of data.
3, the mapping table data can be by the protection of one group of ECC data, to improve the correctness of its data.
4, with all memory areas numbers of blocks according to working storage or block paging memory capacity and be divided into a plurality of segment identifiers, each segment identifier all has a corresponding working storage mapping table to set up the data mapping relations, when changing, the block data only can have influence on relevant mapping table data, therefore the change activity duration of mapping table can be effectively reduced, and the generation of data mistake link condition can be effectively reduced.
5, all physical blocks are divided into a plurality of subregions, so that the size of mapping table is reduced to what a magnetic region (256Words) just, so that this mapping table also can ought be deposited in the flash memory for physical data, therefore can significantly save login block entity address data main memory capacity, and applicable in the stocking system that links a plurality of flash memories.
Now further understand and understanding for structure of the present invention, feature and the effect reached are had, assistant describes in detail as the back with preferred embodiment and accompanying drawing:
Description of drawings
Figure 1A is the organigram of general flash memory storage system.
Figure 1B is a mapping table organigram of commonly using flash memory.
Fig. 2 A is the organigram of flash memory storage system of the present invention.
Fig. 2 B is the mapping table organigram of flash memory of the present invention.
Fig. 2 C is the organigram of flash memory physical blocks part of the present invention paging.
Fig. 3 is that the present invention asks the action flow chart of storer when the access data soon.
Action flow chart when Fig. 4 is a construction mapping table of the present invention.
Embodiment
Seeing also Fig. 2 A, is the organigram of flash memory storage system of the present invention; At least one flash memory 31～39 mainly is to be connected with a host computer 49 by a control device 40 (certainly, this control device 40 also can in be built in the subsystem of host computer 49), include a microprocessor 45 in this control device 40, it can meet the main frame interfacial level controller 44 of PCMCIA, IDE, ATA, MMC, SD, Compact Flash or the agreement of its combined type specification and interconnect with host computer 49 by one, an end of microprocessor 45 then can via one store control logic circuit 46 with line in this data storage device 31～39; Microprocessor 45 also can connect a working area controller 42, and these working area controller 42 may command host computers 49 are desired the access data and temporarily are stored in (first working storage 411, second working storage 413 and the N working storage 419) in the data storage district 41.In addition, line is in microprocessor 45, temporary memory controller 42 and storage control logic circuit 46 respectively for 43 of ECC logical circuits, and it is controlled by microprocessor 45 and gives corresponding error correcting code ECC data to the data magnetic region of desiring access.Wherein, the part working storage 419 in data storage district 41 can be used to as the mapping table 419 (mapping Table) that stores each memory entities block related entities block address data value PBA of record.
See also Fig. 2 B, in embodiments of the present invention, its mapping table 419 that records corresponding memory entities block address data value PBA is to login in the part working storage 419 of control device 40, is collocation working storage 4I9 or physical blocks (B
0) paging (Page) memory capacity 256bytes or 512bytes (also being exactly 128 or 256 character numbers), each character of mapping table 419 is counted W
0, W
1... .W
mAll include and represent a corresponding block B
0, B
1... B
mThe address value, so mapping table 419 can corresponding 128 or less than 256 memory entities block (B
0), so the total number of memory entities block can be divided into a plurality of subregion (Seg of group in good time
0～Seg
n), wherein each will be limited in (or within 128) within 256 by the contained block of the segement of cutting (Block) number, and the special reservation block that a special record map updating (Mapping update) is all arranged in each segement certainly is (as Fig. 2 B
*Number the expression or Fig. 2 C shown in).
Each segment identifier Ssegement all has the special reservation block (the first tabular value of establishing of this mapping block is to set up) of a corresponding map updating (Mapping update) in order to set up the data mapping relations when system initialization, when host computer 49 is desired to deposit many archives materials, the microprocessor 45 of control device 40 will by host computer 49 import Shuo LBA value into divided by physical blocks numerical value contained in the subregion, the magnetic region that includes divided by block (sector) number is to obtain the mapping table in the required segement segmentation of reading into again, and this partition map table is stored in mapping working storage 419 by the latest update paging transfer of the special reservation block of map updating (Mapping update), by this to make things convenient for system to find the physical blocks address of the required mapping of this LBA.Again, each segment identifier Segement all has the special reservation block of a corresponding map updating (Mapping update) to store the data mapping relations of up-to-date foundation, when block mapping data changes, only can upgrade this partition map and upgrade the up-to-date paging of (Mapping update) special reservation block, therefore the change activity duration of whole mapping table can be effectively reduced, and the generation of data mistake link condition can be effectively reduced.
Because mapping table 419 of the present invention itself is one and can stores data, so when the login data in the mapping table 419 is had some change, can be in the physical blocks part paging 311 of the special reservation block of a map updating (Mappingupdate) with this data storage, and this part paging 311 for be marked with special marking "
*" not mapped data blocks, wherein this part paging 311 is divided into a plurality of subregion page or leaf MT
0, MT
1, MT
2..., MT
m,, wherein m is the branch number of pages that Block includes, and sees also Fig. 2 C, when the login data in the mapping table 419 is had some change, and can be with the MT of this data storage in the entity paging 311 of the special reservation block of a map updating (Mapping update)
nIn, when upgrading once again, new mapping relations will be stored in MT
M+1In, during every increase new login data, new renewal mapping down paging writes, begin to upgrade by paging 0 again up to writing completely then again the special reservation block of this map updating of Erase (Mappingupdate), can be reproduced in the data of a working storage 419 with as next booting computer the time immediately, therefore the present invention need as commonly using stocking system need not logical bit address (as the L value among Figure 1B) data by host computer 49 each block of scanning to rebulid the search tabulation, therefore not only can omit the dynamic program of doing of host computer 49, also can significantly save to make up and search the tabulation time.
Certainly because of the present invention focusing in the paging that the mapping table data can be stored in a physical blocks, with convenient can be directly when the system boot and be reproduced in rapidly in the mapping table storer.
Moreover, see also Fig. 3, the action flow chart during the construction mapping table that is flash memory of the present invention under writing (or reading) operation; As shown in the figure, its key step is to include:
After step 301, host computer or control device became start or power supply, total system became armed state;
Step 302, the wait main frame is assigned and is write instruction;
Step 303, host computer needs the accessing file data, the LBA data that the microprocessor of control device utilizes host computer to import into is to be present in which segment identifier through handling to obtain specified physical blocks address, and the partition map table data of this segment identifier is reproduced in a mapping working storage from the paging of a physical blocks;
Step 304, microprocessor finds the pairing memory entities block of archives material of access that host computer is desired by partition map table data, and the data unloading that host side is desired to write is in SectorBuffer magnetic region working storage) in;
Step 305 is compared this by the paging that has write in the old block and the address that writes is detected is write instruction and whether be the situation of overriding, and does not then directly write in the old block and need not upgrade mapping relations and be back to armed state if having; If then execution in step 306;
Step 306 expression has a certain paging data in the physical blocks to be written, in the clean block that the system that at first new data write keeps;
Step 307 will before be stored in the old block and the data that is not modified is moved in this clean block:
Step 308, all data in the former block of erasing become the clean block that a next time desire is used to become the clean stored device physical blocks that another system keeps;
Step 309, change and above-mentioned relevant block logical bit address data value are in corresponding mapping table, in the hope of between the two correct connection relationship of foundation;
Step 310 is with next paging in the special reservation block of map updating (Mapping update) of the mapping table data updating of working storage, can conveniently search and reprint the data of mapping table as next booting computer timed unit.
At last, seeing also Fig. 4, is the action flow chart of system of the present invention when wanting the construction mapping table; As shown in the figure:
Step 401, system convert via the processing of control device and have obtained the branch page map table address that must be written into; Certainly, control device also can directly find the mapping table address by a special marking among another embodiment;
Step 402 reads the branch page map table of appointment from the not mapped block of a certain special reservation;
Step 403, whether the ECC in the mapping table mistake, if then the last operation of expression has the situation that lives through undesired outage or improper operation, needs to carry out 404; If not, all are normal then to represent operation, and then execution in step 405;
Step 404 is represented the generation of upset operation situation, and the reply relation of a mapping table in the necessary backtracking is shone upon paging in storer as long as read recently last one in the special reservation block of map updating (Mapping update) again;
Step 405 continues the executive system action.
In sum, the invention relates to a kind of flash memory algorithm, refer to a kind of flash memory algorithm and control system thereof that has run-up table soon and prevent the undesired outage data entanglement of deriving especially when knowing.So the present invention one is rich in novelty, progressive, and can utilize effect, meet the application for a patent for invention important document, propose application for a patent for invention in accordance with the law for industry.
But the above only is a preferred embodiment of the present invention, is not to be used for limiting scope of the invention process.Be that all equalizations of doing according to the described shape of the present patent application claim, structure, feature and spirit change and modification, all should be included in the claim of the present invention.
Claims (18)
1, in a kind of flash memory fast and can prevent the control system of undesired outage, it mainly is to be connected to a host computer and at least one flash memory by a control device, wherein be provided with a plurality of working storages in this control device, it is characterized in that: wherein the part working storage can be in order to be written into the mapping table data of logical blocks address and physical blocks address data value corresponding with it, and this mapping table data can be stored in the part physical blocks of a flash memory.
2, in the flash memory according to claim 1 fast and can prevent from the control system of undesired outage to it is characterized in that: wherein the physical blocks quantity in this flash memory for the storage volume that cooperates working storage can be segmented into a plurality of subregion group.
3, in the flash memory according to claim 2 fast and can prevent the control system of undesired outage, it is characterized in that: wherein each subregion group all has the branch page map table data of a correspondence, and divides the page map table data can be stored in the paging of corresponding memory entities block.
4, in the flash memory according to claim 1 fast and can prevent from the control system of undesired outage to it is characterized in that: wherein the storage volume of this mapping table is to select one of them of 256bytes and 512bytes.
5, in the flash memory according to claim 4 fast and can prevent from the control system of undesired outage to it is characterized in that: but wherein the memory entities number of blocks that can shine upon of a mapping table is one of them of choice 128 and 256.
6, in the flash memory according to claim 1 fast and can prevent from the control system of undesired outage to it is characterized in that: wherein a character number in this mapping table is can login and shine upon a corresponding memory block.
7, in the flash memory according to claim 1 fast and can prevent the control system of undesired outage, it is characterized in that: wherein this working storage that can login mapping table is a data storage device.
8, in the flash memory according to claim 1 fast and can prevent the control system of undesired outage, it is characterized in that: wherein this memory entities block that stores the mapping table data is provided with a special marking.
9, a kind ofly be used for flash memory fast and can prevent the algorithm of the control system of undesired outage, it is characterized in that: in a flash memory, store a mapping table data that records each physical blocks address data value of storer and corresponding logical blocks address with it, when system boot, this mapping table data directly is reproduced in the working storage of this control device by the control of a control device.
10, according to claim 9ly be used for flash memory fast and can prevent from the algorithm of the control system of undesired outage to it is characterized in that: still include the following step:
In desire is changed a physical blocks during stored data, at first with in this desire change block not need more changed information to be reproduced in one available but do not store as yet in the clean physical blocks of other data, erase afterwards and with all data that desire is changed in the block, and this related entities block address data is changed mutual connection in the mapping table of working storage, and the mapping table data storage after after a while this being changed is in another physical blocks of storer.
11, according to claim 10ly be used for flash memory fast and can prevent from the algorithm of the control system of undesired outage to it is characterized in that: still include the following step:
After the data in the desire change block has been erased, when starting shooting again if take place the situation of upset operation to take place, control device will be reproduced in the preceding mapping table data that has been stored in the memory entities block in the working storage.
12, according to claim 9ly be used for flash memory fast and can prevent from the algorithm of the control system of undesired outage to it is characterized in that: still include the following step:
Come identification whether to have the situation of upset operation to take place by the ECC data of the physical blocks that stores the mapping table data.
13, according to claim 9ly be used for flash memory fast and can prevent from the algorithm of the control system of undesired outage to it is characterized in that: still include the following step:
Recording the relevant mapping table data that links address of each physical blocks of storer is to be stored in the physical blocks part paging of storer, and the address of this part paging includes a special marking and is beneficial to system can searches this minute page map table data and being reproduced in the working storage immediately when start.
14, according to claim 9ly be used for flash memory fast and can prevent from the algorithm of the control system of undesired outage to it is characterized in that: wherein the physical blocks quantity in this flash memory for the storage volume that cooperates working storage is segmented into a plurality of segmentation group.
15, according to claim 13ly be used for flash memory fast and can prevent the algorithm of the control system of undesired outage, it is characterized in that: wherein the physical blocks of each segment identifier all has a corresponding with it partition map table.
16, according to claim 9ly be used for flash memory fast and can prevent from the algorithm of the control system of undesired outage to it is characterized in that: wherein a character number in this mapping table is a record and shine upon a corresponding memory block.
17, according to claim 9ly be used for flash memory fast and can prevent from the algorithm of the control system of undesired outage to it is characterized in that: wherein the memory entities number of blocks that can shine upon of a mapping table is one of them of selection 128 and 256.
18, according to claim 9ly be used for flash memory fast and can prevent the algorithm of the control system of undesired outage, it is characterized in that: the mapping table data after wherein changing also can directly be stored in the mapping table data physical blocks paging that is fixed.
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| CN 02108018 CN1447243A (en) | 2002-03-25 | 2002-03-25 | Calculation method executed in quick flash memory fast and not caused abnormal power breakdown as well as its control system |
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| CN 02108018 CN1447243A (en) | 2002-03-25 | 2002-03-25 | Calculation method executed in quick flash memory fast and not caused abnormal power breakdown as well as its control system |
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| CN101441605B (en) * | 2007-11-19 | 2012-03-21 | 深圳市朗科科技股份有限公司 | Current failure data protection method of flash memory medium |
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| CN100458675C (en) * | 2005-02-25 | 2009-02-04 | 远东金士顿科技股份有限公司 | Flash memory controller utilizing multiple voltages and a method of use |
| CN101375222B (en) * | 2006-01-17 | 2010-12-01 | 武藏工业株式会社 | Work robot having excellent work resumption |
| CN101441605B (en) * | 2007-11-19 | 2012-03-21 | 深圳市朗科科技股份有限公司 | Current failure data protection method of flash memory medium |
| CN101526927B (en) * | 2008-03-07 | 2011-02-02 | 北京华虹集成电路设计有限责任公司 | Data processing method and data processing device of Flash file system |
| CN101727401B (en) * | 2008-10-15 | 2013-02-27 | 慧国(上海)软件科技有限公司 | Link table recovery method |
| US9164887B2 (en) | 2011-12-05 | 2015-10-20 | Industrial Technology Research Institute | Power-failure recovery device and method for flash memory |
| CN103294605A (en) * | 2012-03-01 | 2013-09-11 | 联想(北京)有限公司 | Storage device managing method, and electronic equipment |
| CN104205229A (en) * | 2012-03-30 | 2014-12-10 | 英特尔公司 | Solid state drive management in power loss recovery |
| CN105389266A (en) * | 2015-10-16 | 2016-03-09 | 联想(北京)有限公司 | Data management method and apparatus |
| US11295792B2 (en) | 2019-09-30 | 2022-04-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Back-up and restoration of register data |
| TWI768459B (en) * | 2019-09-30 | 2022-06-21 | 台灣積體電路製造股份有限公司 | Method and system for back-up, recovery and restoration of register values |
| US11636884B2 (en) | 2019-09-30 | 2023-04-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Back-up and restoration of register data |
| CN115543865A (en) * | 2022-11-25 | 2022-12-30 | 成都佰维存储科技有限公司 | Power failure protection method and device, readable storage medium and electronic equipment |
| CN115543865B (en) * | 2022-11-25 | 2023-04-11 | 成都佰维存储科技有限公司 | Power failure protection method and device, readable storage medium and electronic equipment |
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