CN117668949A

CN117668949A - Method for designing cascade heat dissipation of box body, electronic equipment and storage medium

Info

Publication number: CN117668949A
Application number: CN202311576168.2A
Authority: CN
Inventors: 周鸿飞; 管金库
Original assignee: Xinhuazhang Intelligent Technology Shanghai Co ltd
Current assignee: Xinhuazhang Intelligent Technology Shanghai Co ltd
Priority date: 2023-11-24
Filing date: 2023-11-24
Publication date: 2024-03-08

Abstract

The application provides a method for box cascade heat dissipation design, the box includes first box, second box and put the panel in, and one or more connectors can be placed to the panel in the middle of belongings, first box with the second box can by the connector cascade, first box with put the panel in opposite one side and be equipped with the front panel, the second box with put the panel in opposite one side and be equipped with the rear panel, wherein, include: determining a fan of the box body according to the heat dissipation capacity of the box body, wherein the fan is arranged on the rear panel; calculating the wind resistance of the middle panel according to the wind resistance of the fan, the wind resistance of the first box body and the wind resistance of the second box body; and designing the middle panel according to the wind resistance of the middle panel.

Description

Method for designing cascade heat dissipation of box body, electronic equipment and storage medium

Technical Field

The present disclosure relates to the field of chip verification technologies, and in particular, to a method for designing heat dissipation of a box cascade, an electronic device, and a storage medium.

Background

A hardware simulation tool (e.g., a prototype verification board or hardware simulator) may prototype (prototype) and debug a logic system design that includes one or more modules. The logic System design may be, for example, a design for an Application Specific Integrated Circuit (ASIC) or a System-On-Chip (SOC) for a specific application. Thus, the logic system design under test in the simulation tool may also be referred to as a Design Under Test (DUT). The simulation tool may simulate the design under test through one or more configurable components, such as a Field Programmable Gate Array (FPGA), including performing various operations on the design under test to test and verify the functionality of the various modules of the design under test prior to fabrication. The design to be tested and various peripherals can be tested to be used as a complete system to run by externally connecting various peripheral daughter cards on the simulation tool.

When designing a larger scale tank system, the tank system may include a plurality of cascaded small tank systems. A centrally disposed panel may be disposed between the plurality of small tank systems. In this case, the cabinet itself can be regarded as a system of multistage heat dissipation cascades. The heat dissipation design of each stage subsystem and the open hole design of the middle panel can influence the heat dissipation effect of the subsequent stage subsystem.

How to quickly find a solution meeting the system requirement in such a multistage cascade heat dissipation system, and establishing a decision relationship between stages is a problem to be solved.

Disclosure of Invention

A first aspect of the present application provides a method for a hierarchical heat dissipation design of a box, where the box includes a first box, a second box, and a middle panel, where the middle panel may place one or more connectors, the first box and the second box may be cascaded by the connectors, a front panel is disposed on a side of the first box opposite to the middle panel, and a rear panel is disposed on a side of the second box opposite to the middle panel, where the method includes: determining a fan of the box body according to the heat dissipation capacity of the box body, wherein the fan is arranged on the rear panel; calculating the wind resistance of the middle panel according to the wind resistance of the fan, the wind resistance of the first box body and the wind resistance of the second box body; and designing the middle panel according to the wind resistance of the middle panel.

A second aspect of the present application provides an electronic device comprising: a memory for storing a set of instructions; and at least one processor configured to execute the set of instructions to cause the electronic device to perform the method of the first aspect.

A third aspect of the present application provides a non-transitory computer readable storage medium storing a set of instructions of a computer for, when executed, causing the computer to perform the method of the first aspect.

According to the method for hierarchical heat dissipation design of the box body, the system air duct is split and refined, the hierarchical model of the system air duct is built, the impedance curve of the middle panel is accurately simulated, the middle panel is provided with holes according to the calculated impedance curve fitting design, so that the ventilation holes of the middle panel are accurately optimized, the decision relation among all levels is built, and a solution meeting the system requirements is rapidly found.

Drawings

In order to more clearly illustrate the technical solutions of the present application or related art, the drawings that are required to be used in the description of the embodiments or related art will be briefly described below, and it is apparent that the drawings in the following description are only embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort to those of ordinary skill in the art.

Fig. 1 shows a schematic structural diagram of an exemplary host according to an embodiment of the present application.

FIG. 2 illustrates a schematic diagram of an exemplary simulation system in accordance with an embodiment of the present application.

Fig. 3 shows a schematic structural diagram of a multi-stage header according to an embodiment of the present application.

Fig. 4 shows a schematic diagram of a method of fan profiling according to an embodiment of the present application.

FIG. 5 shows a schematic representation of wind resistance curves for simulation fitting according to an embodiment of the present application.

Fig. 6 shows a schematic diagram of a method for fitting a wind resistance curve of a complete machine system according to an embodiment of the present application.

Fig. 7 shows a schematic structural diagram of a center panel according to an embodiment of the present application.

FIG. 8 illustrates a flow chart of an exemplary method for a tank cascade heat dissipation design in accordance with an embodiment of the present application.

Detailed Description

For the purposes of making the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail below with reference to the accompanying drawings.

It is to be noted that unless otherwise defined, technical or scientific terms used herein should be taken in a general sense as understood by one of ordinary skill in the art to which this application belongs. The terms "first," "second," and the like, as used herein, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" and the like means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof without precluding other elements or items. The term "coupled" and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

Generally, when designing a box product with a large internal chip, multi-stage heat dissipation needs to be considered according to the distribution of the high-power chip, and especially when a middle back plate is arranged in the middle of the box, the box can be divided into a multi-stage heat dissipation cascade system. In this case, the input conditions (such as air volume, wind speed, air temperature, wind pressure, etc.) of the latter stage are related to the heat dissipation design of the former stage subsystem, and the effects are also linked. How to quickly find a solution meeting the system requirements in such a cascade heat dissipation system, and establishing a decision relationship between stages is a key to such a problem.

Generally, a designer of a heat dissipation structure needs to build a complete machine model, initially evaluate the number of connectors, evaluate the openings of a front panel and a middle back panel through experience and initial calculation, bring the connectors into the complete machine model for thermal simulation analysis, and compare whether the analysis result meets the heat dissipation requirement. If the design requirements are not met, the front panel openings and the middle backboard openings need to be updated again for iteration. The method has the advantages of long single iteration time and low efficiency because of the whole machine simulation.

According to the method, the system air duct is split and refined, the system air duct grading model is built, the impedance curve of the middle backboard is accurately simulated, and the middle backboard is provided with holes according to the calculated impedance curve fitting design, so that the purpose of accurately optimizing the design of the middle backboard vent hole is achieved. The invention provides a design method for rapidly solving the cascade heat dissipation of a box body according to the characteristics of a HuaPro/HuaEmu prototype verification product of a core Ware product.

Fig. 1 shows a schematic structural diagram of a host 100 according to an embodiment of the present application. The host 100 may be an electronic device running an emulation system. As shown in fig. 1, the host 100 may include: processor 102, memory 104, network interface 106, peripheral interface 108, and bus 110. Wherein the processor 102, the memory 104, the network interface 106, and the peripheral interface 108 are communicatively coupled to each other within the electronic device via a bus 110.

The processor 102 may be a central processing unit (Central Processing Unit, CPU), an image processor, a neural Network Processor (NPU), a Microcontroller (MCU), a programmable logic device, a Digital Signal Processor (DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), or one or more integrated circuits. The processor 102 may be used to perform functions related to the techniques described herein. In some embodiments, processor 102 may also include multiple processors integrated as a single logical component. As shown in fig. 1, the processor 102 may include a plurality of processors 102a, 102b, and 102c.

The memory 104 may be configured to store data (e.g., instruction sets, computer code, intermediate data, etc.). In some embodiments, the simulation test system used to simulate the test design may be a computer program stored in memory 104. As shown in fig. 1, the data stored by the memory may include program instructions (e.g., program instructions for implementing the methods of locating errors of the present application) as well as data to be processed (e.g., the memory may store temporary code generated during compilation). The processor 102 may also access program instructions and data stored in the memory and execute the program instructions to perform operations on the data to be processed. The memory 104 may include volatile storage or nonvolatile storage. In some embodiments, memory 104 may include Random Access Memory (RAM), read Only Memory (ROM), optical disks, magnetic disks, hard disks, solid State Disks (SSD), flash memory, memory sticks, and the like.

The network interface 106 may be configured to provide communication with other external devices to the host 100 via a network. The network may be any wired or wireless network capable of transmitting and receiving data. For example, the network may be a wired network, a local wireless network (e.g., bluetooth, wiFi, near Field Communication (NFC), etc.), a cellular network, the internet, or a combination of the foregoing. It will be appreciated that the type of network is not limited to the specific examples described above. In some embodiments, network interface 106 may include any combination of any number of Network Interface Controllers (NICs), radio frequency modules, receivers, modems, routers, gateways, adapters, cellular network chips, etc.

The peripheral interface 108 may be configured to connect the host 100 with one or more peripheral devices to enable information input and output. For example, the peripheral devices may include input devices such as keyboards, mice, touchpads, touch screens, microphones, various types of sensors, and output devices such as displays, speakers, vibrators, and indicators.

Bus 110 may be configured to transfer information between the various components of host 100 (e.g., processor 102, memory 104, network interface 106, and peripheral interface 108), such as an internal bus (e.g., processor-memory bus), an external bus (USB port, PCI-E bus), etc.

It should be noted that, although the above electronic device architecture only shows the processor 102, the memory 104, the network interface 106, the peripheral interface 108, and the bus 110, in a specific implementation, the electronic device architecture may also include other components necessary to achieve proper operation. Furthermore, those skilled in the art will appreciate that the electronic device architecture described above may also include only the components necessary to implement the embodiments of the present application, and not all of the components shown in the figures.

FIG. 2 shows a schematic diagram of a simulation system 200 according to an embodiment of the present application.

As shown in FIG. 2, the simulation system 200 may include a simulation tool 202 and a host 100 coupled to the simulation tool 202.

Simulation tool 202 is a hardware system for simulating a Design Under Test (DUT). The simulation tool 202 may be a prototype verification board or a hardware simulator (simulator). One design under test may include multiple modules. The design under test may be combinational logic, sequential logic, or a combination of the two. The simulation tool 202 may include one or more configurable circuits (e.g., FPGAs) for simulating a design under test.

The simulation tool 202 may include an interface unit 2022 for communicatively coupling with the host 100 for communication between the host 100 and the simulation tool 202. In some embodiments, interface unit 2022 may include one or more interfaces with electrical connection capabilities. For example, the interface unit 2022 may include an RS232 interface, a USB interface, a LAN interface, an optical fiber interface, IEEE1394 (firewire interface), and the like. In some embodiments, the interface unit 2022 may be a wireless network interface. For example, the interface unit 2022 may be a WIFI interface, a bluetooth interface, or the like.

The host 100 may transmit compiled DUTs, debug instructions, etc. to the simulation tool 202 via the interface unit 2022. The simulation tool 202 may also transmit simulation data or the like to the host 100 via the interface unit 2022.

The simulation tool 202 may also include a memory 2024 for storing simulation data (e.g., various signal values) generated by the design under test during the simulation process. In some embodiments, the signal values generated by the design under test during the simulation process may be directly read by the host 100. It will be appreciated that the memory 2024 may also be provided by the stand-alone simulation tool 202, for example, using an external memory.

The simulation tool 202 may also include an FPGA 2026 for hardware implementation of the logic system design onto the FPGA. It is understood that the simulation tool 202 may include a plurality of FPGAs, which are only examples.

In addition to being connected to the host 100, the emulation tool 202 can also be connected to one or more daughter cards 204 via an interface unit 2022.

The daughter card is used to provide peripherals to the DUT to build a complete electronic system when prototype verification is performed using simulation tool 202. Prototype verification refers to a verification mode for restoring the actual use scene of a chip as far as possible before chip streaming, and verifying whether the chip functions are accurate and complete. The daughter cards 204 may include memory daughter cards (e.g., providing DDR memory interfaces), communication daughter cards (e.g., providing various network interfaces or wireless network card interfaces), and the like.

The host 100 may be used to configure the simulation tool 202 to simulate a design under test. The design under test may be a complete logic system design or one or more modules of a complete logic system design. In some embodiments, host 100 may be a virtual host in a cloud computing system. The logic System design (e.g., ASIC or System-On-Chip) may be designed by a hardware description language (e.g., verilog, VHDL, system C, or System Verilog). The host 100 configuring the simulation tools 202 may include configuring a simulation environment (e.g., a connection relationship between multiple simulation tools 202 or a connection relationship of a simulation tool with a daughter card), and so forth.

The host 100 may compile the logical system design in the form of source code into an executable file. From a design perspective, a logic system design may include a design under test and a test bench (Testbench) corresponding to the design under test.

From an integrated point of view, the logic system design may include an synthesizable portion and an uncombined portion. The synthesizable portion typically corresponds to an actual physical design (e.g., a chip), while the non-synthesizable portion typically comprises an initialization module, a test stand, or the like. Executable files formed by compiling the non-synthesizable portions may generally be run by the host 100. The synthesizable portion also requires synthesis after compilation to form a bit file. The bit file may be used to configure the FPGA 2026 to operate according to the design requirements of the synthesizable portion.

The host 100 may also receive a request from a user to debug the design under test. As described above, the design under test may include one or more modules. Description of the design under test may be accomplished in a hardware description language. The host 100 may synthesize based on the description of the design under test to generate, for example, a gate level netlist (not shown) of the design under test. The gate level circuit netlist of the design under test may be loaded into simulation tool 202 for operation, which in turn may form a circuit structure corresponding to the design under test in simulation tool 202. Accordingly, the circuit structure of the design under test can be obtained from this description, and accordingly, the circuit structure of each block in the design under test can also be obtained similarly.

Fig. 3 is a schematic structural diagram of a multi-stage header 300 according to an embodiment of the present application.

As shown, the housing 300 is a housing of a multi-stage cascade heat dissipation system. The case 300 may include a first case A1, a second case A2, and a center panel B2. The center panel B2 may separate the first case A1 and the second case A2. In other words, the first casing A1 and the second casing A2 are cascaded by the center panel B2. Wherein, on the side opposite to the middle panel B2, the first box body A1 is provided with a front panel B1, and the second box body A2 is provided with a rear panel B2.

The first casing A1 may include a front panel B1, a power consumption chip M1, and a power consumption chip M2. The first casing A1 has a first power consumption P1. The first power consumption P1 includes at least an operation power consumption of the power consumption chip M1 and an operation power consumption of the power consumption chip M2. The temperature of the front panel B1 may be denoted as T1. It will be appreciated that T1 may be the desired temperature of front panel B1 when cabinet 300 is in operation.

The second casing A2 may include a back panel B3, a power consumption chip M3, and a power consumption chip M4. The second casing A2 has a second power consumption P2. The second power consumption P2 includes at least an operation power consumption of the power consumption chip M3 and an operation power consumption of the power consumption chip M4. The temperature of the rear panel B3 of the cabinet 300 is T3. It will be appreciated that T3 may be the desired temperature of the back panel B3 when the cabinet 300 is in operation.

Knowing the temperature T1 of the front panel B1, the temperature T3 of the rear panel, the power consumption P1 of the first casing, and the power consumption P2 of the second casing, the effective air volume Q required at least when the casing 300 operates can be determined according to the following formula:

formula (VI)

However, during actual operation of the fan, the effective air volume provided by the fan is far lower than the maximum air volume. Therefore, even if the effective air volume Q required for the entire casing 300 is calculated, the blower cannot be selected only based on the effective air volume Q. And whether the wind pressure of the fan is enough to resist the overall impedance of the system is also considered, so that the fan can provide sufficient effective air quantity, and the fan can meet the use requirement only when the effective air quantity can meet the use requirement.

The overall grading is performed on the case 300 as in fig. 3. Wherein, the relation between the wind resistance and the air quantity of the whole machine can be fitted into a quadratic function form, namely

Formula (VI)

Wherein, the effective air quantity Q can be calculated by the formula 1. a and b are all undetermined coefficients, and are related to the over-wind area, friction coefficient and tank length. Cd1 is the wind resistance of the front panel, cd2 is the wind resistance of the first box, cd3 is the wind resistance of the middle panel, and Cd4 is the wind resistance of the second box and the rear panel.

For the wind resistance Cd1 of the front panel, the following quadratic function can be fitted:

formula (VI)

For the wind resistance Cd2 of the first box, the following quadratic function can be fitted:

formula (VI)

For the wind resistance Cd3 of the middle panel, the following quadratic function can be fitted:

formula (VI)

For the second box and the wind resistance Cd4 of the back panel, the following quadratic function can be fitted:

formula (VI)

It can be appreciated that the design of the front panel B1 is less limited during the design of the case 300. In order to make the heat radiation effect of the case 300 as good as possible, the open area S1 of the front panel B1 may be as large as possible, that is, take the maximum value. Therefore, an optimal solution can be preset to obtain Cd1.

As shown in fig. 4 (a), 4 fans F1 to F4 of the same type may be provided on the rear panel B3. It will be appreciated that figure 4 (a) is but one embodiment.

The minimum effective air volume Q required by the cabinet 300 to meet the heat dissipation requirement can be calculated according to formula 1. The overall power consumption of the case 300 is known as power consumption P1 of the first case and power consumption P2 of the second case, and the temperature rise is known as T3-T1. The larger the air quantity of the fan is, the smaller the corresponding wind resistance is. According to the known data, the model of the fan can be initially selected.

Fig. 4 (b) is a PQ characteristic curve of the preliminary type fan, which satisfies the air volume requirement as shown in fig. 4 (b). It will be appreciated that figure 4 (b) is but one embodiment.

As the whole machine layout of the large chip is determined to be finished, the first box body A1 in the figure 3 can be analyzed through CFD (Computational Fluid Dynamics) technology, and the first box body wind resistance Cd2 can be calculated; the second casing A2 and the rear panel B3 in fig. 3 may be analyzed by CFD technique, and the second casing and the rear panel wind resistance Cd4 may be calculated.

Briefly, CFD is equivalent to "virtually" performing experiments in a computer to simulate actual fluid flow conditions. The basic principle is to numerically solve a differential equation for controlling fluid flow, and obtain discrete distribution of a fluid flow field of fluid flow on a continuous area, so that the fluid flow condition is approximately simulated.

In some embodiments, the wind resistance characteristic curves of the first and second tanks are as shown in fig. 5, conforming to quadratic function properties. It will be appreciated that the windage characteristics shown in fig. 5 are merely reference examples and do not represent actual core chapter product data.

As shown in the figure, the abscissa of the intersection point of the curve a and the fan PQ characteristic curve is Qa, and the ordinate of the intersection point is Cda. Wherein Qa is Q, which is the minimum air volume necessary for the case 300 to satisfy the heat dissipation requirement. The abscissa of the intersection point of the curve c and the fan PQ characteristic curve is Qc, and the ordinate of the intersection point is Cdc. Wherein, the value of Qc is the lowest wind resistance Cd2+Cd4 of the box body. The curve b is between the curve a and the curve c, the air quantity meets the requirement, and the air resistance is reserved on the left of the front panel Cd1 and the middle panel Cd 3. Therefore, the curve b can be used as a fitting curve of the total wind resistance characteristic of the box body.

The abscissa of the intersection of the curve b and the PQ curve of the blower may be the total air volume Qb of the cabinet 300, and the ordinate of the intersection is the total wind resistance Cdb of the cabinet 300.

Fig. 7 shows a schematic structural diagram of a center panel B2 according to an embodiment of the present application.

The designer of the heat radiation structure can calculate the wind resistance Cd3 of the middle panel according to the calculated wind resistance Cd2 of the first box, the calculated wind resistance Cd4 of the second box and the back panel, the calculated wind resistance Cdb of the whole machine and the calculated wind resistance Cd1 of the front panel by the formula 1, namely:

formula (VI)

The designer of the heat dissipation structure can estimate the number of connectors on the center panel B2 through the power consumption chips of the case 300 and the case structure. And then, according to the size of the wind resistance Cd3 of the middle panel, the proper size of the opening of the middle panel can be designed to meet the heat dissipation requirement of the box 300.

As shown in fig. 3, the first case A1 and the second case A2 may be cascaded by a center panel B2. More precisely, the first box A1 and the second box A2 may be cascaded by connectors on the central panel B2.

As shown in fig. 7, connectors C1 to C6 are provided on the center panel B2. The power consumption chips M1 and M2 in the first casing A1 are connected to the power consumption chips M3 and M4 in the second casing A2 via the connectors C1 to C6. In some embodiments, the connection lines between the connectors C1-C6 may be straight-forward for easy line management.

In the embodiment shown in FIG. 7, the open areas on the center panel B2 may be S2-1 and S2-2. Wherein S2-1 and S2-2 may be areas of the center panel B2 excluding connection lines between the connectors C1-C6 and the connectors C1-C6.

It will be appreciated that the design of the center panel B2 in fig. 7 is just one example. In practice, the designer of the heat dissipation structure has previously determined the power-consuming chips in the multi-stage cascade heat dissipation case. In order to solve the heat dissipation problem of the multi-stage header body, a designer of the heat dissipation structure needs to calculate data of the whole header body so as to simulate and design an optimal middle panel, and the time of the simulation design is greatly saved.

Fig. 8 illustrates a flowchart of a method 800 for box cascade heat dissipation according to an embodiment of the present application, wherein the method 800 may be performed by the host 100 as illustrated in fig. 1. The method 800 may include the following steps.

In step 802, fans (e.g., fans F1-F4 in fig. 4) of the box (e.g., box 300 in fig. 3) are determined according to the heat dissipation amount of the box, and the fans are disposed on the rear panel (e.g., rear panel B3 in fig. 3 or fig. 4).

The box comprises a first box (for example, a first box A1 in fig. 3), a second box (for example, a second box A2 in fig. 3) and a middle panel (for example, a middle panel B2 in fig. 3), wherein the middle panel can be provided with one or more connectors (for example, connectors C1-C6 in fig. 7), the first box (for example, a first box A1 in fig. 3) and the second box (for example, a second box A2 in fig. 3) can be cascaded by the connectors (for example, connectors C1-C6 in fig. 7), a front panel (for example, a front panel B1 in fig. 3) is arranged on the side of the first box (for example, the first box A1 in fig. 3) opposite to the middle panel, and a rear panel (for example, a rear panel B3) is arranged on the side of the second box (for example, the second box A2 in fig. 3) opposite to the middle panel.

The first case has a first power consumption (e.g., a first power consumption P1 including at least an operation power consumption of the power consumption chip M1 and an operation power consumption of the power consumption chip M2 in fig. 3), the second case has a second power consumption (e.g., a first power consumption P2 including at least an operation power consumption of the power consumption chip M3 and an operation power consumption of the power consumption chip M4 in fig. 3), a temperature of a front panel of the case is a first temperature (e.g., the first temperature T1 may be a desired temperature of the front panel B1 in fig. 3 when the case 300 is operated), a temperature of a rear panel is a second temperature (e.g., the second temperature T3 may be a desired temperature of the rear panel B3 when the case 300 is operated), and a blower of the case is determined according to a heat dissipation amount of the case further includes:

determining an air volume (e.g., an effective air volume Q calculated according to formula 1) required when the case operates based on the first temperature (e.g., T1), the second temperature (e.g., T2), the first power consumption (e.g., P1), and the second power consumption (e.g., P2);

and determining fans (such as fans F1-F4 in FIG. 4) of the box according to the air volume required by the box during operation.

According to the method, the system air duct is split and refined, the system air duct grading model is built, the impedance curve of the middle backboard is accurately simulated, and the middle backboard is provided with holes according to the calculated impedance curve fitting design, so that the purpose of accurately optimizing the design of the middle backboard vent hole is achieved.

In step 804, the wind resistance (e.g., cd3 in fig. 3) of the center panel is calculated according to the fans (e.g., fans F1-F4 in fig. 4), the wind resistance of the first box (e.g., cd2 in fig. 3), and the wind resistance of the second box (e.g., cd4 in fig. 3).

First, according to the wind resistance characteristics of the case, wind resistance of the first case (for example, first case wind resistance Cd2 in fig. 5) and wind resistance of the second case and the rear panel (for example, second case and wind resistance Cd4 in fig. 5) are calculated.

And calculating the lowest total wind resistance (such as Cdc in fig. 6) of the box body according to the lowest wind resistance of the box body, wherein the lowest wind resistance of the box body is the sum of the wind resistance of the first box body (such as the first box body wind resistance Cd2 in fig. 5) and the wind resistance of the second box body (such as the second box body and the wind resistance Cd4 of the rear panel in fig. 5).

Based on the characteristics of the blower, and the lowest air volume of the blower that meets the heat dissipation requirement of the box (e.g., the effective air volume Q calculated according to equation 1), the highest total windage of the box (e.g., cda in fig. 6) is obtained.

The total windage (e.g., cdb in fig. 6) of the tank is preset between the lowest total windage (e.g., cdc in fig. 6) and the highest total windage (e.g., cda in fig. 6).

And presetting the ventilation area of the front panel as an optimal solution (for example, S1 in fig. 3) according to the air quantity of the fan, and obtaining the lowest wind resistance (for example, cd1 in fig. 3) of the front panel.

The optimal solution of the wind resistance of the center panel (e.g., cd3 in fig. 3) is calculated based on the lowest wind resistance of the front panel (e.g., cd1 in fig. 3), the wind resistance of the first tank (e.g., cd2 in fig. 3), the wind resistance of the second tank (e.g., cd4 in fig. 3), and the total wind resistance of the tanks (e.g., cdb in fig. 6).

In step 806, the center panel (e.g., center panel B2 in fig. 3) is designed according to the wind resistance of the center panel (e.g., cd3 in fig. 3).

The embodiment of the application also provides an electronic device. The electronic device may be the host 100 of fig. 1. The host 100 may include a memory for storing a set of instructions; and at least one processor configured to execute the set of instructions to cause the electronic device to perform the method 400.

Embodiments of the present application also provide a non-transitory computer readable storage medium. The non-transitory computer readable storage medium stores a set of instructions for a computer that, when executed, cause the computer to perform the method 400.

Some embodiments of the present application are described above. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

Those of ordinary skill in the art will appreciate that: the discussion of any of the embodiments above is merely exemplary and is not intended to suggest that the scope of the application (including the claims) is limited to these examples; the technical features of the above embodiments or in different embodiments may also be combined under the idea of the present application, the steps may be implemented in any order, and there are many other variations of the different aspects of the present application as described above, which are not provided in details for the sake of brevity.

While the present application has been described in conjunction with specific embodiments thereof, many alternatives, modifications, and variations of those embodiments will be apparent to those skilled in the art in light of the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

This application is intended to embrace all such alternatives, modifications and variances which fall within the broad scope of the appended claims. Accordingly, any omissions, modifications, equivalents, improvements and the like, which are within the spirit and principles of the application, are intended to be included within the scope of the present application.

Claims

1. A method for a cascade heat dissipation design of a box, the box comprising a first box, a second box and a central panel, wherein the central panel can be provided with one or more connectors, the first box and the second box can be cascaded by the connectors, a front panel is arranged on one side of the first box opposite to the central panel, a rear panel is arranged on one side of the second box opposite to the central panel, and the method comprises the following steps:

determining a fan of the box body according to the heat dissipation capacity of the box body, wherein the fan is arranged on the rear panel;

calculating the wind resistance of the middle panel according to the wind resistance of the fan, the wind resistance of the first box body and the wind resistance of the second box body; and

and designing the middle panel according to the wind resistance of the middle panel.

2. The method of claim 1, designing the center panel based on wind resistance of the center panel, further comprising:

designing the position and the size of an opening of the middle panel according to the wind resistance of the middle panel; and

the aperture position and aperture size of the center panel are redesigned in response to the aperture position and aperture size of the center panel being less than the position mismatch with the connector.

3. The method of claim 1, wherein the first case has a first power consumption, the second case has a second power consumption, the temperature of the front panel of the case is a first temperature, the temperature of the rear panel is a second temperature, and determining the blower of the case according to the heat dissipation amount of the case further comprises:

determining the air quantity required by the box body during working based on the first temperature, the second temperature, the first power consumption and the second power consumption;

and determining a fan of the box body according to the air quantity required by the box body during operation.

4. The method of claim 1, wherein calculating the windage of the center panel from the windage of the fan, the first tank, and the second tank, further comprises:

according to the wind resistance characteristics of the box bodies, calculating the wind resistance of the first box body and the wind resistance of the second box body and the wind resistance of the rear panel;

calculating total wind resistance of the box body according to the characteristics of the fan, the wind resistance of the first box body and the wind resistance of the second box body;

determining the lowest wind resistance of the front panel according to the characteristics of the box body; and

And calculating the optimal solution of the wind resistance of the middle panel according to the lowest wind resistance of the front panel, the wind resistance of the first box, the wind resistance of the second box and the total wind resistance of the boxes.

5. The method of claim 4, wherein calculating the total wind resistance of the tanks based on the characteristics of the wind turbine, the wind resistance of the first tank, and the wind resistance of the second tank, further comprises:

calculating the lowest total wind resistance of the box body according to the lowest wind resistance of the box body, wherein the lowest wind resistance of the box body is the sum of the wind resistance of the first box body and the wind resistance of the second box body;

obtaining the highest total wind resistance of the box body according to the characteristics of the fan and the lowest wind quantity of the fan meeting the heat dissipation requirement of the box body; and

and presetting the total wind resistance of the box body between the lowest total wind resistance and the highest total wind resistance.

6. The method of claim 4, wherein obtaining the lowest windage of the front panel based on the characteristics of the box comprises:

and presetting the ventilation area of the front panel as an optimal solution according to the air quantity of the fan to obtain the lowest wind resistance of the front panel.

7. An electronic device, comprising:

a memory for storing a set of instructions; and

at least one processor configured to execute the set of instructions to perform the method of any one of claims 1 to 6.

8. A non-transitory computer readable storage medium storing a set of instructions of a computer for, when executed, causing the computer to perform the method of any one of claims 1 to 6.