CN116049045B - Command sending method and electronic equipment - Google Patents

Command sending method and electronic equipment Download PDF

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Publication number
CN116049045B
CN116049045B CN202210848089.1A CN202210848089A CN116049045B CN 116049045 B CN116049045 B CN 116049045B CN 202210848089 A CN202210848089 A CN 202210848089A CN 116049045 B CN116049045 B CN 116049045B
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command
kernel layer
electronic device
sending
function
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CN116049045A (en
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李婧
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Honor Device Co Ltd
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Honor Device Co Ltd
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Priority to CN202311631603.7A priority Critical patent/CN117827704A/en
Priority to CN202210848089.1A priority patent/CN116049045B/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
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Abstract

The application provides a command sending method and electronic equipment. The method comprises the following steps: determining whether a command to be sent to the kernel layer is a first command, wherein the first command is a command related to a multi-block operation, and if so, masking the function of a second command automatically enabled by the kernel layer, wherein the second command is a command capable of stopping or interrupting the first command, and sending the first command to the kernel layer. In this way, after the function of the kernel layer for automatically enabling the second command has been masked, the first command is sent to the kernel layer, and since the function of automatically enabling the second command has been masked, the kernel layer is no longer interfered by the second command when interpreting the first command, so that a correct first command can be sent to the eMMC device, thereby avoiding errors caused by the influence of special command settings when the chip sends related commands.

Description

Command sending method and electronic equipment
Technical Field
The present application relates to the field of terminal devices, and in particular, to a command sending method and an electronic device.
Background
Electronic devices generally include a host and a device. The host may read data from the device or write data to the device through a communication connection between the host and the device. Typically, a chip hosting an electronic device will support an industry accepted protocol, as well as all command sets to which the protocol corresponds.
Currently, some chips are specifically configured for one or more commands, resulting in errors in sending one or more commands in the command set when the chips host the electronic device.
Disclosure of Invention
In order to solve the technical problems, the application provides a command sending method and electronic equipment, and provides a novel command sending method aiming at a chip with special command setting, so as to avoid errors caused by the influence of the special command setting when the chip sends related commands.
In a first aspect, the present application provides a command transmitting method. The method is applied to the electronic equipment. The method comprises the following steps: determining whether a command to be sent to the kernel layer is a first command, wherein the first command is a command related to a multi-block operation, and if so, masking the function of a second command automatically enabled by the kernel layer, wherein the second command is a command capable of stopping or interrupting the first command, and sending the first command to the kernel layer. In this way, after the function of the kernel layer for automatically enabling the second command has been masked, the first command is sent to the kernel layer, and since the function of automatically enabling the second command has been masked, the kernel layer is no longer interfered by the second command when interpreting the first command, so that a correct first command can be sent to the eMMC device, thereby avoiding errors caused by the influence of special command settings when the chip sends related commands.
According to a first aspect, a masking kernel layer automatically enables functions of a second command, comprising: setting a first transmission mode and a second transmission mode in the kernel layer, wherein in the first transmission mode, the kernel layer automatically enables the second command and does not enable the third command; in the second transmission mode, the kernel layer automatically enables the third command and does not enable the second command; the inner core layer adopts a first transmission mode when the first structure body is empty, and adopts a second transmission mode when the first structure body is not empty; packaging the third command into the first structure to obtain a first target structure; the first target structure is sent to the kernel layer. In this way, the functionality of the kernel layer to automatically enable the second command can be successfully masked before the first command is sent to the kernel layer.
According to a first aspect, a masking kernel layer automatically enables functions of a second command, comprising: and sending a closing instruction to the kernel layer, wherein the closing instruction is used for indicating the kernel layer to close the function of the second command capable of automatically enabling. In this way, the functionality of the kernel layer to automatically enable the second command can be successfully masked before the first command is sent to the kernel layer.
According to a first aspect, after sending the first command to the kernel layer, the method further includes: judging whether the kernel layer executes the first command; after the kernel layer executes the first command, the kernel layer is restored to automatically enable the function of the second command. In this way, the influence on the processing flow of other commands by the chip can be avoided.
According to a first aspect, sending a first command to a kernel layer comprises: the first command is sent to the kernel layer through the ioctl function.
According to the first aspect, the first command is a multi-block read command CMD18 or a multi-block write command CMD25, and the second command is a stop transmission command CMD12.
According to the first aspect, the first command is a combined command including a multi-block write command CMD25 and a command CMD23 to set the number of read-write blocks, and the second command is a stop transmission command CMD12.
According to the first aspect, the third command is a command CMD23 to set the number of read-write blocks.
In a second aspect, the present application provides an electronic device comprising: a memory and a processor, the memory coupled to the processor; the memory stores program instructions that, when executed by the processor, cause the electronic device to perform the command transmission method of any of the first aspects.
In a third aspect, the present application provides a computer readable storage medium comprising a computer program which, when run on an electronic device, causes the electronic device to perform the command transmission method of any one of the preceding first aspects.
Drawings
Fig. 1 is a schematic structural diagram of an exemplary electronic device 100;
fig. 2 is a software architecture block diagram of an electronic device 100 of an exemplary illustrated embodiment of the present application;
fig. 3 is a schematic diagram illustrating communication between a host and an eMMC device in an electronic apparatus;
fig. 4 is a flowchart illustrating an exemplary command transmission method.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The term "and/or" is herein merely an association relationship describing an associated object, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone.
The terms first and second and the like in the description and in the claims of embodiments of the application, are used for distinguishing between different objects and not necessarily for describing a particular sequential order of objects. For example, the first target object and the second target object, etc., are used to distinguish between different target objects, and are not used to describe a particular order of target objects.
In embodiments of the application, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g." in an embodiment should not be taken as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.
In the description of the embodiments of the present application, unless otherwise indicated, the meaning of "a plurality" means two or more. For example, the plurality of processing units refers to two or more processing units; the plurality of systems means two or more systems.
The hardware of an electronic device typically includes a host (host) and a device (device). Wherein the host is typically a chip. The device may be, for example, a memory. The host and the device may be communicatively coupled via a communication interface. The communication interface may be, for example, an eMMC bus.
Among them, the device is a device supporting eMMC (embedded MultiMedia Card ) protocol.
The host may read data from the device or write data to the device by sending a command to the device conforming to the eMMC protocol.
In the related art, some chips are specially configured for a certain command or commands, resulting in errors in executing a certain command or commands in a command set when the chips host an electronic device.
For example, when an eMMC memory is mounted on the chip a, communication is performed between the host and the eMMC memory through an eMMC bus. The chip a sends a CMD23+ CMD25 command to the eMMC memory in order to acquire health information of the eMMC memory. However, after the chip sends the CMD23+cmd25 command to the eMMC memory, the chip a receives a CRC (Cyclic Redundancey Check, cyclic redundancy check) error report, and the eMMC memory does not return health information to the eMMC memory. It can be seen that the chip a makes an error when sending the cmd23+cmd25 command to the eMMC memory.
The embodiment of the application provides a command sending method, which aims at a chip with special command setting and provides a novel command sending method for avoiding errors caused by the influence of the special command setting when the chip sends related commands.
The command sending method in the embodiment of the application can be applied to electronic equipment, such as smart phones, tablets and other electronic equipment. The structure of the electronic device may be as shown in fig. 1.
Fig. 1 is a schematic diagram of an exemplary illustrated electronic device 100. It should be understood that the electronic device 100 shown in fig. 1 is only one example of an electronic device, and that the electronic device 100 may have more or fewer components than shown in the figures, may combine two or more components, or may have a different configuration of components. The various components shown in fig. 1 may be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and/or application specific integrated circuits.
Referring to fig. 1, an electronic device 100 may include: processor 110, internal memory 121, universal serial bus (universal serial bus, USB) interface 130, charge management module 140, power management module 141, battery 142, antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, audio module 170, speaker 170A, receiver 170B, microphone 170C, headset interface 170D, sensor module 180, indicator 192, camera 193, etc.
The processor 110 may include one or more processing units, such as: the processor 110 may include an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a controller, a memory, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor, and/or a neural network processor (neural-network processing unit, NPU), etc. Wherein the different processing units may be separate devices or may be integrated in one or more processors.
The controller may be a neural hub and a command center of the electronic device 100, among others. The controller can generate operation control signals according to the instruction operation codes and the time sequence signals to finish the control of instruction fetching and instruction execution.
A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory.
The external memory interface 120 may be used to connect to an external memory card, such as a Micro SD card, to realize expansion of the memory capability of the electronic device 100. The external memory card communicates with the processor 110 through an external memory interface 120 to implement data storage functions. For example, files such as music, video, etc. are stored in an external memory card.
The internal memory 121 may be used to store computer executable program code including instructions. The processor 110 executes various functional applications of the electronic device 100 and data processing by executing instructions stored in the internal memory 121. The internal memory 121 may include a storage program area and a storage data area. The storage program area may store an application program (such as a sound playing function, an image playing function, etc.) required for at least one function of the operating system, etc. The storage data area may store data created during use of the electronic device 100 (e.g., audio data, phonebook, etc.), and so on. In addition, the internal memory 121 may include a high-speed random access memory, and may further include a nonvolatile memory such as at least one magnetic disk storage device, a flash memory device, a universal flash memory (universal flash storage, UFS), and the like.
The processor 110 is located on the chip in the embodiment of the present application, and the processor 110 may be used as a host in the embodiment of the present application. The eMMC memory may communicate with the processor 110 over an eMMC bus.
The software system of the electronic device 100 may employ a layered architecture, an event driven architecture, a micro-core architecture, a micro-service architecture, or a cloud architecture. The embodiment of the application takes an Android (Android) system with a layered architecture as an example, and illustrates a software structure of the electronic device 100.
Fig. 2 is a software structural block diagram of the electronic device 100 of the exemplary embodiment of the present application.
The layered architecture of the electronic device 100 divides the software into several layers, each with a distinct role and division of labor. The layers communicate with each other through a software interface. In some embodiments, the Android system may include an application layer, an application framework layer, a system layer, a kernel layer, and the like.
The application layer may include a series of application packages.
As shown in fig. 2, the application package may include applications for cameras, gallery, calendar, phone calls, maps, navigation, WLAN, bluetooth, music, video, short messages, etc.
The application framework layer provides an application programming interface (application programming interface, API) and programming framework for application programs of the application layer. The application framework layer includes a number of predefined functions.
As shown in FIG. 2, the application framework layer may include a window manager, a content provider, a view system, a telephony manager, a resource manager, a notification manager, and the like.
The window manager is used for managing window programs. The window manager can acquire the size of the display screen, judge whether a status bar exists, lock the screen, intercept the screen and the like.
The content provider is used to store and retrieve data and make such data accessible to applications. The data may include video, images, audio, calls made and received, browsing history and bookmarks, phonebooks, etc.
The view system includes visual controls, such as controls to display text, controls to display pictures, and the like. The view system may be used to build applications. The display interface may be composed of one or more views. For example, a display interface including a text message notification icon may include a view displaying text and a view displaying a picture.
The telephony manager is used to provide the communication functions of the electronic device 100. Such as the management of call status (including on, hung-up, etc.).
The resource manager provides various resources for the application program, such as localization strings, icons, pictures, layout files, video files, and the like.
The notification manager allows the application to display notification information in a status bar, can be used to communicate notification type messages, can automatically disappear after a short dwell, and does not require user interaction. Such as notification manager is used to inform that the download is complete, message alerts, etc. The notification manager may also be a notification in the form of a chart or scroll bar text that appears on the system top status bar, such as a notification of a background running application, or a notification that appears on the screen in the form of a dialog window. For example, a text message is prompted in a status bar, a prompt tone is emitted, the electronic device vibrates, and an indicator light blinks, etc.
Android run time includes a core library and virtual machines. Android run time is responsible for scheduling and management of the Android system.
The core library consists of two parts: one part is a function which needs to be called by java language, and the other part is a core library of android.
The application layer and the application framework layer run in a virtual machine. The virtual machine executes java files of the application program layer and the application program framework layer as binary files. The virtual machine is used for executing the functions of object life cycle management, stack management, thread management, security and exception management, garbage collection and the like.
The system library may include a plurality of functional modules. As shown in fig. 2, in the embodiment of the present application, a system library includes a command sending module, where the command sending module is configured to execute the command sending method in the embodiment of the present application.
It should be noted that, although not shown in fig. 2, it is understood that other functional modules may be further included in the system library, for example: surface manager (surface manager), media Libraries (Media Libraries), three-dimensional graphics processing Libraries (e.g., openGL ES), 2D graphics engines (e.g., SGL), etc.
The surface manager is used to manage the display subsystem and provides a fusion of 2D and 3D layers for multiple applications.
Media libraries support a variety of commonly used audio, video format playback and recording, still image files, and the like. The media library may support a variety of audio and video encoding formats, such as MPEG4, h.264, MP3, AAC, AMR, JPG, PNG, etc.
The three-dimensional graphic processing library is used for realizing three-dimensional graphic drawing, image rendering, synthesis, layer processing and the like.
The 2D graphics engine is a drawing engine for 2D drawing. The kernel layer is a layer between hardware and software. The inner core layer at least comprises a display driver, a camera driver, an audio driver and a sensor driver.
The kernel layer is a layer between hardware and software.
As shown in fig. 2, the kernel layer may include modules of a display driver, a bluetooth driver, an audio driver, a Wi-Fi driver, a device driver, and the like.
The command sent to the kernel layer in the command sending method of the embodiment of the application is received by the device driving module, and then the device driving module sends the command to the eMMC device, such as the eMMC memory, through the eMMC bus.
It will be appreciated that the layers and components contained in the layers in the software structure shown in fig. 2 do not constitute a specific limitation on the electronic device 100. In other embodiments of the application, electronic device 100 may include more or fewer layers than shown and may include more or fewer components per layer, as the application is not limited.
The present application will be described in detail with reference to examples.
In the embodiment of the application, the host communicates with the eMMC device through an eMMC host controller (eMMC Host Controller) in the host. The eMMC host controller may be part of the processor 110 shown in fig. 1.
Fig. 3 is a schematic diagram illustrating communication between a host and an eMMC device in an electronic apparatus. Referring to fig. 3, an eMMC host controller in the host transmits a Command (CMD) to an eMMC device through an eMMC bus, and the eMMC device returns response (response) information to the Command to the host through the eMMC bus.
Fig. 4 is a flowchart illustrating an exemplary command transmission method. In this embodiment, the command sending method is applied to an electronic device, and a kernel layer of the electronic device opens a function of automatically enabling the second command.
As shown in fig. 4, in this embodiment, the method may include the following steps:
s401, judging whether the command to be sent to the kernel layer is a first command, if so, executing the step S402, otherwise, executing the step S403. Wherein the first command is a command related to a multi-block operation.
For example, in one example, the first command may be a multi-block read command CMD18. In another example, the first command may be a multi-block write command CMD25.
S402, the shielding kernel layer automatically enables the function of a second command, wherein the second command is a command capable of stopping or interrupting the first command.
For example, in the case where the first command is the multi-block read command CMD18 or the multi-block write command CMD25, the second command may be the stop transmission command CMD12.
In the related art, the reason for the error when the chip sends the cmd23+cmd25 command to the eMMC memory is that the kernel layer of the chip has the function of automatically enabling CMD12, so that when the chip sends the cmd23+cmd25 command to the eMMC memory, the device driver of the kernel layer of the chip actually sends the combined command of cmd23+cmd25+cmd12 to the eMMC memory. Thus, since no such command combination exists in the eMMC protocol, the eMMC memory does not support the combination command of CMD23+cmd25+cmd12, and thus the eMMC memory will set the CRC status bit after receiving the combination command of CMD23+cmd25+cmd12 sent by the host, and return to the host through a response (response). And after the host checks, a check result of the CRC error is given, namely the check fails.
In this embodiment, by shielding the function of the kernel layer for automatically enabling the second command, after the kernel layer receives the first command transmitted by the upper layer, the first command is no longer interfered by the automatically enabled second command, so that the kernel layer can send the correct first command to the eMMC device. In this way, the eMMC device can correctly respond to the first command sent by the host without reporting errors.
S403, sending a first command to the kernel layer.
This step is to send the first command to the kernel layer after the kernel layer has been masked to automatically enable the function of the second command. At this time, since the function of automatically enabling the second command has been masked, the kernel layer is not interfered by the second command when interpreting the first command, so that the correct first command can be transmitted to the eMMC device. Thus, the chip is prevented from being mistaken due to the influence of special command setting when the related command is sent.
In one example, the masking kernel layer automatically enables the functionality of the second command may include:
setting a first transmission mode and a second transmission mode in the kernel layer, wherein in the first transmission mode, the kernel layer automatically enables the second command and does not enable the third command; in the second transmission mode, the kernel layer automatically enables the third command and does not enable the second command; the inner core layer adopts a first transmission mode when the first structure body is empty, and adopts a second transmission mode when the first structure body is not empty;
packaging the third command into the first structure to obtain a first target structure;
the first target structure is sent to the kernel layer.
For example, the host sets a transfer mode each time a command is sent to the device, and there are two branches in the set transfer mode: a branch and b branch.
Wherein, the branch a is: the blocks operate and the blocks operated are greater than 1, sbc (first fabric) is empty, the host enables sdhci_auto_cmd12 capability, and the transfer mode of AUTO CMD12 is enabled.
The branch b is as follows: sbc is not null, the host enables AUTO CMD23 capability, enabling the transfer mode of AUTO CMD23.
In this way, CMD23 is encapsulated in the sbc fabric before sending CMD25 to the kernel layer, which is sent to the kernel layer. The kernel layer determines sbc that the fabric is not empty and encapsulates CMD23, and then executes the b-branch transfer mode to enable AUTO CMD23 capability. Thus, after the kernel layer receives the CMD25 sent by the upper layer, a combination command of CMD23+ CMD25 is sent to the device.
In another example, the functionality of the masking kernel layer to automatically enable the second command may include:
and sending a closing instruction to the kernel layer, wherein the closing instruction is used for indicating the kernel layer to close the function of the second command capable of automatically enabling.
For example, the upper layer (e.g., the system library) of the chip a sends the above-described shutdown instruction to the kernel layer before sending the combination command of CMD23+ CMD25 to the kernel layer. After the kernel layer receives the shutdown command, the AUTO CMD12 capability is shutdown enabled. In this way, after the enabling AUTO CMD12 capability of the kernel layer is closed, the kernel layer sends a combination command of CMD23+ CMD25 to the kernel layer, at this time, the kernel layer will not be interfered by CMD12, and the kernel layer sends the combination command of CMD23+ CMD25 to the device.
In one example, after sending the first command to the kernel layer, the method may further include:
judging whether the kernel layer executes the first command;
after the kernel layer executes the first command, the kernel layer is restored to automatically enable the function of the second command.
Thus, the influence on the processing flow of other commands by the chip can be avoided.
The command sending method of the embodiment of the application ensures that the chip with special command setting can normally read data from or write data into the eMMC device, thereby avoiding incompatibility of the chip and the eMMC device caused by the special command setting.
The embodiment of the application also provides electronic equipment, which comprises a memory and a processor, wherein the memory is coupled with the processor, the memory stores program instructions, and when the program instructions are executed by the processor, the electronic equipment can make the electronic equipment execute the command sending method.
It will be appreciated that the electronic device, in order to achieve the above-described functions, includes corresponding hardware and/or software modules that perform the respective functions. The present application can be implemented in hardware or a combination of hardware and computer software, in conjunction with the example algorithm steps described in connection with the embodiments disclosed herein. Whether a function is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Those skilled in the art may implement the described functionality using different approaches for each particular application in conjunction with the embodiments, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The present embodiment also provides a computer storage medium having stored therein computer instructions which, when executed on an electronic device, cause the electronic device to execute the above-described related method steps to implement the command transmission method in the above-described embodiments.
The present embodiment also provides a computer program product which, when run on a computer, causes the computer to perform the above-described relevant steps to implement the command transmission method in the above-described embodiments.
In addition, the embodiment of the application also provides a device, which can be a chip, a component or a module, and can comprise a processor and a memory which are connected; the memory is used for storing computer-executable instructions, and when the device is running, the processor can execute the computer-executable instructions stored in the memory, so that the chip executes the command sending method in each method embodiment.
The electronic device, the computer storage medium, the computer program product, or the chip provided in this embodiment are used to execute the corresponding methods provided above, so that the beneficial effects thereof can be referred to the beneficial effects in the corresponding methods provided above, and will not be described herein.
It will be appreciated by those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional modules is illustrated, and in practical application, the above-described functional allocation may be performed by different functional modules according to needs, i.e. the internal structure of the apparatus is divided into different functional modules to perform all or part of the functions described above.
In the several embodiments provided by the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of modules or units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another apparatus, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and the parts shown as units may be one physical unit or a plurality of physical units, may be located in one place, or may be distributed in a plurality of different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
Any of the various embodiments of the application, as well as any of the same embodiments, may be freely combined. Any combination of the above is within the scope of the application.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a readable storage medium. Based on such understanding, the technical solution of the embodiments of the present application may be essentially or a part contributing to the prior art or all or part of the technical solution may be embodied in the form of a software product stored in a storage medium, including several instructions for causing a device (may be a single-chip microcomputer, a chip or the like) or a processor (processor) to perform all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read Only Memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The embodiments of the present application have been described above with reference to the accompanying drawings, but the present application is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present application and the scope of the claims, which are to be protected by the present application.
The steps of a method or algorithm described in connection with the present disclosure may be embodied in hardware, or may be embodied in software instructions executed by a processor. The software instructions may be comprised of corresponding software modules that may be stored in random access Memory (Random Access Memory, RAM), flash Memory, read Only Memory (ROM), erasable programmable Read Only Memory (Erasable Programmable ROM), electrically Erasable Programmable Read Only Memory (EEPROM), registers, hard disk, a removable disk, a compact disc Read Only Memory (CD-ROM), or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC.
Those skilled in the art will appreciate that in one or more of the examples described above, the functions described in the embodiments of the present application may be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, these functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer.
The embodiments of the present application have been described above with reference to the accompanying drawings, but the present application is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present application and the scope of the claims, which are to be protected by the present application.

Claims (8)

1. A command transmitting method, applied to an electronic device, comprising:
determining whether a command to be sent to a kernel layer is a first command, wherein the first command is a command related to a multi-block operation, and the first command is a command sent to an eMMC device;
if yes, the shielding kernel layer automatically enables the function of a second command, wherein the second command is a command capable of stopping or interrupting the first command; the masking kernel layer automatically enables the function of the second command, comprising: setting a first transmission mode and a second transmission mode in the kernel layer, wherein in the first transmission mode, the kernel layer automatically enables the second command and does not enable the third command; in the second transmission mode, the kernel layer automatically enables the third command and does not enable the second command; the first transmission mode is adopted by the kernel layer when the first structure body is empty, the second transmission mode is adopted by the kernel layer when the first structure body is not empty, and the third command is a command CMD23 for setting the number of read-write blocks; packaging the third command into the first structure to obtain a first target structure; transmitting the first target structure to the kernel layer;
and sending the first command to a kernel layer.
2. The method of claim 1, wherein masking the functionality of the kernel layer to automatically enable the second command comprises:
and sending a closing instruction to the kernel layer, wherein the closing instruction is used for indicating the kernel layer to close the function of the second command capable of automatically enabling.
3. The method of claim 2, further comprising, after sending the first command to a kernel layer:
judging whether the kernel layer finishes executing the first command;
and after the kernel layer executes the first command, recovering the function of the kernel layer for automatically enabling the second command.
4. The method of claim 1, wherein sending the first command to a kernel layer comprises:
and sending the first command to a kernel layer through an ioctl function.
5. The method of claim 1, wherein the first command is a multi-block read command CMD18 or a multi-block write command CMD25 and the second command is a stop transmission command CMD12.
6. The method according to claim 2, wherein the first command is a combined command including a multi-block write command CMD25 and a command CMD23 for setting the number of read-write blocks, and the second command is a stop transmission command CMD12.
7. An electronic device, comprising:
a memory and a processor, the memory coupled with the processor;
the memory stores program instructions that, when executed by the processor, cause the electronic device to perform the command transmission method of any one of claims 1-6.
8. A computer readable storage medium comprising a computer program, characterized in that the computer program, when run on an electronic device, causes the electronic device to perform the command transmission method according to any of claims 1-6.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016026345A (en) * 2015-09-03 2016-02-12 マイクロン テクノロジー, インク. Temporary stop of memory operation for shortening reading standby time in memory array
CN105518640A (en) * 2013-09-10 2016-04-20 高通股份有限公司 Providing command queuing in embedded memories

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3389920B2 (en) * 2000-07-10 2003-03-24 日本電気株式会社 Disk array device and interrupt execution method for disk array device
US9021146B2 (en) * 2011-08-30 2015-04-28 Apple Inc. High priority command queue for peripheral component
US11544185B2 (en) * 2020-07-16 2023-01-03 Silicon Motion, Inc. Method and apparatus for data reads in host performance acceleration mode

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105518640A (en) * 2013-09-10 2016-04-20 高通股份有限公司 Providing command queuing in embedded memories
JP2016026345A (en) * 2015-09-03 2016-02-12 マイクロン テクノロジー, インク. Temporary stop of memory operation for shortening reading standby time in memory array

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"嵌入式Linux系统中MMC卡驱动管理技术研究";官成钢 等;《单片机与嵌入式系统应用》(2006年第08期);第24-26,39页 *

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