CN114546910A

CN114546910A - Access control method, device, storage medium and electronic device

Info

Publication number: CN114546910A
Application number: CN202011311668.XA
Authority: CN
Inventors: 王涛
Original assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Current assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date: 2020-11-20
Filing date: 2020-11-20
Publication date: 2022-05-27

Abstract

The embodiment of the application discloses an access control method, an access control device, a storage medium and an electronic device, wherein the embodiment of the application is applied to a chip, the chip comprises a plurality of IP cores, and when the condition that the IP cores initiate access requests to a target module is detected, the target IP core initiating the access requests is determined; calculating the response overtime degree of the target IP core to the access request of the target module in the current application scene; and when the response timeout degree is larger than a preset threshold value, the access priority of the target IP core to the target module in the application scene is promoted. By the scheme, the access priority of each IP core is set according to the application scene, meanwhile, the waiting time of access requests of some IP cores is prevented from being too long, and the condition of access delay is improved.

Description

Access control method, device, storage medium and electronic device

Technical Field

The present application relates to the field of electronic devices, and in particular, to an access control method and apparatus, a storage medium, and an electronic device.

Background

At present, an SOC (System on Chip) of an electronic device such as a smart phone generally integrates a plurality of IP cores (also called Intellectual Property cores or Intellectual Property modules), and some functional modules which are commonly used in a digital single channel but are relatively complex are designed as modules capable of modifying parameters, such as IP cores of NPU (Neural-network Processing Unit), ISP (Image Signal Processor), DMA (Direct Memory Access), etc., which are accessed through a communication bus line to a DDR (Double Data Rate Synchronous Dynamic Random Access Memory), and when a plurality of IP cores Access the DDR at the same time, it is necessary to manage Access priorities of the plurality of IP cores.

Disclosure of Invention

The embodiment of the application provides an access control method, an access control device, a storage medium and an electronic device, which can realize real-time scheduling of access priority of an IP core so as to reduce access delay.

In a first aspect, an embodiment of the present application provides an access control method, which is applied to a chip, where the chip includes multiple IP cores, and the method includes:

when detecting that the IP core initiates an access request to a target module, determining a target IP core initiating the access request;

calculating the response overtime degree of the target IP core to the access request of the target module in the current application scene;

and when the response timeout degree is larger than a preset threshold value, the access priority of the target IP core to the target module in the application scene is promoted.

In a second aspect, an embodiment of the present application further provides an access control apparatus, which is applied to a chip, where the chip includes multiple IP cores, and the apparatus includes:

the data acquisition unit is used for determining a target IP core which initiates an access request when the IP core is detected to initiate the access request to a target module;

the response monitoring unit is used for calculating the response overtime degree of the target IP core to the access request of the target module under the current application scene;

and the parameter adjusting unit is used for promoting the access priority of the target IP core to the target module in the application scene when the response timeout degree is greater than a preset threshold value.

In a third aspect, an embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program runs on a computer, the computer is caused to execute an access control method as provided in any embodiment of the present application.

In a fourth aspect, an embodiment of the present application further provides an electronic device, including a processor and a memory, where the memory has a computer program, and the electronic device further includes a plurality of IP cores connected to a communication bus, where a first bus monitoring module is connected between each IP core and the communication bus, and the processor is configured to execute, by calling the computer program:

when detecting that an IP core initiates an access request to the target module, determining a target IP core initiating the access request;

calculating the response overtime degree of the target IP core to the access request of the target module in the current application scene through the first bus monitoring module corresponding to the target IP core;

According to the technical scheme provided by the embodiment of the application, when an IP core is detected to initiate an access request to a target module, the target IP core initiating the access request is determined, the response overtime degree of the target IP core to the access request of the target module in the current application scene is calculated, and when the response overtime degree is larger than a preset threshold value, the access priority of the target IP core to the target module in the current application scene is improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1a is a schematic flowchart of a first access control method according to an embodiment of the present application.

Fig. 1b is a schematic view of a first application scenario of an access control method according to an embodiment of the present application.

Fig. 1c is a schematic view of a second application scenario of the access control method according to the embodiment of the present application.

Fig. 2 is a second flowchart of an access control method according to an embodiment of the present application.

Fig. 3 is a schematic structural diagram of an access control device according to an embodiment of the present application.

Fig. 4 is a first structural schematic diagram of an electronic device according to an embodiment of the present disclosure.

Fig. 5 is a second structural schematic diagram of an electronic device according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without inventive step, are within the scope of the present application.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.

At present, when multiple IP cores of a system on chip check DDR access, a response to an access request is generally processed in sequence according to a static access priority set by software according to an application scenario, for example, in a photographing scenario, an NPU is required to process image data in a DDR, and at this time, the access priority of the NPU to the DDR should be set to be highest. The other IP cores that are not associated with the photographing scenario have a lower priority of access. However, according to this scheme, under the condition that the application scenario is not changed, the access priority of the IP core is not changed, which may result in that the latency of the access request of some IP cores is too long.

In order to solve the above problem, an embodiment of the present application provides an access control method, where an execution subject of the access control method may be the access control device provided in the embodiment of the present application, or an electronic device integrated with the access control device, where the access control device may be implemented in a hardware or software manner. For example, the electronic device may be a system-on-chip or an electronic device integrated with a system-on-chip, such as a smartphone, a tablet, a palmtop, etc.

Referring to fig. 1a, fig. 1a is a first flowchart illustrating an access control method according to an embodiment of the present disclosure. The specific process of the access control method provided by the embodiment of the application can be as follows:

in 101, when it is detected that an IP core initiates an access request to the target module, a target IP core that initiates the access request is determined.

In 102, a response timeout degree of the target IP core to the access request of the target module in the current application scenario is calculated.

The embodiments of the present application may be applied to an SOC, which generally integrates multiple modules such as a processor, an IP core, and a memory on a single chip. Multiple IP cores on the SOC may simultaneously access memory or some other module on the SOC via the communication bus. The IP cores in the embodiment of the present application include, but are not limited to, an NPU, an ISP, a DMA, a video module, and the like, and the IP core to be adjusted may be one or more predetermined IP cores or all IP cores in the SOC. The target module may be a memory module, such as DDR, or some other peripheral bus controllers. Next, a scheme of the embodiment of the present application will be described with reference to the target module as DDR and the access request as a read operation or a write operation.

When multiple IP cores simultaneously issue requests for read operations to the DDR, the DDR needs to respond to the requests in a certain order. In addition, due to different application scenarios, the access requirements of each IP core on the DDR are different. For example, IP cores with higher levels of access priority may be required for applications running in the foreground, while IP cores with lower levels of access priority may be required for applications running in the background. Therefore, the initial access priority of the target module can be preset for each IP core in each application scenario. Read requests from IP cores with high priority may be responded to more quickly than read requests from IP cores with low priority.

Various application scenarios can be set according to various possible use conditions of the electronic device, and the initial access priority of the DDR is preset by each IP core under each application scenario. For example, when the occurrence of an application scenario is detected, the initial access priority of each IP core is reset according to the changed application scenario.

Because the change of the application scene mostly occurs when foreground application is switched, whether the application scene changes or not can be judged by monitoring the foreground application, and one or more applications can be classified into one application scene, for example, a camera is classified into a shooting scene; classifying online video playing APP of each video platform into video playing scenes; all game APPs are classified as game scenes, and the like. For example, when it is detected that the foreground application is switched from the browser to the camera, it may be determined that an application scene is changed, and the changed application scene is a shooting scene; when the foreground application is detected to be switched to a certain online video APP by the camera, the application scene can be judged to be changed, and the changed application scene is a video playing scene.

The initial access priority may be set based on empirical values. For example, when a user watches a video by using a certain video APP, when it is detected that a foreground application is switched to the video APP, it may be determined that an application scene is changed to a video playing scene, and at this time, the operating condition of the video module determines the fluency of video playing, and therefore, the video module needs a faster response speed compared to other IP cores, and thus, for the scene, a higher initial access priority may be set for the video module, and for the other IP cores, a relatively lower initial access priority may be set. For example, in one embodiment, the access priority may be divided into the following five levels in order from top to bottom: x1, X2, X3, X4 and X5.

According to the method and the device, after the change of the application scene is monitored, the access priority of each IP core target module is reset to the initial access priority corresponding to the changed application scene.

And then, monitoring the access request of each IP core to the target module in real time within a time period lasting in a new application scene, determining the target IP initiating the access request when detecting that the IP core initiates the access request to the target module, and calculating the response overtime degree of the target IP core to the access request of the target module under the changed application scene.

In an embodiment, the calculating the response timeout degree of the target IP core to the access request of the target module in the changed application scenario includes: determining a preset time length and a preset threshold value corresponding to the target IP core; and calculating the proportion of the access request with the response waiting time length exceeding the preset time length in the access request of the target IP core in the current application scene, and taking the proportion as the response overtime degree.

In this embodiment, for a certain application scenario, different IP cores set different preset thresholds and/or preset durations according to different initial access priorities of the IP cores.

As an implementation manner, for a certain application scenario, the preset threshold is fixed, and different IP cores may correspond to different preset durations, where the higher the initial access priority of the IP core is, the shorter the preset duration is; conversely, the lower the initial access priority of the IP core is, the longer the preset time duration is.

Or, as another embodiment, for a certain application scenario, the preset duration is fixed, and different IP cores may correspond to different preset thresholds, where the higher the initial access priority of the IP core is, the smaller the preset threshold is; conversely, the lower the initial access priority of the IP core, the larger the preset threshold.

Or, as another embodiment, for a certain application scenario, the preset durations and the preset thresholds of different IP cores may be different, where the higher the initial access priority of the IP core is, the shorter the preset duration is, and the smaller the preset threshold is; otherwise, the lower the initial access priority of the IP core is, the longer the preset duration is, and the larger the preset threshold is.

It is understood that, in this embodiment, since the response timeout degree is a proportion, in the case where there are fewer access requests in a short time after the application scenario is switched, the accuracy of the calculated response timeout degree is lower, and as the duration of the application scenario extends, the number of access requests increases, and the accuracy of the response timeout degree also increases. Therefore, in some embodiments, the step of determining the target IP core that initiates the access request when it is detected that there is an IP core that initiates the access request to the target module may be performed after the application scenario is changed and the duration of the application scenario exceeds a certain threshold.

In terms of hardware implementation, a first bus monitoring module may be connected between the IP core and the communication bus, and when the IP core initiates an access request to the target module through the communication bus, the first bus monitoring module may monitor the access request and a response condition of the target module to the access request through the communication bus. Referring to fig. 1b, fig. 1b is a schematic view of a first application scenario of an access control method according to an embodiment of the present application. Assume that the electronic device includes three IP cores, i.e., IP core A, IP core B and IP core C, and one target module, which are all connected to and interact through a communication bus. Wherein, a first bus monitoring module M1, M2 and M3 is respectively added between the IP core A, IP core B and the IP core C and the communication bus.

M1 monitors an access request of IP core A to a target module through a communication bus and a response of the target module to the access request through the communication bus; m2 monitors an access request of IP core B to a target module through a communication bus, and a response of the target module to the access request through the communication bus; m3 monitors for an access request by IP core C to a target module over the communications bus, and for a response by the target module to the access request over the communications bus. The first bus monitoring module may record the initiation time of the access request and count the wait time after sending the access request and before receiving the response.

In 103, when the response timeout degree is greater than a preset threshold, the access priority of the target IP core to the target module in the application scenario is raised.

And after the response timeout degree is obtained through calculation, if the response timeout degree is greater than a preset threshold value, the access priority of the target module is improved.

For example, assuming that the preset threshold is 0.5, after the application scenario is changed, if response timeout times of 6 access requests of 10 access requests initiated by an IP core are all greater than the preset duration, it is determined that the response timeout degree of the IP core is greater than the preset threshold. For example, if the current access priority level of the target IP core is X5, it may be promoted to X4. After the access priority is raised, the response speed of the target module to the IP core can be increased, so that the waiting time of the access request of the IP core is prevented from being too long, and the access delay is improved.

In some embodiments, raising the access priority of the target IP core to the target module in the application scenario includes: determining a priority adjustment value corresponding to the target IP core; and according to the priority adjustment value, improving the access priority of the target IP core to the target module in the application scene.

For example, determining the priority adjustment value corresponding to the target IP core includes: calculating a difference between the ratio and a preset threshold; and determining a priority adjustment value corresponding to the target IP core according to the difference, wherein the larger the difference is, the larger the priority adjustment value is.

In this embodiment, different priority adjustment values are set according to different timeout degrees, where the larger the difference between the response timeout degree and the preset threshold is, the more serious the timeout is, the larger the priority adjustment value is, for example, for a case where the timeout is not serious, the access priority may be raised by one level, and for a case where the timeout is serious, the access priority may be raised by two levels.

In particular implementation, the present application is not limited by the execution sequence of the described steps, and some steps may be performed in other sequences or simultaneously without conflict.

As can be seen from the above, in the access control method provided in this embodiment of the present application, when an application scenario is changed, the initial access priority of each IP core is reset according to the changed application scenario, when it is detected that an IP core initiates an access request to a target module, the target IP core that initiates the access request is determined, the response timeout degree of the target IP core to the access request of the target module in the changed application scenario is calculated, and when the response timeout degree is greater than a preset threshold value, the access priority of the target IP core to the target module in the current application scenario is raised.

In some embodiments, the method further comprises: counting the access requests received by the target module to acquire the access flow of each IP core to the target module in the application scene; and determining the initial access priority of each IP core under the application scene to the target module according to the access flow, wherein the larger the access flow of the IP core is, the higher the corresponding initial access priority is.

In this embodiment, the access requests received by the target module are counted to obtain the access traffic of each IP core to the target module, where the access traffic refers to the number of access requests received in a unit time. And determining the initial access priority of each IP core to the target module under the application scene according to the access flow.

In hardware implementation, a second bus monitoring module may be connected between the target module and the communication bus, and when an IP core initiates an access request to the target module through the communication bus, the second bus monitoring module may monitor the access request, so that statistics may be performed on the access requests received by the target module and sent by each IP core. Referring to fig. 1c, fig. 1c is a schematic view of a second application scenario of the access control method according to the embodiment of the present application. Assume that the electronic device includes three IP cores, i.e., IP core A, IP core B and IP core C, and one target module, which are all connected to and interact through a communication bus. Wherein a second bus monitoring module M4 is added between the target module and the communication bus.

The method according to the preceding embodiment is illustrated in further detail below by way of example.

Referring to fig. 2, fig. 2 is a second flow chart of the access control method according to the embodiment of the invention. The method comprises the following steps:

in 201, when detecting that there is an IP core initiating an access request to a target module, determining a target IP core initiating the access request.

Whether the application scene changes is judged by monitoring foreground application, and when the foreground application is detected to be switched, the initial access priority of the target module is checked by resetting each IP core according to the switched foreground application. It can be understood that, for the application programs before and after foreground application switching, if the initial access priorities of the IP cores of the two are the same, the reset is not needed.

And then, monitoring the access request of the target module of each IP core in real time within the continuous time period of the new application scene, and determining the target IP initiating the access request when detecting that the IP core initiates the access request to the target module.

In 202, a preset duration and a preset threshold corresponding to the target IP are determined.

In this embodiment, for a certain application scenario, the preset durations and the preset thresholds corresponding to different IP cores are different, where the higher the initial access priority of the IP core is, the shorter the preset duration is, and the smaller the preset threshold is; otherwise, the lower the initial access priority of the IP core is, the longer the preset duration is, and the larger the preset threshold is. After a target IP core initiating an access request is determined, a preset time length and a preset threshold value corresponding to the target IP are determined.

In 203, the response waiting time of the access request of the target IP core is monitored, and the proportion of the access request with response timeout is determined according to the preset time and the response waiting time.

An access request to the target module and a response to the access request by the target module via the communication bus are monitored by a first bus monitoring module connected between the target IP core and the communication bus. The first bus monitoring module may record the initiation time of the access request and count the wait time after sending the access request and before receiving the response. And when the response waiting time is longer than the preset time, the access request response is overtime, and according to the overtime condition of all the access requests of the target IP core after the foreground application is switched, calculating the proportion of the access requests of the target IP core in the changed application scene, wherein the response waiting time exceeds the preset time, and the proportion is used as the response overtime degree.

In 204, when the ratio is greater than a preset threshold, determining a priority adjustment value corresponding to the target IP core according to a difference between the ratio and the preset threshold, where the larger the difference is, the larger the priority adjustment value is.

In 205, the access priority of the target module is raised by the target IP core based on the initial access priority and the priority adjustment value.

If the ratio is greater than a preset threshold, calculating a difference between the ratio and the preset threshold; and determining a priority adjustment value corresponding to the target IP core according to the difference, wherein the larger the difference is, the larger the priority adjustment value is. That is, according to different timeout degrees, different priority adjustment values are set in this embodiment, where the larger the difference between the response timeout degree and the preset threshold is, the more serious the timeout is, the larger the priority adjustment value is, for example, for a case where the timeout is not serious, the access priority may be raised by one level, and for a case where the timeout is serious, the access priority may be raised by two levels.

As can be seen from the above, in the access control method provided in the embodiment of the present invention, while the access priority of each IP core is set according to the foreground running application, the access request of the IP core is monitored, and when the access request of the target module of the target IP core is detected, and the proportion of the number of the access requests whose response waiting time exceeds the preset time is greater than the preset threshold, it is determined that the access priority of the target IP core needs to be adjusted, an adjustment value is determined according to the degree of timeout, and the access priority is adjusted according to the adjustment value.

An access control device is also provided in an embodiment. Referring to fig. 3, fig. 3 is a schematic structural diagram of an access control device 300 according to an embodiment of the present disclosure. The access control device 300 is applied to a chip, the chip includes a plurality of IP cores, the access control device 300 includes a data obtaining unit 301, a response monitoring unit 302, and a parameter adjusting unit 303, as follows:

a data obtaining unit 301, configured to determine, when it is detected that the IP core initiates an access request to a target module, a target IP core that initiates the access request;

a response monitoring unit 302, configured to calculate a response timeout degree of the target IP core to the access request of the target module in a current application scenario;

a parameter adjusting unit 303, configured to, when the response timeout degree is greater than a preset threshold, raise an access priority of the target IP core to the target module in the application scenario.

In some embodiments, the response monitoring unit 302 is further configured to: determining a preset time length and a preset threshold value corresponding to the target IP core; and calculating the proportion of the access request with the response waiting time length exceeding the preset time length in the access request of the target IP core in the current application scene, and taking the proportion as the response overtime degree.

In some embodiments, the parameter adjusting unit 303 is further configured to: determining a priority adjustment value corresponding to the target IP core; and according to the priority adjustment value, improving the access priority of the target IP core to the target module in the application scene.

In some embodiments, the parameter adjusting unit 303 is further configured to: calculating a difference between the ratio and a preset threshold; and determining a priority adjustment value corresponding to the target IP core according to the difference, wherein the larger the difference is, the larger the priority adjustment value is.

In some embodiments, the access control apparatus 300 further includes a parameter setting unit, configured to count the access requests received by the target module, and acquire an access flow of each IP core to the target module in the application scenario; and determining the initial access priority of each IP core under the application scene to the target module according to the access flow, wherein the larger the access flow of the IP core is, the higher the corresponding initial access priority is.

In some embodiments, the target module is a storage module and the access request is a read operation or a write operation.

It should be noted that the access control device provided in this embodiment of the present application and the access control method in the foregoing embodiments belong to the same concept, and any method provided in the embodiment of the access control method can be implemented by the access control device, and a specific implementation process of the method is described in detail in the embodiment of the access control method, and is not described herein again.

As can be seen from the above, the access control device provided in this embodiment of the application includes a data obtaining unit 301, a response monitoring unit 302, and a parameter adjusting unit 303, where when it is detected that an IP core initiates an access request to a target module, the data obtaining unit 301 determines a target IP core that initiates the access request, the response monitoring unit 302 calculates a response timeout degree of the target IP core to the access request of the target module in the changed application scenario, and when the response timeout degree is greater than a preset threshold, the parameter adjusting unit 303 raises an access priority of the target IP core to the target module in the current application scenario.

The embodiment of the application also provides an electronic device. The electronic device may be a system-on-chip or an electronic device integrated with a system-on-chip, such as a smart phone, a tablet computer, a palmtop computer, etc. Referring to fig. 4, fig. 4 is a first structural schematic diagram of an electronic device according to an embodiment of the present disclosure. In this embodiment, the electronic device 400 may be an SOC. The electronic device 400 comprises a processor 401 and a memory 402. The processor 401 is electrically connected to the memory 402.

The processor 401 is a control center of the electronic device 400, connects various parts of the whole electronic device using various interfaces and lines, performs various functions of the electronic device and processes data by running or calling a computer program stored in the memory 402 and calling data stored in the memory 402, thereby performing overall monitoring of the electronic device.

Memory 402 may be used to store computer programs and data. The memory 402 stores computer programs containing instructions executable in the processor. The computer program may constitute various functional modules. The processor 401 executes various functional applications and data processing by calling a computer program stored in the memory 402.

In this embodiment, the electronic device further includes a plurality of IP cores connected to the communication bus, wherein a first bus monitoring module is connected between each of the IP cores and the communication bus, the processor 401 in the electronic device 400 loads instructions corresponding to one or more computer program processes into the memory 402 according to the following steps, and the processor 401 runs the computer program stored in the memory 402, so as to implement various functions:

determining the response overtime degree of the target IP core to the access request of the target module in the current application scene through the bus monitoring module corresponding to the target IP core;

In some embodiments, please refer to fig. 5, and fig. 5 is a second structural diagram of an electronic device according to an embodiment of the present disclosure. In this embodiment, the electronic apparatus 400 may be an electronic device integrated with an SOC, and the electronic apparatus 400 further includes: radio frequency circuit 403, display 404, control circuit 405, input unit 406, audio circuit 407, sensor 408, and power supply 409. The processor 401 is electrically connected to the radio frequency circuit 403, the display 404, the control circuit 405, the input unit 406, the audio circuit 407, the sensor 408, and the power source 409.

The radio frequency circuit 403 is used for transceiving radio frequency signals to communicate with a network device or other electronic apparatus through wireless communication.

The display screen 404 may be used to display information input by or provided to the user as well as various graphical user interfaces of the electronic device, which may be comprised of images, text, icons, video, and any combination thereof.

The control circuit 405 is electrically connected to the display screen 404, and is configured to control the display screen 404 to display information.

The input unit 406 may be used to receive input numbers, character information, or user characteristic information (e.g., fingerprint), and to generate keyboard, mouse, joystick, optical, or trackball signal inputs related to user settings and function control. The input unit 406 may include a fingerprint recognition module.

The audio circuit 407 may provide an audio interface between the user and the electronic device through a speaker, microphone. Wherein the audio circuit 407 comprises a microphone. The microphone is electrically connected to the processor 401. The microphone is used for receiving voice information input by a user.

The sensor 408 is used to collect external environmental information. The sensors 408 may include one or more of ambient light sensors, acceleration sensors, gyroscopes, etc.

The power supply 409 is used to power the various components of the electronic device 400. In some embodiments, power source 409 may be logically coupled to processor 401 via a power management system, such that functions of managing charging, discharging, and power consumption are performed via the power management system.

Although not shown in the drawings, the electronic device 400 may further include a camera, a bluetooth module, and the like, which are not described in detail herein.

In this embodiment, the processor 401 in the electronic device 400 loads instructions corresponding to one or more processes of the computer program into the memory 402 according to the following steps, and the processor 401 runs the computer program stored in the memory 402, so as to implement various functions:

In some embodiments, a second bus monitoring module is connected between the target module and the communication bus, and the processor further calls the computer program to execute:

counting the access requests received by the target module through the second bus monitoring module corresponding to the target module to acquire the access flow of each IP core to the target module in the application scene;

and determining the initial access priority of each IP core under the application scene to the target module according to the access flow, wherein the larger the access flow of the IP core is, the higher the corresponding initial access priority is.

As can be seen from the above, an embodiment of the present application provides an electronic apparatus, where when it is detected that an IP core initiates an access request to a target module, the electronic apparatus determines a target IP core that initiates the access request, calculates a response timeout degree of the target IP core to the access request of the target module in the changed application scenario, and when the response timeout degree is greater than a preset threshold, raises an access priority of the target IP core to the target module in the current application scenario.

An embodiment of the present application further provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and when the computer program runs on a computer, the computer executes the access control method according to any of the above embodiments.

It should be noted that, all or part of the steps in the methods of the above embodiments may be implemented by hardware related to instructions of a computer program, which may be stored in a computer readable storage medium, which may include, but is not limited to: a Read Only Memory (ROM), a Random Access Memory (RAM), a magnetic or optical disk, and the like.

Furthermore, the terms "first", "second", and "third", etc. in this application are used to distinguish different objects, and are not used to describe a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or modules is not limited to only those steps or modules listed, but rather, some embodiments may include other steps or modules not listed or inherent to such process, method, article, or apparatus.

The access control method, the access control device, the storage medium, and the electronic device provided in the embodiments of the present application are described in detail above. The principle and the implementation of the present application are explained herein by applying specific examples, and the above description of the embodiments is only used to help understand the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims

1. An access control method applied to a chip including a plurality of IP cores, the method comprising:

2. The method of claim 1, wherein the calculating the response timeout degree of the target IP core to the access request of the target module in the current application scenario comprises:

determining a preset time length and a preset threshold value corresponding to the target IP core;

and calculating the proportion of the access request with the response waiting time length exceeding the preset time length in the access request of the target IP core in the current application scene, and taking the proportion as the response overtime degree.

3. The access control method of claim 2, wherein the raising of the access priority of the target IP core to the target module in the application scenario comprises:

determining a priority adjustment value corresponding to the target IP core;

and according to the priority adjustment value, improving the access priority of the target IP core to the target module in the application scene.

4. The access control method of claim 3, wherein the determining the priority adjustment value corresponding to the target IP core comprises:

calculating a difference between the ratio and the preset threshold;

and determining a priority adjustment value corresponding to the target IP core according to the difference, wherein the larger the difference is, the larger the priority adjustment value is.

5. The access control method of claim 1, further comprising:

counting the access requests received by the target module to acquire the access flow of each IP core to the target module in the application scene;

6. The access control method according to any one of claims 1 to 5, wherein the target module is a storage module, and the access request is a read operation or a write operation.

7. An access control apparatus applied to a chip including a plurality of IP cores, the apparatus comprising:

8. A computer-readable storage medium, on which a computer program is stored, which, when run on a computer, causes the computer to carry out an access control method according to any one of claims 1 to 6.

9. An electronic device comprising a processor and a memory, wherein the memory stores a computer program, the electronic device further comprising a plurality of IP cores connected to a communication bus, wherein a first bus monitoring module is connected between each IP core and the communication bus, and the processor is configured to execute, by invoking the computer program:

determining the response overtime degree of the target IP core to the access request of the target module in the current application scene through the first bus monitoring module corresponding to the target IP core;

10. The electronic device of claim 10, wherein a second bus monitoring module is connected between the target module and the communication bus, and the processor is further configured to execute, by invoking the computer program: