CN114169018B - Circuit for preventing MCU embedded flash memory data leakage - Google Patents
Circuit for preventing MCU embedded flash memory data leakage Download PDFInfo
- Publication number
- CN114169018B CN114169018B CN202111311458.5A CN202111311458A CN114169018B CN 114169018 B CN114169018 B CN 114169018B CN 202111311458 A CN202111311458 A CN 202111311458A CN 114169018 B CN114169018 B CN 114169018B
- Authority
- CN
- China
- Prior art keywords
- logic unit
- flash memory
- leakage
- selector
- comparator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
- G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/82—Protecting input, output or interconnection devices
- G06F21/85—Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Storage Device Security (AREA)
Abstract
The invention discloses a circuit for preventing MCU embedded flash memory data leakage, comprising: the system comprises a counter, a comparator, an AND gate logic unit and a selector; the counter is connected with a clock signal line of the SWD interface and the comparator, the comparator is connected with the AND gate logic unit, the AND gate logic unit is also connected with an output pin of the anti-leakage switch and the selector, and the selector is also connected with the MCU embedded flash memory and a data transmission line of the SWD interface; when the anti-leakage switch is turned on, the output pin of the anti-leakage switch outputs a high level to the AND gate logic unit; the counter is used for counting according to the clock edge appearing on the clock signal line; the comparator is used for outputting high level to the AND gate logic unit when the count value reaches a preset threshold value; the selector is for outputting dummy data when receiving a high level. By implementing the method and the device, the function of modifying the flash memory data through the SWD interface by a user can be reserved while the data stored in the flash memory is prevented from being leaked.
Description
Technical Field
The invention relates to the technical field of MCU chips, in particular to a circuit for preventing data leakage of an MCU embedded flash memory.
Background
A Serial Wire Debug (SWD) is a Debug interface, which has two lines, one of which is a clock signal line and is input from the outside; the other is a data transmission line, and is driven by the outside when data is input from the outside and is driven by the inside of the chip when data is output. In order to solve the problem, the prior art has a method for directly disabling the SWD interface, which can prevent data leakage but cannot modify the stored program content again through the SWD interface, and if software and hardware in the chip do not support the use of other interfaces for updating the program, the program in the chip cannot be modified again.
Disclosure of Invention
The embodiment of the invention provides a circuit for preventing data leakage of an MCU embedded flash memory, which can keep the function of modifying the data of the MCU embedded flash memory through an SWD interface when a user is prevented from reading the data stored in the MCU embedded flash memory through the SWD interface.
An embodiment of the present invention provides a circuit for preventing MCU embedded flash memory data leakage, including: the system comprises a counter, a comparator, an AND gate logic unit and a selector;
the input end of the counter is connected with a clock signal line of the SWD interface, the output end of the counter is connected with the input end of the comparator, the output end of the comparator is connected with the first input end of the AND logic unit, the second input end of the AND logic unit is connected with an output pin of the anti-leakage switch, the output end of the AND logic unit is connected with the first input end of the selector, the second input end of the selector is connected with the MCU embedded flash memory, and the output end of the selector is connected with a data transmission line of the SWD interface; when the leakage-proof switch is turned on, an output pin of the leakage-proof switch outputs a high level to the AND logic unit;
the counter is used for counting according to the clock edge appearing on the clock signal line and transmitting the count value to the comparator;
the comparator is used for comparing the counting value with a preset threshold value and outputting a high level to the AND gate logic unit when the counting value reaches the preset threshold value;
and the selector is used for outputting preset false data through the data transmission line when receiving a high level.
Further, when the anti-leakage switch is turned off, and the anti-leakage switch is turned off, the output pin of the anti-leakage switch outputs a low level to the and logic unit;
and the selector is also used for outputting the data stored in the MCU embedded flash memory through the data transmission line when receiving a low level.
Further, the preset threshold is 31.
Further, the counter is also connected with a reset pin, and the reset level of the reset pin is a high level;
and the counter starts counting from 0 according to the clock edge of the clock signal line, and resets the count value when the reset pin is at a high level.
The invention has the following beneficial effects by implementing:
the embodiment of the invention provides a circuit for preventing data leakage of an MCU embedded flash memory, which comprises a counter, a comparator, an AND logic unit and a selector, wherein the counter counts according to clock edges appearing on a clock signal line of an SWD interface, one clock edge count value is added every time, the count value is transmitted to the comparator, the comparator compares the count value with a preset threshold value, when the count value reaches the preset threshold value, a user is judged that the data stored in the MCU embedded flash memory is read through the SWD interface, at the moment, a high level is output to a first input end of the AND logic unit, a second end of the AND logic unit is connected with an output pin of a leakage prevention switch, when the leakage prevention switch is started, the output pin of the leakage prevention switch outputs the high level to a second input end of the AND logic unit, at the moment, the AND logic unit outputs the high level to the selector, the selector outputs a preset false data after receiving the high level, so that a user cannot read real data stored in the MCU embedded flash memory through the SWD interface, and meanwhile, the user can modify the data stored in the MCU embedded flash memory through the SWD interface because the SWD interface is not forbidden, and the function of modifying the data of the MCU embedded flash memory through the SWD interface is reserved.
Drawings
Fig. 1 is a schematic structural diagram of a circuit for preventing data leakage of an MCU embedded flash memory according to an embodiment of the present invention.
Description of reference numerals: the counter 1, the comparator 2, the AND gate logic unit 3 and the selector 4;
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, an embodiment of the present invention provides a circuit for preventing MCU embedded flash data leakage, which includes a counter 1, a comparator 2, an and logic unit 3, and a selector 4;
the input end of the counter 1 is connected with a clock signal line SWCLK of an SWD interface, the output end of the counter 1 is connected with the input end of the comparator 2, the output end of the comparator 2 is connected with a first input end of the AND logic unit 3, a second input end of the AND logic unit 3 is connected with an output pin EN of an anti-leakage switch, the output end of the AND logic unit 3 is connected with a first input end of the selector 4, a second input end of the selector 4 is connected with an MCU embedded flash memory, and the output end of the selector 4 is connected with a data transmission line of the SWD interface; when the leakage-proof switch is turned on, an output pin EN of the leakage-proof switch outputs a high level to the AND logic unit 3;
the counter 1 is used for counting according to the clock edge appearing on the clock signal line SWCLK and transmitting the count value to the comparator 2;
the comparator 2 is configured to compare the count value with a preset threshold, and output a high level to the and gate logic unit 3 when the count value reaches the preset threshold;
and the selector 4 is used for outputting preset dummy data through the data transmission line when receiving a high level.
In a preferred embodiment, the preset threshold is 31.
In a preferred embodiment, the counter 1 is further connected to a reset pin RST, and the reset level of the reset pin RST is high;
the counter 1 starts counting from 0 according to the clock edge appearing on the clock signal line SWCLK, and resets the count value when the reset pin is at a high level.
Specifically, in the present invention, the counter 1 uses the clock SWCLK in the SWD line as the driving clock, when the clock edge occurs on the SWCLK line (the clock signal line SWCLK), it counts +1 from 0, and transmits the real-time count value to the comparator 2, when the count value reaches the preset threshold 31, the comparator 2 determines that the user is reading the data stored in the MCU embedded flash memory through the SWD interface, at this time, outputs a high level to the first input terminal of the and logic unit 3, the second terminal of the and logic unit 3 is connected to the output pin EN of the anti-leakage switch, when the anti-leakage switch is turned on, the output pin EN of the anti-leakage switch outputs a high level to the second input terminal of the and logic unit 3, at this time, the and logic unit 3 outputs a high level to the selector 4, after the selector 4 receives a high level, the preset false data, for example, 32' hfffff is selected as the output data, and the Data is output through a Data transmission line, so that a user cannot read real Data stored in the MCU embedded flash memory through the SWD interface, such as the illustrated Data [31:0], and meanwhile, the user can modify the Data stored in the MCU embedded flash memory through the SWD interface because the SWD interface is not disabled, and the function of modifying the Data of the MCU embedded flash memory through the SWD interface is reserved.
In a preferred embodiment, when the leakage-proof switch is turned off, the output pin EN of the leakage-proof switch outputs a low level to the and logic unit 3; and the selector 4 is further configured to output the data stored in the MCU embedded flash memory through the data transmission line when receiving a low level. In this embodiment, if the leakage prevention switch is turned off, the output pin EN of the leakage prevention switch outputs a low level to the and logic unit 3, and the and logic unit 3 outputs a low level to the selector 4, and then the selector 4 selects the data stored in the MCU embedded flash memory and outputs the data through the data transmission line. The opening and closing of the anti-leakage function can be controlled through the anti-leakage switch pin so as to adapt to various read-write requirements.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention.
Claims (4)
1. A circuit for preventing MCU embedded flash memory data leakage is characterized by comprising: the system comprises a counter, a comparator, an AND gate logic unit and a selector;
the input end of the counter is connected with a clock signal line of the SWD interface, the output end of the counter is connected with the input end of the comparator, the output end of the comparator is connected with the first input end of the AND logic unit, the second input end of the AND logic unit is connected with an output pin of the anti-leakage switch, the output end of the AND logic unit is connected with the first input end of the selector, the second input end of the selector is connected with the MCU embedded flash memory, and the output end of the selector is connected with a data transmission line of the SWD interface; when the leakage-proof switch is turned on, an output pin of the leakage-proof switch outputs a high level to the AND logic unit;
the counter is used for counting according to the clock edge appearing on the clock signal line and transmitting the count value to the comparator;
the comparator is used for comparing the counting value with a preset threshold value and outputting a high level to the AND gate logic unit when the counting value reaches the preset threshold value;
and the selector is used for outputting preset false data through the data transmission line when receiving a high level.
2. The circuit for preventing data leakage of an MCU embedded flash memory according to claim 1, wherein when the leakage prevention switch is turned off, the output pin of the leakage prevention switch outputs a low level to the and logic unit;
and the selector is also used for outputting the data stored in the MCU embedded flash memory through the data transmission line when receiving a low level.
3. The circuit for preventing data leakage of an MCU embedded flash memory according to claim 1, wherein the preset threshold is 31.
4. The circuit for preventing data leakage of an MCU embedded flash memory according to claim 3, wherein said counter is further connected to a reset pin, a reset level of said reset pin is high;
and the counter starts counting from 0 according to the clock edge of the clock signal line, and resets the count value when the reset pin is at a high level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111311458.5A CN114169018B (en) | 2021-11-08 | 2021-11-08 | Circuit for preventing MCU embedded flash memory data leakage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111311458.5A CN114169018B (en) | 2021-11-08 | 2021-11-08 | Circuit for preventing MCU embedded flash memory data leakage |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114169018A CN114169018A (en) | 2022-03-11 |
| CN114169018B true CN114169018B (en) | 2022-07-05 |
Family
ID=80478645
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111311458.5A Active CN114169018B (en) | 2021-11-08 | 2021-11-08 | Circuit for preventing MCU embedded flash memory data leakage |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114169018B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101055613A (en) * | 2007-05-25 | 2007-10-17 | 东南大学 | Chip data output signal protection method and its circuit |
| CN103914664A (en) * | 2012-12-31 | 2014-07-09 | 比亚迪股份有限公司 | Controller and control method having interior memory bank protecting function |
| CN112632482A (en) * | 2020-12-18 | 2021-04-09 | 珠海极海半导体有限公司 | Target application running method and device and storage medium |
| CN113158260A (en) * | 2021-03-30 | 2021-07-23 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Hierarchical protection circuit of SoC chip internal data |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105279460A (en) * | 2014-07-24 | 2016-01-27 | 中兴通讯股份有限公司 | Method and device for starting USB (Universal Serial Bus) debugging mode interface, and terminal |
| US10223531B2 (en) * | 2016-12-30 | 2019-03-05 | Google Llc | Secure device state apparatus and method and lifecycle management |
| CN111177723B (en) * | 2019-12-06 | 2022-05-31 | 苏州浪潮智能科技有限公司 | Safety protection device and method for FPGA program downloading port |
| CN112947861A (en) * | 2021-03-09 | 2021-06-11 | 成都盛芯微科技有限公司 | Data reading method of storage device and electronic device system |
-
2021
- 2021-11-08 CN CN202111311458.5A patent/CN114169018B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101055613A (en) * | 2007-05-25 | 2007-10-17 | 东南大学 | Chip data output signal protection method and its circuit |
| CN103914664A (en) * | 2012-12-31 | 2014-07-09 | 比亚迪股份有限公司 | Controller and control method having interior memory bank protecting function |
| CN112632482A (en) * | 2020-12-18 | 2021-04-09 | 珠海极海半导体有限公司 | Target application running method and device and storage medium |
| CN113158260A (en) * | 2021-03-30 | 2021-07-23 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Hierarchical protection circuit of SoC chip internal data |
Non-Patent Citations (1)
| Title |
|---|
| 如何让MCU的调试接口不会被攻击者利用？;佚名;《https://www.elecfans.com/d/1426276.html》;20201218;全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114169018A (en) | 2022-03-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6823224B2 (en) | Data processing system having an on-chip background debug system and method therefor | |
| US8769160B2 (en) | Multi-interface memory card and method of operation | |
| CN111277836B (en) | Video extraction frame loss control method, system, terminal and storage medium | |
| CN103415839B (en) | Processing method of taking pictures and terminal unit | |
| US20040117553A1 (en) | Memory card | |
| CN112100016A (en) | SOC diagnosis method and system under system abnormal scene | |
| US6526525B1 (en) | PCI debugging device, method and system | |
| CN114169018B (en) | Circuit for preventing MCU embedded flash memory data leakage | |
| CN107291647A (en) | The method that DSP reads receiving channel data in extended serial port | |
| US4621323A (en) | Message transmission circuitry | |
| US5767694A (en) | Information processing apparatus with a mode setting circuit | |
| US10452584B2 (en) | Multimode audio accessory connector | |
| US20180357121A1 (en) | Error correction calculation upon serial bus abort | |
| US20220269642A1 (en) | Method and apparatus for eliminating glitch, and state machine | |
| CN109684245B (en) | Method and device for accessing SPI FLASH through APB bus | |
| CN112506838A (en) | SPI clock synchronization method applied to IR46 electric meter calibrating device | |
| US20020179707A1 (en) | Smart card reader circuit and insertion detection method | |
| JP2775264B2 (en) | Hot-line insertion / extraction method and apparatus | |
| US20240102336A1 (en) | Vehicle charging port cover control method and vehicle charging port cover control device | |
| CN111752876B (en) | System for interface priority arbitration | |
| JP3208930B2 (en) | Intelligent modem | |
| CN114020660A (en) | Decoding method and device based on BISS-C protocol and terminal equipment | |
| RU2033636C1 (en) | Data source-to-processor interface | |
| JPS63164554A (en) | Automatic recognizing system for data speed | |
| CN115048364A (en) | Method and device for writing data into database and database server |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |