CN114161591A - Nondestructive cleavage method for semiconductor chip - Google Patents
Nondestructive cleavage method for semiconductor chip Download PDFInfo
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- CN114161591A CN114161591A CN202111467885.2A CN202111467885A CN114161591A CN 114161591 A CN114161591 A CN 114161591A CN 202111467885 A CN202111467885 A CN 202111467885A CN 114161591 A CN114161591 A CN 114161591A
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
- B28D5/0005—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing
- B28D5/0011—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing with preliminary treatment, e.g. weakening by scoring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention discloses a nondestructive cleavage method of a semiconductor chip, which comprises the following steps: providing a semiconductor chip, and defining a first cleavage line and a second cleavage line; processing a first cleavage groove and a second cleavage groove according to the first cleavage line and the second cleavage line; coating pure photoresist resin to form a first upper reinforcing layer and a first lower reinforcing layer; cutting again to form a third cleavage groove and a fourth cleavage groove; coating photoresist resin doped with reinforcing fibers in the third cleavage groove and the fourth cleavage groove to form a second upper reinforcing layer and a second lower reinforcing layer; and finishing the cleavage. The method of the invention adopts pure photoresist resin and photoresist resin doped with reinforcing fibers to fill step by step to form two reinforcing layers, can effectively balance the stress applied to the semiconductor chip in the cutting process, thereby obviously reducing the probability of chip fracture, not only simplifying the chip cleavage procedure, but also generating good economic benefit and having wide application prospect.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a nondestructive cleavage method of a semiconductor chip.
Background
In semiconductor processing, a whole semiconductor chip needs to be cleaved into a plurality of individual semiconductor structures, and in the prior art, a dicing blade is used to scribe a cleavage line on the whole semiconductor chip and then separate the semiconductor chip along the cleavage line, which is similar to a method of cutting a glass plate.
When the method is adopted to cut a whole semiconductor chip, because the width of the cutting edge of the scribing knife is larger, the width of a scribing and cleavage line is also larger, and when the semiconductor chip is cleaved, a single semiconductor structure is broken when being separated due to the fact that stress is not concentrated, so that the quality of the semiconductor structure is reduced. In view of the above, the present inventors propose a method for non-destructive cleaving of a semiconductor chip.
Disclosure of Invention
The main objective of the present invention is to provide a method for non-destructive cleaving of semiconductor chips, which can effectively solve the problems in the background art.
In order to achieve the purpose, the invention adopts the technical scheme that:
a nondestructive cleavage method of a semiconductor chip comprises the following specific steps:
s1, providing a semiconductor chip, defining a first cleavage line on the front surface of the semiconductor chip, marking the first cleavage line, and defining a second cleavage line on the back surface of the semiconductor chip according to the mark;
s2, providing a carrier plate with a preset cutting gap, and loading the semiconductor chip on the carrier plate;
s3, mounting the carrier plate on a scribing device, cutting a first cleavage groove on the front surface of the semiconductor chip according to a first cleavage line, and cutting a second cleavage groove on the back surface of the semiconductor chip according to a second cleavage line;
s4, respectively coating pure photoresist resin in the first cleavage groove and the second cleavage groove, enabling the photoresist resin to completely fill the first cleavage groove and the second cleavage groove, and curing to form a first upper reinforcing layer and a first lower reinforcing layer;
s5, respectively cutting the middle line positions in the first upper reinforcing layer and the first lower reinforcing layer again to form a third cleavage groove and a fourth cleavage groove;
s6, respectively coating photoresist resin doped with reinforced fibers in the third cleavage groove and the fourth cleavage groove, and curing to form a second upper reinforcing layer and a second lower reinforcing layer;
and S7, cutting from the middle lines of the second upper reinforcing layer and the second lower reinforcing layer respectively, namely completing the cleavage of the whole semiconductor chip.
Preferably, in step S1, the second cleavage line is located directly below the first cleavage line and parallel to the first cleavage line.
Preferably, the size of the cutting gap on the carrier board having the preset cutting gap in step S2 should be larger than the size of the first and second cleavage lines.
Preferably, the depths of the first cleavage groove and the second cleavage groove are one third of the total thickness of the semiconductor chip, and gaps between the first cleavage groove and the second cleavage groove are sequentially closed from outside to inside.
Preferably, the resin used in step S4 is a photoresist resin, and the photoresist resin is applied to the first and second cleavage grooves by spin coating and cured to form the first upper reinforcement layer and the first lower reinforcement layer.
Preferably, the step S5 cuts the centerline position in the first upper reinforcing layer and the first lower reinforcing layer again to form the third cleavage groove and the fourth cleavage groove having the same depth as the first cleavage groove and the second cleavage groove.
Preferably, the reinforcing fiber-doped photoresist resin comprises 5 to 10 wt% of a reinforcing fiber and the balance of the photoresist resin.
Preferably, the reinforcing fiber includes any one of carbon nanotube fiber, glass fiber, and ultra-high molecular weight polyethylene fiber, and is not limited thereto.
Preferably, the photoresist resin is a positive photoresist resin.
Preferably, the reinforcing fibers have a diameter of 100nm to 2 μm and a length of 10 to 100 μm.
Preferably, the lossless cleavage method further includes:
s8, the photoresist resin attached to the semiconductor chip is exposed and developed, and the photoresist resin on the semiconductor chip is removed.
Compared with the traditional semiconductor cleavage method in which a diamond saw blade and the like are utilized to scribe cleavage lines on a whole semiconductor chip and then the semiconductor chip is separated along the cleavage lines, the method has the advantages that the first cleavage groove and the second cleavage groove are firstly processed on the front surface and the back surface of the semiconductor chip, and pure photoresist resin and photoresist resin doped with reinforcing fibers are adopted for filling step by step, so that two reinforcing layers are formed in the first cleavage groove and the second cleavage groove, the stress on the semiconductor chip in the cutting process can be effectively balanced, the probability of chip fracture is obviously reduced, the chip cleavage process can be simplified, good economic benefits can be generated, and the application prospect is wide.
Drawings
FIG. 1 is a schematic diagram of a first cleavage line on the front surface of a semiconductor chip according to the present invention;
FIG. 2 is a schematic view showing the positions and structures of a first cleavage groove, a second cleavage groove, a first reinforcing layer and a second reinforcing layer according to the present invention;
fig. 3 is a schematic view of the positions and structures of a second cleavage groove, a fourth cleavage groove, a first upper reinforcing layer, a second upper reinforcing layer, a first lower reinforcing layer and a second lower reinforcing layer in the present invention.
In the figure: 1. a first cleavage line; 11. a first cleavage groove; 12. a third cleavage groove; 2. a second cleavage line; 21. a second cleavage groove; 22. a fourth cleavage groove; 31. a first upper reinforcing layer; 32. a second upper reinforcing layer; 41. a first lower reinforcing layer; 42. a second lower reinforcing layer.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1-3, a method for non-destructive cleaving of a semiconductor chip includes the following steps:
s1, providing a semiconductor chip, defining a first cleavage line 1 on the front surface of the semiconductor chip, marking the first cleavage line, and defining a second cleavage line 2 on the back surface of the semiconductor chip according to the mark;
specifically, as shown in fig. 1, the second cleavage line 2 is located directly below the first cleavage line 1 and parallel to the first cleavage line, wherein the second cleavage line 2 is not shown in the drawing, and is a scribe line corresponding to a position where the semiconductor is cleaved.
And S2, providing a carrier plate with a preset cutting gap, and loading the semiconductor chip on the carrier plate. Specifically, the size of the cutting gap on the carrier plate with the preset cutting gap should be larger than the sizes of the first cleavage line 1 and the second cleavage line 2, so as to meet the subsequent cutting requirement, when the carrier plate is used for fixing the semiconductor chip, the semiconductor chip is convenient to cut, the cutting efficiency is improved for ensuring the cutting precision, and therefore, the saw blade is required to be ensured not to touch the carrier plate in the cutting process.
S3, mounting the carrier plate on a scribing device, cutting a first cleavage groove 11 on the front surface of the semiconductor chip according to a first cleavage line 1, and cutting a second cleavage groove 21 on the back surface of the semiconductor chip according to a second cleavage line;
specifically, as shown in fig. 2, the depths of the first cleavage groove 11 and the second cleavage groove 21 are both one third of the total thickness of the semiconductor chip, and the gaps between the first cleavage groove 11 and the second cleavage groove 21 are sequentially closed from outside to inside;
as can be seen from the figure, the first cleavage groove 11 and the second cleavage groove 21 have a triangular cross section, which is a shape of a groove naturally formed by saw cutting, and if the semiconductor chip is directly cut and cleaved, the individual semiconductor structures are broken when being separated due to non-concentrated stress, resulting in degradation of the quality of the semiconductor structures, and therefore, in the present invention, by first constructing the first cleavage groove 11 and the second cleavage groove 21 having a depth of one third of the thickness of the semiconductor chip on the front and back surfaces of the semiconductor chip, the individual semiconductor structures are not broken when being separated in this step, and the first cleavage groove 11 and the second cleavage groove 21 also provide conditions for subsequent continuous processing and cutting.
S4, coating pure photoresist resin in the first cleavage groove 11 and the second cleavage groove 21, respectively, and completely filling the photoresist resin in the first cleavage groove 11 and the second cleavage groove 21 to form a first upper reinforcement layer 31 and a first lower reinforcement layer 41;
specifically, referring to fig. 2, the resin used in this step is a photoresist resin, and is coated in the first cleavage groove 11 and the second cleavage groove 21 by a spin coating method to form the first upper reinforcement layer 31 and the first lower reinforcement layer 41; the photoresist resin is preferably positive photoresist resin, and the purpose of the photoresist resin is to use the photoresist resin as a filling material in the first cleavage groove 11 and the second cleavage groove 21, which helps to balance the stress generated in the subsequent further cutting, so that the whole semiconductor chip is accepted uniformly, and the possibility and probability of the cracking in the subsequent cleavage process are reduced.
S5, re-cutting the center line positions in the first upper reinforcing layer 31 and the first lower reinforcing layer 41, respectively, to form a third cleavage groove 12 and a fourth cleavage groove 22;
specifically, as shown in fig. 3, the third and fourth cleavage grooves 12 and 22 formed by cutting the centerline positions of the first upper reinforcing layer 31 and the first lower reinforcing layer 41 again in step S5 have the same depth as the first and second cleavage grooves 11 and 21;
that is, when the third cleavage groove 12 and the fourth cleavage groove 22 are processed, it is necessary to ensure that the photoresist resin is not left at the bottom of the original first cleavage groove 11 and the second cleavage groove 21, wherein, as can be seen from the figure, the cross sections of the third cleavage groove 12 and the fourth cleavage groove 22 are also symmetrical triangular structures, and are also the groove shapes naturally formed by the saw blade cutting, but the sizes of the third cleavage groove 12 and the fourth cleavage groove 22 are smaller, so when the third cleavage groove 12 and the fourth cleavage groove 22 are actually processed, a thinner saw blade should be replaced for cutting.
S6, coating the photoresist resin doped with the reinforcing fibers into the third cleavage groove 12 and the fourth cleavage groove 22, respectively, and curing to form the second upper reinforcing layer 32 and the second lower reinforcing layer 42, it should be noted that the photoresist resin doped with the reinforcing fibers used in this step may contain 5-10 wt% of the reinforcing fibers and the balance of the photoresist resin. The photoresist resin is positive photoresist resin, the reinforcing fiber can be carbon nanotube fiber, glass fiber, ultra-high molecular weight polyethylene fiber, etc., and the diameter is preferably 100nm-2 μm, and the length is 10-100 μm.
A photoresist layer formed by photoresist resin doped with reinforcing fibers and a photoresist layer formed by pure photoresist resin are laminated together, so that a reinforcing material capable of balancing cutting stress is further formed, and the stress balance of the semiconductor chip in the subsequent cutting process is ensured.
S7, and then cutting from the center line of the second upper reinforcing layer 32 and the second lower reinforcing layer 42, respectively, to complete the dicing of the entire semiconductor chip.
S8, the photoresist resin attached to the semiconductor chip is exposed and developed, and the photoresist resin on the semiconductor chip is removed. This prevents the photoresist resin from remaining on the chip and adversely affecting the chip performance. Wherein the reinforcing fiber can be removed together with the photoresist resin.
The foregoing shows and describes the general principles and broad features of the present invention and advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (10)
1. A nondestructive cleavage method of a semiconductor chip is characterized by comprising the following specific steps:
s1, providing a semiconductor chip, defining a first cleavage line (1) on the front surface of the semiconductor chip, marking the first cleavage line, and defining a second cleavage line (2) on the back surface of the semiconductor chip according to the mark;
s2, providing a carrier plate with a preset cutting gap, and loading the semiconductor chip on the carrier plate;
s3, mounting the carrier plate on a scribing device, cutting a first cleavage groove (11) on the front surface of the semiconductor chip according to a first cleavage line (1), and cutting a second cleavage groove (21) on the back surface of the semiconductor chip according to a second cleavage line;
s4, respectively coating pure photoresist resin in the first cleavage groove (11) and the second cleavage groove (21), and completely filling the first cleavage groove (11) and the second cleavage groove (21) with the photoresist resin and curing to form a first upper reinforcing layer (31) and a first lower reinforcing layer (41);
s5, respectively cutting the middle line positions in the first upper reinforcing layer (31) and the first lower reinforcing layer (41) again to form a third cleavage groove (12) and a fourth cleavage groove (22);
s6, respectively coating photoresist resin doped with reinforcing fibers in the third cleavage groove (12) and the fourth cleavage groove (22), and curing to form a second upper reinforcing layer (32) and a second lower reinforcing layer (42);
s7, cutting from the middle line of the second upper reinforcing layer (32) and the second lower reinforcing layer (42) respectively, namely completing the cleavage of the whole semiconductor chip.
2. The method for lossless cleavage of a semiconductor chip according to claim 1, wherein: in step S1, the second cleavage line (2) is positioned directly below the first cleavage line (1) and parallel to the first cleavage line.
3. The method for lossless cleavage of a semiconductor chip according to claim 1, wherein: the size of the cutting gap on the carrier board having the preset cutting gap in the step S2 should be larger than the size of the first and second cleavage lines (1, 2).
4. The method for lossless cleavage of a semiconductor chip according to claim 1, wherein: the depths of the first cleavage groove (11) and the second cleavage groove (21) are one third of the total thickness of the semiconductor chip, and gaps between the first cleavage groove (11) and the second cleavage groove (21) are sequentially closed from outside to inside.
5. The method for lossless cleavage of a semiconductor chip according to claim 1, wherein: the resin used in step S4 is a photoresist resin, and is applied to the first cleavage grooves (11) and the second cleavage grooves (21) by spin coating to form the first upper reinforcement layer (31) and the first lower reinforcement layer (41).
6. The method for lossless cleavage of a semiconductor chip according to claim 4, wherein: the step S5 cuts the center line positions of the first upper reinforcing layer (31) and the first lower reinforcing layer (41) again to form third and fourth cleavage grooves (12, 22) having depths corresponding to those of the first and second cleavage grooves (11, 21).
7. The method for lossless cleavage of a semiconductor chip according to claim 1, wherein: the reinforcing fiber-doped photoresist resin comprises 5-10 wt% of reinforcing fibers and the balance of photoresist resin.
8. The method for lossless cleavage of a semiconductor chip according to claim 1 or 8, wherein: the reinforced fiber comprises any one of carbon nanotube fiber, glass fiber and ultra-high molecular weight polyethylene fiber; and/or the photoresist resin adopts positive photoresist resin.
9. The method for lossless cleavage of a semiconductor chip according to claim 8, wherein: the diameter of the reinforced fiber is 100nm-2 μm, and the length of the reinforced fiber is 10-100 μm.
10. The method for nondestructive cleavage of a semiconductor chip according to claim 7, further comprising:
s8, the photoresist resin attached to the semiconductor chip is exposed and developed, and the photoresist resin on the semiconductor chip is removed.
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| CN202111467885.2A CN114161591B (en) | 2021-12-03 | 2021-12-03 | Nondestructive cleavage method of semiconductor chip |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2004055852A (en) * | 2002-07-19 | 2004-02-19 | Ricoh Co Ltd | Semiconductor device and its fabricating process |
| CN103060920A (en) * | 2013-01-05 | 2013-04-24 | 武汉电信器件有限公司 | High-precision and pollution-free semiconductor wafer cleavage method |
| CN109449084A (en) * | 2018-09-27 | 2019-03-08 | 全球能源互联网研究院有限公司 | A kind of dicing method and semiconductor devices of power chip |
| CN111508899A (en) * | 2020-05-06 | 2020-08-07 | 济南南知信息科技有限公司 | Preparation method of semiconductor package |
| CN112331614A (en) * | 2020-11-26 | 2021-02-05 | 苏州矽锡谷半导体科技有限公司 | Cutting method of semiconductor chip |
| CN113130412A (en) * | 2019-12-30 | 2021-07-16 | 盛合晶微半导体(江阴)有限公司 | Semiconductor chip packaging structure and preparation method thereof |
| CN113345838A (en) * | 2021-08-05 | 2021-09-03 | 度亘激光技术（苏州）有限公司 | Semiconductor device cleavage method |
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- 2021-12-03 CN CN202111467885.2A patent/CN114161591B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004055852A (en) * | 2002-07-19 | 2004-02-19 | Ricoh Co Ltd | Semiconductor device and its fabricating process |
| CN103060920A (en) * | 2013-01-05 | 2013-04-24 | 武汉电信器件有限公司 | High-precision and pollution-free semiconductor wafer cleavage method |
| CN109449084A (en) * | 2018-09-27 | 2019-03-08 | 全球能源互联网研究院有限公司 | A kind of dicing method and semiconductor devices of power chip |
| CN113130412A (en) * | 2019-12-30 | 2021-07-16 | 盛合晶微半导体(江阴)有限公司 | Semiconductor chip packaging structure and preparation method thereof |
| CN111508899A (en) * | 2020-05-06 | 2020-08-07 | 济南南知信息科技有限公司 | Preparation method of semiconductor package |
| CN112331614A (en) * | 2020-11-26 | 2021-02-05 | 苏州矽锡谷半导体科技有限公司 | Cutting method of semiconductor chip |
| CN113345838A (en) * | 2021-08-05 | 2021-09-03 | 度亘激光技术（苏州）有限公司 | Semiconductor device cleavage method |
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