CN113835760A - System starting method, electronic device and storage medium - Google Patents

System starting method, electronic device and storage medium Download PDF

Info

Publication number
CN113835760A
CN113835760A CN202010500918.8A CN202010500918A CN113835760A CN 113835760 A CN113835760 A CN 113835760A CN 202010500918 A CN202010500918 A CN 202010500918A CN 113835760 A CN113835760 A CN 113835760A
Authority
CN
China
Prior art keywords
processor
memory
storage space
instruction
memory snapshot
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010500918.8A
Other languages
Chinese (zh)
Inventor
王涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangdong Oppo Mobile Telecommunications Corp Ltd
Original Assignee
Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangdong Oppo Mobile Telecommunications Corp Ltd filed Critical Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority to CN202010500918.8A priority Critical patent/CN113835760A/en
Publication of CN113835760A publication Critical patent/CN113835760A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4418Suspend and resume; Hibernate and awake
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/445Program loading or initiating
    • G06F9/44505Configuring for program initiating, e.g. using registry, configuration files

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Stored Programmes (AREA)

Abstract

The embodiment of the application discloses a system starting method, electronic equipment and a storage medium, wherein the method comprises the following steps: when the first processor receives the sleep instruction, the first processor performs sleep processing on the system running in the preset storage space, acquires a memory snapshot corresponding to the system, and sends the memory snapshot to the second processor. When the first processor receives the awakening instruction, the first processor acquires the memory snapshot sent by the second processor, and loads the memory snapshot in the memory corresponding to the first processor. And when the memory snapshot is loaded, the first processor wakes up the system and operates the system in the preset storage space in the storage space of the memory. In the embodiment of the application, when the system corresponding to the first processor is in a sleep state and needs to be awakened again, the starting speed of the system is increased by the system starting method.

Description

System starting method, electronic device and storage medium
Technical Field
The present application relates to the field of communications technologies, and in particular, to a system booting method, an electronic device, and a storage medium.
Background
In the related art, the Linux system has the characteristics of good stability, rich function expansion and the like, and is applied to various fields. However, the Linux system is started slowly, and in some scenes with high requirements on the system starting speed, the Linux system cannot be started at the speed meeting the requirements in practical scenes.
Disclosure of Invention
The embodiment of the application provides a system starting method, electronic equipment and a storage medium. The system starting method can improve the starting speed of the system.
In a first aspect, an embodiment of the present application provides a system starting method, where the method includes:
when the first processor receives a sleep instruction, the first processor performs sleep processing on the system running in a preset storage space;
the first processor acquires a memory snapshot corresponding to the system and sends the memory snapshot to the second processor;
when the first processor receives a wake-up instruction, the first processor acquires a memory snapshot sent by the second processor and loads the memory snapshot in a memory corresponding to the first processor;
and when the memory snapshot is loaded, the first processor wakes up the system and operates the system in the preset storage space in the storage space of the memory.
In a second aspect, an embodiment of the present application provides an electronic device, including:
the system comprises a first processor and a second processor, wherein the first processor is electrically connected with the second processor;
the first memory is electrically connected with the first processor and is used for providing a running space corresponding to the first processor when the system runs;
the first processor is configured to:
when the first processor receives a sleep instruction, the first processor performs sleep processing on the system running in a preset storage space;
the first processor acquires a memory snapshot corresponding to the system and sends the memory snapshot to the second processor;
when the first processor receives a wake-up instruction, the first processor acquires a memory snapshot sent by the second processor and loads the memory snapshot in the first storage;
when the memory snapshot is loaded, the first processor wakes up the system, and the system in the preset storage space is operated in the storage space of the first memory;
the second processor is configured to:
before the first processor sends a sleep instruction, when the first processor receives a power-on instruction, sending a system image file corresponding to the system to the first processor.
In a third aspect, embodiments of the present application provide a storage medium, where a plurality of instructions are stored, and the instructions are adapted to be loaded by a processor to perform steps in a system boot method.
In the embodiment of the application, a system corresponding to a first processor is operated in a preset storage space corresponding to a memory of the first processor. And when the first processor receives the sleep instruction, the system is subjected to sleep processing, a memory snapshot corresponding to the system is obtained, and the memory snapshot is sent to the second processor. When the first processor receives the awakening instruction, the first processor acquires the memory snapshot sent by the second processor and loads the memory snapshot in the first memory. And when the memory snapshot is loaded, the first processor wakes up the system and operates the system in the preset storage space in the storage space of the first memory. In the embodiment of the application, when the system corresponding to the first processor is in a sleep state and needs to be awakened again, the memory snapshot is quickly loaded through the memory to recover the starting of the system, so that the starting speed of the system is increased.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a first flowchart of a system startup method according to an embodiment of the present application.
Fig. 2 is a second flowchart of the system starting method according to the embodiment of the present application.
Fig. 3 is a scene diagram of system startup of the system startup method provided in the embodiment of the present application.
Fig. 4 is a schematic view of a first structure of an electronic device according to an embodiment of the present application.
Fig. 5 is a second structural schematic diagram of an electronic device provided in the embodiment of the present application.
Fig. 6 is a third structural schematic diagram of an electronic device provided in the embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In some scenarios, the system boot speed requirements for the processor are becoming increasingly high. For example, in a photographing scene, the image processor and the corresponding system thereof need to be started to process image data, and in order to ensure that an image previewed on a screen of an electronic device in real time does not have a phenomenon of image jamming in the photographing process or an image loading is slow when a user browses the image, the image processor needs to be started quickly and process the image data.
In the related art, the image processor usually runs a Real Time Operating System (RTOS). When external events or data are generated, the real-time operating system can receive and process the external events or data at a high enough speed, the processing result can control the production process or make a quick response to the processing system within a specified time, all available resources are scheduled to complete real-time tasks, and all the real-time tasks are controlled to run coordinately. The method has the characteristics of higher reliability and timely response.
However, the real-time operating system has the disadvantages of poor stability, poor function expansibility, high maintenance cost and the like. Therefore, the part of the image processor runs a Linux system, and the Linux system is an open source operating system which is multi-user, multi-task, multi-thread and multi-CPU supporting and has good stability and function expansibility. However, the normal start process of the Linux system is complex, a series of operations such as power-on self-test, bootstrap loading, kernel initialization and the like are required, a large number of data structures need to be established, and initialization of peripheral hardware is required, so that the Linux system is slow to start.
In order to solve the problem of slow system startup like a Linux system, an embodiment of the present application provides a system startup method, and an execution main body of the system startup method may be an electronic device integrating a first processor and a second processor, which is provided in the embodiment of the present application. The first Processor may be an Image Signal Processing (ISP), the second Processor may be an Application Processor (AP), and the first Processor and the second Processor may be other types of processors, which is not limited herein. The electronic device may be a smart phone, a smart wearable device, a tablet computer, a Personal Digital Assistant (PDA), or the like. The following are detailed below.
Referring to fig. 1, fig. 1 is a first flowchart of a system booting method according to an embodiment of the present application. The system starting method can improve the starting speed of the system.
101. And when the first processor receives the sleep instruction, the first processor performs sleep processing on the system running in the preset storage space.
In some embodiments, when the first processor is started, a system corresponding to the first processor is started, and the system may be operated in a preset storage space. For example, before the system corresponding to the first processor is started, the memory corresponding to the first processor is spatially divided, so as to obtain a preset memory space for operating the system.
When the first processor receives the sleep instruction, the first processor performs sleep processing on the system in the preset storage space, at this time, the system stops running, the central processing unit of the first processor also stops working, but the first processor is responsible for loading the memory of the system and is still in a working state, namely a self-refresh state. At the same time, the first processor will power down peripheral devices that do not need to continue to operate, such as the central processing unit of the first processor. But the memory required for the system operation will be kept in a power-on state, i.e. a normal operating state.
102. The first processor acquires a memory snapshot corresponding to the system and sends the memory snapshot to the second processor.
After the first processor sleeps the system according to the sleep instruction, a memory snapshot (memory snapshot) of the system is obtained, where the memory snapshot is a reference mark or a pointer pointing to data stored in the storage device. The core of the working principle of the method is to establish a pointer list indicating the address of read data and providing an image of instantaneous data. When the data is changed, the data is copied again.
The memory snapshot may include page table information corresponding to the system during sleep, and the page table is a special data structure and is placed in a page table area of the system space to store a corresponding relationship between a logical page and a physical page frame.
Meanwhile, after the system corresponding to the first processor enters the sleep state, the first processor can transfer the memory snapshot corresponding to the system, the first processor sends the memory snapshot to the second processor, and the second processor stores the memory snapshot into the memory corresponding to the second processor.
103. When the first processor receives the awakening instruction, the first processor acquires the memory snapshot sent by the second processor and loads the memory snapshot in a memory corresponding to the first processor;
in some embodiments, when the first processor is required to run the system to work, the electronic device sends a wake-up instruction to the first processor, and the first processor receives the memory snapshot sent by the second processor after receiving the wake-up instruction. After the first processor receives the memory snapshot, the memory of the first processor may load the memory snapshot.
It is to be understood that, during the process of making the memory snapshot by the first processor, the memory snapshot may include the user data and the page table information, and during the process of loading the memory snapshot by the memory, the user data and the page table information may also be loaded.
104. And when the memory snapshot is loaded, the first processor wakes up the system and operates the system in the preset storage space in the storage space of the memory.
After the memory snapshot is loaded, the system may be operated on the memory, and the peripheral device corresponding to the first processor and the central processing unit of the first processor are all in a normal operating state, i.e., a power-on state.
In some embodiments, the system still operates in the preset memory space after waking up, and the preset memory space may be a smaller memory space. When the system needs to sleep, the system runs in a preset storage space, correspondingly can make a memory snapshot with a small data volume, and the first processor sends the memory snapshot with the small data volume to the second processor for storage. When the first processor receives the awakening instruction, the second processor can quickly send the memory snapshot with smaller data volume to the memory of the first processor, so that the time for transmitting the memory snapshot is saved.
In some embodiments, a system running in a predetermined memory space may require more memory space to run under a larger workload, such as processing more complex data, processing more tasks at the same time. At this time, memory expansion may be performed on the preset storage space, for example, the running space of the system is expanded in a memory hot plug (memory hot plug) manner, so that the system may have a larger running space to process data.
In the embodiment of the application, a system corresponding to a first processor runs in a preset storage space corresponding to a memory of the first processor. And when the first processor receives the sleep instruction, the system is subjected to sleep processing, a memory snapshot corresponding to the system is obtained, and the memory snapshot is sent to the second processor. When the first processor receives the awakening instruction, the first processor acquires the memory snapshot sent by the second processor and loads the memory snapshot in the first memory. And when the memory snapshot is loaded, the first processor wakes up the system and operates the system in the preset storage space in the storage space of the first memory. In the embodiment of the application, when the system corresponding to the first processor is in a sleep state and needs to be awakened again, the memory snapshot is quickly loaded through the memory to recover the starting of the system, so that the starting speed of the system is increased.
For a more detailed description of the system starting method provided in the embodiment of the present application, please continue to refer to fig. 2, where fig. 2 is a second flowchart of the system starting method provided in the embodiment of the present application.
201. And the first processor receives a power-on instruction and receives the system image file sent by the second processor according to the power-on instruction.
It is understood that after the electronic device is completely powered off, when the electronic device is restarted again, different components of the electronic device, such as a processor, a power management chip, a display module, and the like, need to be powered on.
It should be noted that, the first processor receives the power-on instruction, or the second processor sends the power-on instruction to the first processor in a specific trigger state. For example, the first processor is an image processor, the second processor is an application processor,
in some embodiments, when the first processor receives a power-on instruction sent by the electronic device, a system image file sent by the second processor is obtained, where the system image file may include system component data corresponding to the system itself, such as a system framework file. The system image file may also include data such as memory information, clock information, thread information, interrupt information, etc. at a time point before the last system shutdown. The system image file sent by the second processor to the first processor may be a system image file corresponding to a system before the first processor is powered off last time.
In some embodiments, the second processor may first obtain the original image file corresponding to the first processor system, for example, download the original image file from a network, or obtain the original image file from a local storage, and then the second processor performs a reduction on the original image file, and cuts out system modules that are not needed by the first processor, for example, a USB module, an ethernet card driver module, and the like. And after the original image file is cut, obtaining a system image file corresponding to the system of the first processor.
In some embodiments, the system image file may also be a system image file obtained by manually reducing an original image file by a user, and storing the system image file in a memory corresponding to the second processor.
202. And the first processor operates the system in a preset storage space according to the system image file.
It should be noted that, before the first processor operates the system in the preset storage space according to the system image file, a preset storage space needs to be constructed, and the preset storage space may be a smaller storage space.
In some embodiments, the first processor may first obtain space information of a memory corresponding to the first processor, such as a size of the memory space, a memory address of the memory space, a type of the memory, and the like. Wherein the memory address of the memory space may be a physical memory address.
After the storage address of the storage space is acquired, the preset storage space can be set from the low-order address to the high-order address, so that the storage capacity of the preset storage space is small, but the preset storage space can meet the normal operation of the system.
Taking the Linux system as an example, when the Linux system is started, a method for allocating the memory from the high-order address to the low-order address is adopted, and in this embodiment, the policy may be modified at the initial stage of starting the Linux system, and a manner for allocating the memory from the low-order address to the high-order address is adopted.
In the later stage of the startup of the Linux system, the page table of the head address in the page table paging can be moved before the final memory allocation is performed, so that the page table of the head address in the page table paging is the page table of the low address.
In some embodiments, the preset storage space may be set in the memory corresponding to the first processor in advance before the system image file is loaded, that is, the preset storage space does not need to be set when the system is started.
203. And when the first processor receives the sleep instruction, the first processor performs sleep processing on the system running in the preset storage space.
When the first processor receives the sleep instruction, the first processor performs sleep processing on the system in the preset storage space, at this time, the system stops running, the central processing unit of the first processor also stops working, but the first processor is responsible for loading the memory of the system and is still in a working state, namely a self-refresh state. At the same time, the first processor will power down peripheral devices that do not need to continue to operate, such as the central processing unit of the first processor. But the memory required for the system operation will be kept in a power-on state, i.e. a normal operating state.
204. The first processor acquires a memory snapshot corresponding to the system and sends the memory snapshot to the second processor.
It can be understood that when the system of the first processor enters a sleep state, i.e., suspends operation, the memory snapshot corresponding to the system may be obtained at this time.
Taking the Linux system as an example, in the Linux system, the system may be dormant through a suspend to ram mechanism of the Linux system, then the memory snapshot in the memory is transferred (dump), the first processor sends the memory snapshot to the second processor, and the second processor may store the memory snapshot.
205. When the first processor receives the awakening instruction, the first processor acquires the memory snapshot sent by the second processor and loads the memory snapshot in the memory corresponding to the first processor.
In some embodiments, when the first processor is required to run the system to work, the electronic device sends a wake-up instruction to the first processor, and the first processor receives the memory snapshot sent by the second processor after receiving the wake-up instruction. After the first processor receives the memory snapshot, the memory of the first processor may load the memory snapshot.
It is to be understood that, during the process of making the memory snapshot by the first processor, the memory snapshot may include the user data and the page table information, and during the process of loading the memory snapshot by the memory, the user data and the page table information may also be loaded.
In some embodiments, the second processor may also send a wake-up instruction to the first processor, and then the second processor sends the memory snapshot to the first processor, and the memory corresponding to the first processor loads the memory snapshot.
206. And obtaining page table information in the memory snapshot, and performing address allocation on the storage space of the memory according to the page table information.
In some embodiments, when the memory snapshot is loaded, the page table information may be loaded together, the physical storage address of the memory is set by the page table information, after the memory snapshot is loaded, the system of the first processor is wakened up to be started, and the started system may first run in the preset storage space and may run in the entire storage space of the memory of the first processor.
Taking Linux system as an example, in Linux operating system, a CPU accesses a memory when executing a process. But the CPU does not directly access physical memory addresses, but indirectly accesses physical memory addresses through a virtual address space. The physical space address of the memory can be determined from the virtual address space by means of page table information.
In some embodiments, after the Memory snapshot is loaded, when a Memory hot plug (Memory hot plug) machine is used, the running space of the system is correspondingly increased or decreased, and at this time, the running space of the system may be increased through a Memory hot plug mechanism, that is, the system running in the preset storage space runs in the space of the entire Memory.
207. When the first processor receives a power-off instruction, generating a corresponding system image file according to a system running in the storage space, and sending the system image file to the second processor.
In some embodiments, in the task processed by the electronic device, the electronic device sends a power-off instruction to the first processor without the first processor, and the first processor generates a system image file for the system, where the system image file may include data constructed at the time of system startup, such as memory information, clock information, thread information, interrupt information, and the like. And then sending the system image file to a second processor, and storing the system image file by the second processor.
When the first processor is powered off, the memory corresponding to the first processor is also powered off, and when the system corresponding to the first processor is restarted, data at the time of starting the system needs to be built again, which consumes time for starting the system for the first time.
At this time, the second processor can directly send the system image file to the first processor, the first processor loads the system image file, and simultaneously, according to the data information in the system image file, the construction of data such as memory information, clock information, thread information, interrupt information and the like is directly completed, and the starting speed of the system is accelerated.
In the embodiment of the application, a system corresponding to a first processor is operated in a preset storage space corresponding to a memory of the first processor. And when the first processor receives the sleep instruction, the system is subjected to sleep processing, a memory snapshot corresponding to the system is obtained, and the memory snapshot is sent to the second processor. When the first processor receives the awakening instruction, the first processor acquires the memory snapshot sent by the second processor and loads the memory snapshot in the first memory. And when the memory snapshot is loaded, the first processor wakes up the system and operates the system in the preset storage space in the storage space of the first memory. In the embodiment of the application, when the system corresponding to the first processor is in a sleep state and needs to be awakened again, the memory snapshot is quickly loaded through the memory to recover the starting of the system, so that the starting speed of the system is increased.
For further explanation of the system startup method provided in the embodiment of the present application, please continue to refer to fig. 3, which is a scene diagram of the system startup provided in the embodiment of the present application in fig. 3.
In an actual scenario application, the first processor and the second processor are in various interaction states, and a system corresponding to the first processor is also in various states, such as a sleep state and an operating state. As will be exemplified below.
In step a, the second processor sends a power-on instruction to the first processor, and when the first processor is powered on, the system corresponding to the first processor needs to be started to work, and at this time, the second processor may send the system image file corresponding to the first processor system to the first processor.
In step B, when the electronic device processes the task and does not need the first processor to participate, for example, when the user does not use the electronic device to take a picture, the image processor may not be used. At the moment, the second processor sends a sleep instruction to the first processor, so that the system of the first processor is in a sleep state, and when the first processor is awakened to work next time, the first processor can rapidly awaken the system in the sleep state.
In step C, the first processor receives the sleep instruction, performs sleep processing on the system, obtains a memory snapshot corresponding to the system, and sends the memory snapshot to the second processor.
In step D, when the task processed by the electronic device needs to be participated by the first processor, at this time, the second processor sends a wakeup instruction to the first processor, and simultaneously the second processor sends the memory snapshot to the first processor, the memory of the first processor loads the memory snapshot, and after the memory snapshot is loaded, the system of the first processor is started normally.
And E, when the electronic equipment needs to be shut down or the electronic equipment is in a low power state and needs to be powered off, the second processor sends a power-off instruction to the first processor, and all the peripheral equipment corresponding to the first processor is powered off.
And step F, before the first processor is powered off, acquiring a system image file of the system, and acquiring data information required to be constructed when the system is started while acquiring the system image file. The system image file is then sent to the second processor, which may send the system image file containing the data information to the first processor the next time the first processor needs to boot.
Through the scene description, when the electronic device is in the state of being powered on for the first time, the second processor sends the system image file to the first processor, and the system of the first processor is quickly started through the system image file. When the first processor receives a sleep instruction, the memory snapshot is sent to the second processor, and when the first processor receives a wake-up instruction, the system corresponding to the first processor can be quickly woken up through the memory snapshot sent by the second processor.
Therefore, the system can be started quickly no matter the first processor is in the initial power-on state or the wake-up state, so that the system starting time is shortened, and the system starting speed is increased.
Accordingly, an electronic device is further provided in the embodiment of the present application, please refer to fig. 4, and fig. 4 is a schematic view of a first structure of an electronic device 300 provided in the embodiment of the present application.
The electronic device 300 includes a first processor 310, a bus 320, and a second processor 330. The first processor 310 includes a first memory 311, and the second processor 330 includes a second memory 331. The first memory 311 may be built in the first processor 310 or may be external to the first processor 310. The second memory 331 may be built in the first processor 330 or may be externally provided to the first processor 330. The first processor 310 and the second processor 330 are connected by a bus 320. The first memory 311 and the second memory 331 may include static memories and dynamic memories, such as ddr (double Data Rate sdram). The number of the first memory 311 and the second memory 331 may be one or more.
The first processor 310 and the second processor 320 may be connected to communicate with each other through a bus 320, and the bus 320 may be a Peripheral Component Interconnect Express (PCIE).
The first processor 310 and the second processor 330 may transmit data to each other through the bus 320, for example, the second processor 330 may transmit a system image file to the first processor 310 through the bus 320. The second processor 330 may send a power-up instruction, a power-down instruction, a sleep instruction, a wake-up instruction, etc. to the first processor 310 over the bus 320. The first processor 310 may send memory snapshots and system image files, etc. to the second processor 330 via the bus 320.
In some embodiments, the first processor 310 may include an image processor and the second processor 330 may include an application processor. The first processor 310 and the second processor 330 may also include other devices, such as a power control module, a baseband module, and the like.
Referring to fig. 5 in detail, fig. 5 is a second structural schematic diagram of an electronic device according to an embodiment of the present disclosure. The electronic device shown in fig. 5 comprises an image processor 401, a first bus 402, an application processor 403, a second bus 404, an image sensor 405, and a third bus 406.
The image processor 401 and the application processor 403 are connected by a first bus 402, where the first bus 402 may be a PCIE (peripheral component interconnect express) bus, and the PCIE bus has the characteristic of point-to-point dual-channel high bandwidth transmission. The image Processor 401 may also be connected to the application Processor 403 through an MI PI (Mobile Industry Processor Interface) line.
The application processor 403 may be connected to the image sensor 405 through the second bus 404, and the image sensor 405 may transmit image data to the application processor 403 through the second bus 404. The second bus 404 may be a PCIE bus or an MI PI line.
The image sensor 405 may be connected to the image processor 401 through a third bus 406, and the image sensor 405 may transmit image data to the image processor 401 through the third bus 406. The third bus 406 may be a PCIE bus or an MI PI line.
In some embodiments, when a user needs to take a picture with a camera, the image sensor 405, the image processor 401, and the application processor 403 are all activated, and the image processor 401 and the application processor 403 participate in the processing of the image data.
When taking a picture, the application processor 403 sends a power-on instruction to the image processor 401, after the image processor 401 is powered on, the original image data sent by the image sensor 405 is obtained and stored in the corresponding memory, the image processor 401 processes the original image data in the memory, and then sends the processed image data to the application processor 403, and the application processor 403 processes the data processed by the image processor 401 again to obtain the final required image data.
When the user does not take a picture, the image processor 401 may be sleep-enabled or powered-off, and in order to ensure that the electronic device can quickly process the image data when the user starts the camera again, the system starting method in the above embodiment may accelerate the starting of the system corresponding to the image processor 401, so that the electronic device can process the image data faster.
For example, when the image processor 401 receives a power-off instruction, a system image file of a system corresponding to the image processor 401 may be sent to the application processor 403, where the system image file includes data that needs to be constructed when the system is started, such as clock information, interrupt information, and the like. The application processor 403 saves the system image file in the corresponding memory. When the image processor 401 is powered on and started next time, the system image file can be directly sent to the image processor 401, the image processor 401 loads the system image file and loads data to be constructed when the system is started, and therefore the image processor 401 does not need to reconstruct the data required when the system is started, time for starting the system is saved, and starting speed of the system is improved.
For another example, when the image processor 401 receives the sleep instruction, before the system is asleep, the image processor 401 obtains a memory snapshot corresponding to the system, and then sends the memory snapshot to the application processor 403, and the application processor 403 saves the memory snapshot. When the image processor 401 needs to wake up next time, the application processor 403 may send the memory snapshot to the image processor 401, and the memory snapshot is loaded by the memory corresponding to the image processor 401, thereby completing the startup of the system. Then, the system can run in the storage space of the whole memory from the preset storage space in a memory hot plug mode, and the rapid starting and running of the system are realized.
In summary, in the embodiment of the present application, a system corresponding to the first processor 310 runs in a preset storage space corresponding to the memory of the first processor 310. When the first processor 310 receives the sleep instruction, it performs sleep processing on the system, obtains a memory snapshot corresponding to the system, and sends the memory snapshot to the second processor 330. When the first processor 310 receives the wake-up instruction, the first processor obtains the memory snapshot sent by the second processor 330, and loads the memory snapshot in the first storage 311. After the memory snapshot is loaded, the first processor 310 wakes up the system, and the system in the preset storage space is operated in the storage space of the first storage 311. In the embodiment of the present application, when the system corresponding to the first processor 310 is in a sleep state and needs to be awakened again, the memory snapshot is quickly loaded through the memory to recover the startup of the system, so that the startup speed of the system is increased.
Referring to fig. 6, fig. 6 is a schematic view of a third structure of an electronic device according to an embodiment of the present disclosure. Wherein the electronic device 300 comprises: an input unit 370, a display unit 380, a second processor 330, a first processor 310, a power source 340, a sensor 350, a memory 360. Those skilled in the art will appreciate that the electronic device configuration shown in fig. 6 does not constitute a limitation of the electronic device and may include more or fewer components than those shown, or some components may be combined, or a different arrangement of components.
The input unit 370 may be used to receive input numeric or character information and generate keyboard, mouse, joystick, optical or trackball signal inputs related to user settings and function control. In particular, in one particular embodiment, input unit 370 may include a touch-sensitive surface as well as other input devices. The input unit transmits the input data to the second processor 330, and can receive and execute commands from the second processor 330. In addition, touch sensitive surfaces may be implemented using various types of resistive, capacitive, infrared, and surface acoustic waves. The input unit 370 may include other input devices in addition to the touch-sensitive surface. In particular, other input devices may include, but are not limited to, one or more of a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, a joystick, and the like.
The display unit 380 may be used to display information input by or provided to a user and various graphical user interfaces of the electronic device, which may be made up of graphics, text, icons, video, and any combination thereof. The Display unit 380 may include a Display panel, and optionally, the Display panel may be configured in the form of a Liquid Crystal Display (LCD), an Organic Light-Emitting Diode (OLED), or the like.
The memory 360 may be used to store software programs and modules, and the second processor 330 and the next processor perform various functional applications and data processing by operating the software programs and modules stored in the memory 360. The memory 360 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required by at least one function (such as a sound playing function, an image playing function, etc.), and the like; the storage data area may store data (such as audio data, a phonebook, etc.) created according to the use of the electronic device, and the like. Further, the memory 360 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid state storage device. The memory 360 includes a first memory 311 corresponding to the first processor 310, the memory 360 further includes a second memory 331 corresponding to the second processor 330, and accordingly, the memory 360 further includes a memory controller to provide the first processor 310, the second processor 330 and the input unit 370 with access to the memory 360.
The second processor 330 is a control center of the electronic device, connects various parts of the whole electronic device using various interfaces and lines, performs various functions of the electronic device and processes data by operating or executing software programs and/or modules stored in the memory 360 and calling data stored in the memory 360, thereby monitoring the whole electronic device. The second processor 330 is connected to the first processor 310, the image data processed by the first processor 310 can be transmitted to the second processor 330 for processing, and the image processed by the second processor 330 can be displayed by the display unit 380.
The electronic device further comprises a power source 340 (such as a battery) for supplying power to each component, and preferably, the power source can be logically connected with the second processor 330 and the first processor 310 through a power management system, so that functions of managing charging, discharging, and power consumption are realized through the power management system. The power supply 340 may also include any component of one or more dc or ac power sources, recharging systems, power failure detection circuitry, power converters or inverters, power status indicators, and the like.
The electronic device may also include at least one sensor 350, such as a light sensor, motion sensor, image sensor, and other sensors. In particular, the light sensor may include an ambient light sensor that may adjust the brightness of the display panel according to the brightness of ambient light, and a proximity sensor that may turn off the display panel and/or the backlight when the electronic device is moved to the ear. As one of the motion sensors, the gravity acceleration sensor can detect the magnitude of acceleration in each direction (generally, three axes), detect the magnitude and direction of gravity when the motion sensor is stationary, and can be used for applications (such as horizontal and vertical screen switching, related games, magnetometer attitude calibration) for recognizing the attitude of an electronic device, vibration recognition related functions (such as pedometer and tapping), and the like; as for other sensors such as a gyroscope, a barometer, a hygrometer, a thermometer, and an infrared sensor, which may be further configured to the electronic device, detailed descriptions thereof are omitted.
Although not shown, the electronic device may further include a camera, a bluetooth module, and the like, which are not described in detail herein. Specifically, in this embodiment, the first processor in the electronic device loads the executable file corresponding to the process of one or more application programs into the memory 360 according to the following instructions, and the first processor 310 runs the application programs stored in the memory 360, so as to implement various functions:
when the first processor receives a sleep instruction, the first processor performs sleep processing on the system running in a preset storage space;
the first processor acquires a memory snapshot corresponding to the system and sends the memory snapshot to a second processor;
when the first processor receives a wake-up instruction, the first processor acquires a memory snapshot sent by the second processor and loads the memory snapshot in a memory corresponding to the first processor;
and when the memory snapshot is loaded, the first processor wakes up the system and operates the system in the preset storage space in the storage space of the memory.
It will be understood by those skilled in the art that all or part of the steps of the methods of the above embodiments may be performed by instructions or by associated hardware controlled by the instructions, which may be stored in a computer readable storage medium and loaded and executed by a processor.
To this end, the present application provides a storage medium, in which a plurality of instructions are stored, where the instructions can be loaded by a processor to execute the steps in any one of the system booting methods provided in the present application. For example, the instructions may perform the steps of:
when a first processor receives a sleep instruction, the first processor performs sleep processing on the system running in a preset storage space;
the first processor acquires a memory snapshot corresponding to the system and sends the memory snapshot to a second processor;
when the first processor receives a wake-up instruction, the first processor acquires a memory snapshot sent by the second processor and loads the memory snapshot in a memory corresponding to the first processor;
and when the memory snapshot is loaded, the first processor wakes up the system and operates the system in the preset storage space in the storage space of the memory.
The above operations can be implemented in the foregoing embodiments, and are not described in detail herein.
Wherein the storage medium may include: read Only Memory (ROM), Random Access Memory (RAM), magnetic or optical disks, and the like.
Since the instructions stored in the storage medium can execute the steps in any system starting method provided in the embodiments of the present application, beneficial effects that can be achieved by any system starting method provided in the embodiments of the present application can be achieved, for details, see the foregoing embodiments, and are not described herein again.
The system starting method, the electronic device, and the storage medium provided in the embodiments of the present application are described in detail above, and specific examples are applied in the present application to explain the principles and implementations of the present application, and the descriptions of the above embodiments are only used to help understand the method and the core ideas of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (10)

1. A system starting method is applied to an electronic device, and is characterized in that the electronic device comprises a first processor and a second processor, and the method comprises the following steps:
when the first processor receives a sleep instruction, the first processor performs sleep processing on the system running in a preset storage space;
the first processor acquires a memory snapshot corresponding to the system and sends the memory snapshot to the second processor;
when the first processor receives a wake-up instruction, the first processor acquires a memory snapshot sent by the second processor and loads the memory snapshot in a memory corresponding to the first processor;
and when the memory snapshot is loaded, the first processor wakes up the system and operates the system in the preset storage space in the storage space of the memory.
2. The system startup method of claim 1, wherein before the first processor receives a sleep instruction, the method further comprises:
the first processor acquires spatial information of the memory;
setting the preset storage space in the storage space according to the space information;
and operating the system in the preset storage space.
3. The system starting method according to claim 2, wherein the setting the preset storage space in the storage space according to the space information includes:
the first processor acquires a storage space address corresponding to the memory according to the space information;
and setting the preset storage space from a low-order address according to the storage space address.
4. The system startup method of claim 1, wherein before the first processor receives a sleep instruction, the method further comprises:
the first processor receives a power-on instruction, and receives a system image file sent by the second processor according to the power-on instruction;
and operating the system in the preset storage space according to the system image file.
5. The system starting method according to any one of claims 1 to 4, wherein the loading the memory snapshot in the storage corresponding to the first processor comprises:
obtaining page table information in the memory snapshot;
and carrying out address allocation on the storage space of the memory according to the page table information.
6. An electronic device, comprising a first processor and a second processor, wherein the first processor and the second processor are electrically connected;
the first memory is electrically connected with the first processor and is used for providing a running space corresponding to the first processor when the system runs;
the first processor is configured to:
when the first processor receives a sleep instruction, the first processor performs sleep processing on the system running in a preset storage space;
the first processor acquires a memory snapshot corresponding to the system and sends the memory snapshot to the second processor;
when the first processor receives a wake-up instruction, the first processor acquires a memory snapshot sent by the second processor and loads the memory snapshot in the first storage;
when the memory snapshot is loaded, the first processor wakes up the system, and the system in the preset storage space is operated in the storage space of the first memory;
the second processor is configured to:
before the first processor sends a sleep instruction, when the first processor receives a power-on instruction, sending a system image file corresponding to the system to the first processor.
7. The electronic device of claim 6, wherein the second processor is configured to:
before the first processor receives a power-on instruction, acquiring an original image file corresponding to the system, and analyzing the original image file;
simplifying the original image file to obtain a system image file corresponding to the system;
before the first processor receives a sleep instruction, when the first processor receives a power-on instruction, the system image file is sent to the first processor.
8. The electronic device according to claim 6, further comprising a second storage electrically connected to the second processor, wherein the second storage is configured to store a system image file and a memory snapshot corresponding to a system of the first processor;
the second processor is configured to:
when the first processor receives a sleep instruction, receiving and storing a memory snapshot corresponding to the system sent by the first processor;
and when the first processor receives a power-off instruction, receiving and storing the system image file corresponding to the system sent by the first processor.
9. The electronic device of any of claims 6-8, wherein the second processor is configured to:
when the first processor receives a wake-up instruction, obtaining page table information in the memory snapshot;
performing address allocation on the storage space of the first memory according to the page table information;
and operating the system in the preset storage space in the storage space of the first memory for completing address allocation.
10. A storage medium storing a plurality of instructions adapted to be loaded by a processor to perform the steps of the system boot method according to any one of claims 1 to 5.
CN202010500918.8A 2020-06-04 2020-06-04 System starting method, electronic device and storage medium Pending CN113835760A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010500918.8A CN113835760A (en) 2020-06-04 2020-06-04 System starting method, electronic device and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010500918.8A CN113835760A (en) 2020-06-04 2020-06-04 System starting method, electronic device and storage medium

Publications (1)

Publication Number Publication Date
CN113835760A true CN113835760A (en) 2021-12-24

Family

ID=78963321

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010500918.8A Pending CN113835760A (en) 2020-06-04 2020-06-04 System starting method, electronic device and storage medium

Country Status (1)

Country Link
CN (1) CN113835760A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023130443A1 (en) * 2022-01-10 2023-07-13 华为技术有限公司 Data processing method and electronic device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120036346A1 (en) * 2010-08-04 2012-02-09 International Business Machines Corporation Partial hibernation restore for boot time reduction
CN103678040A (en) * 2013-12-06 2014-03-26 北京明朝万达科技有限公司 Snapshooting and backspacing method and system based on computer system
CN105117246A (en) * 2015-08-04 2015-12-02 晶晨半导体(上海)有限公司 Method for rapidly booting electronic equipment
CN105653495A (en) * 2014-11-13 2016-06-08 鸿富锦精密工业(深圳)有限公司 Dual-processor electronic device and rapid power boot method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120036346A1 (en) * 2010-08-04 2012-02-09 International Business Machines Corporation Partial hibernation restore for boot time reduction
CN103678040A (en) * 2013-12-06 2014-03-26 北京明朝万达科技有限公司 Snapshooting and backspacing method and system based on computer system
CN105653495A (en) * 2014-11-13 2016-06-08 鸿富锦精密工业(深圳)有限公司 Dual-processor electronic device and rapid power boot method thereof
CN105117246A (en) * 2015-08-04 2015-12-02 晶晨半导体(上海)有限公司 Method for rapidly booting electronic equipment

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023130443A1 (en) * 2022-01-10 2023-07-13 华为技术有限公司 Data processing method and electronic device
CN116745768A (en) * 2022-01-10 2023-09-12 华为技术有限公司 Data processing method and electronic equipment
CN116745768B (en) * 2022-01-10 2024-05-07 华为技术有限公司 Data processing method and electronic equipment

Similar Documents

Publication Publication Date Title
US11079261B2 (en) System on a chip with always-on processor
US10915160B2 (en) System on a chip with fast wake from sleep
US10775875B2 (en) Devices and methods for switching and communication among multiple operating systems and application management methods thereof
US9804665B2 (en) Apparatus and method for passing event handling control from a primary processor to a secondary processor during sleep mode
US10261894B2 (en) System on a chip with always-on processor which reconfigures SOC and supports memory-only communication mode
CN107430424B (en) Techniques for improved hybrid sleep power management
TWI590041B (en) Methods and apparatuses to wake computer systems from sleep states
US7869835B1 (en) Method and system for pre-loading and executing computer instructions within the cache memory
US20150362980A1 (en) Always-On Processor as a Coprocessor
US20160055031A1 (en) Dual-System Architecture With Fast Recover And Switching Of Operating System
KR20170056646A (en) Method and apparatus for running application program
US20120278542A1 (en) Computer system and sleep control method thereof
CN113835760A (en) System starting method, electronic device and storage medium
CN114816031B (en) Power saving method for terminal equipment, terminal equipment and medium
CN113867804A (en) Starting method of real-time operating system, electronic equipment and storage medium
CN113747043A (en) Image processor starting method, electronic device and storage medium
KR102619117B1 (en) Electronic device and method for operating electronic device
CN113703799B (en) Computing device and BIOS updating method and medium thereof
WO2021233363A1 (en) Computing device and bios update method therefor, and medium
CN113268135A (en) Low-power-consumption standby method and device
TWI514127B (en) A computer system with an e-reader mode and e-book processing method thereof
CN113867749A (en) Data upgrading method, electronic equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination